avx512bitalgintrin.h revision 1.1.1.1 
1254885Sdumbbell/* Copyright (C) 2017-2018 Free Software Foundation, Inc.
2254885Sdumbbell
3254885Sdumbbell   This file is part of GCC.
4254885Sdumbbell
5254885Sdumbbell   GCC is free software; you can redistribute it and/or modify
6254885Sdumbbell   it under the terms of the GNU General Public License as published by
7254885Sdumbbell   the Free Software Foundation; either version 3, or (at your option)
8254885Sdumbbell   any later version.
9254885Sdumbbell
10254885Sdumbbell   GCC is distributed in the hope that it will be useful,
11254885Sdumbbell   but WITHOUT ANY WARRANTY; without even the implied warranty of
12254885Sdumbbell   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13254885Sdumbbell   GNU General Public License for more details.
14254885Sdumbbell
15254885Sdumbbell   Under Section 7 of GPL version 3, you are granted additional
16254885Sdumbbell   permissions described in the GCC Runtime Library Exception, version
17254885Sdumbbell   3.1, as published by the Free Software Foundation.
18254885Sdumbbell
19254885Sdumbbell   You should have received a copy of the GNU General Public License and
20254885Sdumbbell   a copy of the GCC Runtime Library Exception along with this program;
21254885Sdumbbell   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
22254885Sdumbbell   <http://www.gnu.org/licenses/>.  */
23254885Sdumbbell
24254885Sdumbbell#if !defined _IMMINTRIN_H_INCLUDED
25254885Sdumbbell# error "Never use <avx512bitalgintrin.h> directly; include <x86intrin.h> instead."
26254885Sdumbbell#endif
27254885Sdumbbell
28254885Sdumbbell#ifndef _AVX512BITALGINTRIN_H_INCLUDED
29254885Sdumbbell#define _AVX512BITALGINTRIN_H_INCLUDED
30254885Sdumbbell
31254885Sdumbbell#ifndef __AVX512BITALG__
32254885Sdumbbell#pragma GCC push_options
33254885Sdumbbell#pragma GCC target("avx512bitalg")
34254885Sdumbbell#define __DISABLE_AVX512BITALG__
35254885Sdumbbell#endif /* __AVX512BITALG__ */
36254885Sdumbbell
37254885Sdumbbellextern __inline __m512i
38254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
39254885Sdumbbell_mm512_popcnt_epi8 (__m512i __A)
40254885Sdumbbell{
41254885Sdumbbell  return (__m512i) __builtin_ia32_vpopcountb_v64qi ((__v64qi) __A);
42254885Sdumbbell}
43254885Sdumbbell
44254885Sdumbbellextern __inline __m512i
45254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
46254885Sdumbbell_mm512_popcnt_epi16 (__m512i __A)
47254885Sdumbbell{
48254885Sdumbbell  return (__m512i) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
49254885Sdumbbell}
50254885Sdumbbell
51254885Sdumbbell#ifdef __DISABLE_AVX512BITALG__
52254885Sdumbbell#undef __DISABLE_AVX512BITALG__
53254885Sdumbbell#pragma GCC pop_options
54254885Sdumbbell#endif /* __DISABLE_AVX512BITALG__ */
55254885Sdumbbell
56254885Sdumbbell#if !defined(__AVX512BITALG__) || !defined(__AVX512BW__)
57254885Sdumbbell#pragma GCC push_options
58254885Sdumbbell#pragma GCC target("avx512bitalg,avx512bw")
59254885Sdumbbell#define __DISABLE_AVX512BITALGBW__
60254885Sdumbbell#endif /* __AVX512VLBW__ */
61254885Sdumbbell
62254885Sdumbbellextern __inline __m512i
63254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
64254885Sdumbbell_mm512_mask_popcnt_epi8 (__m512i __W, __mmask64 __U, __m512i __A)
65254885Sdumbbell{
66254885Sdumbbell  return (__m512i) __builtin_ia32_vpopcountb_v64qi_mask ((__v64qi) __A,
67254885Sdumbbell							 (__v64qi) __W,
68254885Sdumbbell							 (__mmask64) __U);
69254885Sdumbbell}
70254885Sdumbbell
71254885Sdumbbellextern __inline __m512i
72254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
73254885Sdumbbell_mm512_maskz_popcnt_epi8 (__mmask64 __U, __m512i __A)
74254885Sdumbbell{
75254885Sdumbbell  return (__m512i) __builtin_ia32_vpopcountb_v64qi_mask ((__v64qi) __A,
76254885Sdumbbell						(__v64qi)
77254885Sdumbbell						_mm512_setzero_si512 (),
78254885Sdumbbell						(__mmask64) __U);
79254885Sdumbbell}
80254885Sdumbbellextern __inline __m512i
81254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
82254885Sdumbbell_mm512_mask_popcnt_epi16 (__m512i __W, __mmask32 __U, __m512i __A)
83254885Sdumbbell{
84254885Sdumbbell  return (__m512i) __builtin_ia32_vpopcountw_v32hi_mask ((__v32hi) __A,
85254885Sdumbbell							(__v32hi) __W,
86254885Sdumbbell							(__mmask32) __U);
87254885Sdumbbell}
88254885Sdumbbell
89254885Sdumbbellextern __inline __m512i
90254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
91254885Sdumbbell_mm512_maskz_popcnt_epi16 (__mmask32 __U, __m512i __A)
92254885Sdumbbell{
93254885Sdumbbell  return (__m512i) __builtin_ia32_vpopcountw_v32hi_mask ((__v32hi) __A,
94254885Sdumbbell						(__v32hi)
95254885Sdumbbell						_mm512_setzero_si512 (),
96254885Sdumbbell						(__mmask32) __U);
97254885Sdumbbell}
98254885Sdumbbell
99254885Sdumbbellextern __inline __mmask64
100254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
101254885Sdumbbell_mm512_bitshuffle_epi64_mask (__m512i __A, __m512i __B)
102254885Sdumbbell{
103254885Sdumbbell  return (__mmask64) __builtin_ia32_vpshufbitqmb512_mask ((__v64qi) __A,
104254885Sdumbbell						 (__v64qi) __B,
105254885Sdumbbell						 (__mmask64) -1);
106254885Sdumbbell}
107254885Sdumbbell
108254885Sdumbbellextern __inline __mmask64
109254885Sdumbbell__attribute__((__gnu_inline__, __always_inline__, __artificial__))
110254885Sdumbbell_mm512_mask_bitshuffle_epi64_mask (__mmask64 __M, __m512i __A, __m512i __B)
111254885Sdumbbell{
112254885Sdumbbell  return (__mmask64) __builtin_ia32_vpshufbitqmb512_mask ((__v64qi) __A,
113254885Sdumbbell						 (__v64qi) __B,
114254885Sdumbbell						 (__mmask64) __M);
115254885Sdumbbell}
116254885Sdumbbell
117254885Sdumbbell#ifdef __DISABLE_AVX512BITALGBW__
118254885Sdumbbell#undef __DISABLE_AVX512BITALGBW__
119254885Sdumbbell#pragma GCC pop_options
120254885Sdumbbell#endif /* __DISABLE_AVX512BITALGBW__ */
121254885Sdumbbell
122254885Sdumbbell#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__) || !defined(__AVX512BW__)
123254885Sdumbbell#pragma GCC push_options
124254885Sdumbbell#pragma GCC target("avx512bitalg,avx512vl,avx512bw")
125254885Sdumbbell#define __DISABLE_AVX512BITALGVLBW__
126254885Sdumbbell#endif /* __AVX512VLBW__ */
127
128extern __inline __m256i
129__attribute__((__gnu_inline__, __always_inline__, __artificial__))
130_mm256_mask_popcnt_epi8 (__m256i __W, __mmask32 __U, __m256i __A)
131{
132  return (__m256i) __builtin_ia32_vpopcountb_v32qi_mask ((__v32qi) __A,
133							 (__v32qi) __W,
134							 (__mmask32) __U);
135}
136
137extern __inline __m256i
138__attribute__((__gnu_inline__, __always_inline__, __artificial__))
139_mm256_maskz_popcnt_epi8 (__mmask32 __U, __m256i __A)
140{
141  return (__m256i) __builtin_ia32_vpopcountb_v32qi_mask ((__v32qi) __A,
142						(__v32qi)
143						 _mm256_setzero_si256 (),
144						(__mmask32) __U);
145}
146
147extern __inline __mmask32
148__attribute__((__gnu_inline__, __always_inline__, __artificial__))
149_mm256_bitshuffle_epi64_mask (__m256i __A, __m256i __B)
150{
151  return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask ((__v32qi) __A,
152						 (__v32qi) __B,
153						 (__mmask32) -1);
154}
155
156extern __inline __mmask32
157__attribute__((__gnu_inline__, __always_inline__, __artificial__))
158_mm256_mask_bitshuffle_epi64_mask (__mmask32 __M, __m256i __A, __m256i __B)
159{
160  return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask ((__v32qi) __A,
161						 (__v32qi) __B,
162						 (__mmask32) __M);
163}
164
165#ifdef __DISABLE_AVX512BITALGVLBW__
166#undef __DISABLE_AVX512BITALGVLBW__
167#pragma GCC pop_options
168#endif /* __DISABLE_AVX512BITALGVLBW__ */
169
170
171#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__)
172#pragma GCC push_options
173#pragma GCC target("avx512bitalg,avx512vl")
174#define __DISABLE_AVX512BITALGVL__
175#endif /* __AVX512VLBW__ */
176
177extern __inline __mmask16
178__attribute__((__gnu_inline__, __always_inline__, __artificial__))
179_mm_bitshuffle_epi64_mask (__m128i __A, __m128i __B)
180{
181  return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask ((__v16qi) __A,
182						 (__v16qi) __B,
183						 (__mmask16) -1);
184}
185
186extern __inline __mmask16
187__attribute__((__gnu_inline__, __always_inline__, __artificial__))
188_mm_mask_bitshuffle_epi64_mask (__mmask16 __M, __m128i __A, __m128i __B)
189{
190  return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask ((__v16qi) __A,
191						 (__v16qi) __B,
192						 (__mmask16) __M);
193}
194
195extern __inline __m256i
196__attribute__((__gnu_inline__, __always_inline__, __artificial__))
197_mm256_popcnt_epi8 (__m256i __A)
198{
199  return (__m256i) __builtin_ia32_vpopcountb_v32qi ((__v32qi) __A);
200}
201
202extern __inline __m256i
203__attribute__((__gnu_inline__, __always_inline__, __artificial__))
204_mm256_popcnt_epi16 (__m256i __A)
205{
206  return (__m256i) __builtin_ia32_vpopcountw_v16hi ((__v16hi) __A);
207}
208
209extern __inline __m128i
210__attribute__((__gnu_inline__, __always_inline__, __artificial__))
211_mm_popcnt_epi8 (__m128i __A)
212{
213  return (__m128i) __builtin_ia32_vpopcountb_v16qi ((__v16qi) __A);
214}
215
216extern __inline __m128i
217__attribute__((__gnu_inline__, __always_inline__, __artificial__))
218_mm_popcnt_epi16 (__m128i __A)
219{
220  return (__m128i) __builtin_ia32_vpopcountw_v8hi ((__v8hi) __A);
221}
222
223extern __inline __m256i
224__attribute__((__gnu_inline__, __always_inline__, __artificial__))
225_mm256_mask_popcnt_epi16 (__m256i __W, __mmask16 __U, __m256i __A)
226{
227  return (__m256i) __builtin_ia32_vpopcountw_v16hi_mask ((__v16hi) __A,
228							(__v16hi) __W,
229							(__mmask16) __U);
230}
231
232extern __inline __m256i
233__attribute__((__gnu_inline__, __always_inline__, __artificial__))
234_mm256_maskz_popcnt_epi16 (__mmask16 __U, __m256i __A)
235{
236  return (__m256i) __builtin_ia32_vpopcountw_v16hi_mask ((__v16hi) __A,
237						(__v16hi)
238						_mm256_setzero_si256 (),
239						(__mmask16) __U);
240}
241
242extern __inline __m128i
243__attribute__((__gnu_inline__, __always_inline__, __artificial__))
244_mm_mask_popcnt_epi8 (__m128i __W, __mmask16 __U, __m128i __A)
245{
246  return (__m128i) __builtin_ia32_vpopcountb_v16qi_mask ((__v16qi) __A,
247							 (__v16qi) __W,
248							 (__mmask16) __U);
249}
250
251extern __inline __m128i
252__attribute__((__gnu_inline__, __always_inline__, __artificial__))
253_mm_maskz_popcnt_epi8 (__mmask16 __U, __m128i __A)
254{
255  return (__m128i) __builtin_ia32_vpopcountb_v16qi_mask ((__v16qi) __A,
256							 (__v16qi)
257							 _mm_setzero_si128 (),
258							 (__mmask16) __U);
259}
260extern __inline __m128i
261__attribute__((__gnu_inline__, __always_inline__, __artificial__))
262_mm_mask_popcnt_epi16 (__m128i __W, __mmask8 __U, __m128i __A)
263{
264  return (__m128i) __builtin_ia32_vpopcountw_v8hi_mask ((__v8hi) __A,
265							(__v8hi) __W,
266							(__mmask8) __U);
267}
268
269extern __inline __m128i
270__attribute__((__gnu_inline__, __always_inline__, __artificial__))
271_mm_maskz_popcnt_epi16 (__mmask8 __U, __m128i __A)
272{
273  return (__m128i) __builtin_ia32_vpopcountw_v8hi_mask ((__v8hi) __A,
274							(__v8hi)
275							_mm_setzero_si128 (),
276							(__mmask8) __U);
277}
278#ifdef __DISABLE_AVX512BITALGVL__
279#undef __DISABLE_AVX512BITALGVL__
280#pragma GCC pop_options
281#endif /* __DISABLE_AVX512BITALGBW__ */
282
283#endif /* _AVX512BITALGINTRIN_H_INCLUDED */
284