1/* Copyright (C) 2017-2020 Free Software Foundation, Inc. 2 3 This file is part of GCC. 4 5 GCC is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 3, or (at your option) 8 any later version. 9 10 GCC is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 Under Section 7 of GPL version 3, you are granted additional 16 permissions described in the GCC Runtime Library Exception, version 17 3.1, as published by the Free Software Foundation. 18 19 You should have received a copy of the GNU General Public License and 20 a copy of the GCC Runtime Library Exception along with this program; 21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 22 <http://www.gnu.org/licenses/>. */ 23 24#if !defined _IMMINTRIN_H_INCLUDED 25# error "Never use <avx512bitalgintrin.h> directly; include <x86intrin.h> instead." 26#endif 27 28#ifndef _AVX512BITALGINTRIN_H_INCLUDED 29#define _AVX512BITALGINTRIN_H_INCLUDED 30 31#ifndef __AVX512BITALG__ 32#pragma GCC push_options 33#pragma GCC target("avx512bitalg") 34#define __DISABLE_AVX512BITALG__ 35#endif /* __AVX512BITALG__ */ 36 37extern __inline __m512i 38__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 39_mm512_popcnt_epi8 (__m512i __A) 40{ 41 return (__m512i) __builtin_ia32_vpopcountb_v64qi ((__v64qi) __A); 42} 43 44extern __inline __m512i 45__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 46_mm512_popcnt_epi16 (__m512i __A) 47{ 48 return (__m512i) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A); 49} 50 51#ifdef __DISABLE_AVX512BITALG__ 52#undef __DISABLE_AVX512BITALG__ 53#pragma GCC pop_options 54#endif /* __DISABLE_AVX512BITALG__ */ 55 56#if !defined(__AVX512BITALG__) || !defined(__AVX512BW__) 57#pragma GCC push_options 58#pragma GCC target("avx512bitalg,avx512bw") 59#define __DISABLE_AVX512BITALGBW__ 60#endif /* __AVX512VLBW__ */ 61 62extern __inline __m512i 63__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 64_mm512_mask_popcnt_epi8 (__m512i __W, __mmask64 __U, __m512i __A) 65{ 66 return (__m512i) __builtin_ia32_vpopcountb_v64qi_mask ((__v64qi) __A, 67 (__v64qi) __W, 68 (__mmask64) __U); 69} 70 71extern __inline __m512i 72__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 73_mm512_maskz_popcnt_epi8 (__mmask64 __U, __m512i __A) 74{ 75 return (__m512i) __builtin_ia32_vpopcountb_v64qi_mask ((__v64qi) __A, 76 (__v64qi) 77 _mm512_setzero_si512 (), 78 (__mmask64) __U); 79} 80extern __inline __m512i 81__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 82_mm512_mask_popcnt_epi16 (__m512i __W, __mmask32 __U, __m512i __A) 83{ 84 return (__m512i) __builtin_ia32_vpopcountw_v32hi_mask ((__v32hi) __A, 85 (__v32hi) __W, 86 (__mmask32) __U); 87} 88 89extern __inline __m512i 90__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 91_mm512_maskz_popcnt_epi16 (__mmask32 __U, __m512i __A) 92{ 93 return (__m512i) __builtin_ia32_vpopcountw_v32hi_mask ((__v32hi) __A, 94 (__v32hi) 95 _mm512_setzero_si512 (), 96 (__mmask32) __U); 97} 98 99extern __inline __mmask64 100__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 101_mm512_bitshuffle_epi64_mask (__m512i __A, __m512i __B) 102{ 103 return (__mmask64) __builtin_ia32_vpshufbitqmb512_mask ((__v64qi) __A, 104 (__v64qi) __B, 105 (__mmask64) -1); 106} 107 108extern __inline __mmask64 109__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 110_mm512_mask_bitshuffle_epi64_mask (__mmask64 __M, __m512i __A, __m512i __B) 111{ 112 return (__mmask64) __builtin_ia32_vpshufbitqmb512_mask ((__v64qi) __A, 113 (__v64qi) __B, 114 (__mmask64) __M); 115} 116 117#ifdef __DISABLE_AVX512BITALGBW__ 118#undef __DISABLE_AVX512BITALGBW__ 119#pragma GCC pop_options 120#endif /* __DISABLE_AVX512BITALGBW__ */ 121 122#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__) || !defined(__AVX512BW__) 123#pragma GCC push_options 124#pragma GCC target("avx512bitalg,avx512vl,avx512bw") 125#define __DISABLE_AVX512BITALGVLBW__ 126#endif /* __AVX512VLBW__ */ 127 128extern __inline __m256i 129__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 130_mm256_mask_popcnt_epi8 (__m256i __W, __mmask32 __U, __m256i __A) 131{ 132 return (__m256i) __builtin_ia32_vpopcountb_v32qi_mask ((__v32qi) __A, 133 (__v32qi) __W, 134 (__mmask32) __U); 135} 136 137extern __inline __m256i 138__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 139_mm256_maskz_popcnt_epi8 (__mmask32 __U, __m256i __A) 140{ 141 return (__m256i) __builtin_ia32_vpopcountb_v32qi_mask ((__v32qi) __A, 142 (__v32qi) 143 _mm256_setzero_si256 (), 144 (__mmask32) __U); 145} 146 147extern __inline __mmask32 148__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 149_mm256_bitshuffle_epi64_mask (__m256i __A, __m256i __B) 150{ 151 return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask ((__v32qi) __A, 152 (__v32qi) __B, 153 (__mmask32) -1); 154} 155 156extern __inline __mmask32 157__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 158_mm256_mask_bitshuffle_epi64_mask (__mmask32 __M, __m256i __A, __m256i __B) 159{ 160 return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask ((__v32qi) __A, 161 (__v32qi) __B, 162 (__mmask32) __M); 163} 164 165#ifdef __DISABLE_AVX512BITALGVLBW__ 166#undef __DISABLE_AVX512BITALGVLBW__ 167#pragma GCC pop_options 168#endif /* __DISABLE_AVX512BITALGVLBW__ */ 169 170 171#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__) 172#pragma GCC push_options 173#pragma GCC target("avx512bitalg,avx512vl") 174#define __DISABLE_AVX512BITALGVL__ 175#endif /* __AVX512VLBW__ */ 176 177extern __inline __mmask16 178__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 179_mm_bitshuffle_epi64_mask (__m128i __A, __m128i __B) 180{ 181 return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask ((__v16qi) __A, 182 (__v16qi) __B, 183 (__mmask16) -1); 184} 185 186extern __inline __mmask16 187__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 188_mm_mask_bitshuffle_epi64_mask (__mmask16 __M, __m128i __A, __m128i __B) 189{ 190 return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask ((__v16qi) __A, 191 (__v16qi) __B, 192 (__mmask16) __M); 193} 194 195extern __inline __m256i 196__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 197_mm256_popcnt_epi8 (__m256i __A) 198{ 199 return (__m256i) __builtin_ia32_vpopcountb_v32qi ((__v32qi) __A); 200} 201 202extern __inline __m256i 203__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 204_mm256_popcnt_epi16 (__m256i __A) 205{ 206 return (__m256i) __builtin_ia32_vpopcountw_v16hi ((__v16hi) __A); 207} 208 209extern __inline __m128i 210__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 211_mm_popcnt_epi8 (__m128i __A) 212{ 213 return (__m128i) __builtin_ia32_vpopcountb_v16qi ((__v16qi) __A); 214} 215 216extern __inline __m128i 217__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 218_mm_popcnt_epi16 (__m128i __A) 219{ 220 return (__m128i) __builtin_ia32_vpopcountw_v8hi ((__v8hi) __A); 221} 222 223extern __inline __m256i 224__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 225_mm256_mask_popcnt_epi16 (__m256i __W, __mmask16 __U, __m256i __A) 226{ 227 return (__m256i) __builtin_ia32_vpopcountw_v16hi_mask ((__v16hi) __A, 228 (__v16hi) __W, 229 (__mmask16) __U); 230} 231 232extern __inline __m256i 233__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 234_mm256_maskz_popcnt_epi16 (__mmask16 __U, __m256i __A) 235{ 236 return (__m256i) __builtin_ia32_vpopcountw_v16hi_mask ((__v16hi) __A, 237 (__v16hi) 238 _mm256_setzero_si256 (), 239 (__mmask16) __U); 240} 241 242extern __inline __m128i 243__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 244_mm_mask_popcnt_epi8 (__m128i __W, __mmask16 __U, __m128i __A) 245{ 246 return (__m128i) __builtin_ia32_vpopcountb_v16qi_mask ((__v16qi) __A, 247 (__v16qi) __W, 248 (__mmask16) __U); 249} 250 251extern __inline __m128i 252__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 253_mm_maskz_popcnt_epi8 (__mmask16 __U, __m128i __A) 254{ 255 return (__m128i) __builtin_ia32_vpopcountb_v16qi_mask ((__v16qi) __A, 256 (__v16qi) 257 _mm_setzero_si128 (), 258 (__mmask16) __U); 259} 260extern __inline __m128i 261__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 262_mm_mask_popcnt_epi16 (__m128i __W, __mmask8 __U, __m128i __A) 263{ 264 return (__m128i) __builtin_ia32_vpopcountw_v8hi_mask ((__v8hi) __A, 265 (__v8hi) __W, 266 (__mmask8) __U); 267} 268 269extern __inline __m128i 270__attribute__((__gnu_inline__, __always_inline__, __artificial__)) 271_mm_maskz_popcnt_epi16 (__mmask8 __U, __m128i __A) 272{ 273 return (__m128i) __builtin_ia32_vpopcountw_v8hi_mask ((__v8hi) __A, 274 (__v8hi) 275 _mm_setzero_si128 (), 276 (__mmask8) __U); 277} 278#ifdef __DISABLE_AVX512BITALGVL__ 279#undef __DISABLE_AVX512BITALGVL__ 280#pragma GCC pop_options 281#endif /* __DISABLE_AVX512BITALGBW__ */ 282 283#endif /* _AVX512BITALGINTRIN_H_INCLUDED */ 284