1/* Copyright (C) 2009-2020 Free Software Foundation, Inc. 2 Contributed by Anatoly Sokolov (aesok@post.ru) 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20#ifndef IN_GEN_AVR_MMCU_TEXI 21#define IN_TARGET_CODE 1 22 23#include "config.h" 24#include "system.h" 25#include "coretypes.h" 26#include "tm.h" 27#include "diagnostic.h" 28#endif /* IN_GEN_AVR_MMCU_TEXI */ 29 30#include "avr-arch.h" 31 32/* List of all known AVR MCU architectures. 33 Order as of enum avr_arch from avr.h. */ 34 35const avr_arch_t 36avr_arch_types[] = 37{ 38 /* unknown device specified */ 39 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, NULL, AVR_MMCU_DEFAULT }, 40 /* 41 A M J LM E E E X R T d S FPO S O A 42 S U M PO L L I M A I a t lMff F ff r 43 M L P MV P P J E M N t a a s R s c 44 XW M M M G P Y a r s e e h 45 X P A D t h t t ID */ 46 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "1", "avr1" }, 47 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "2", "avr2" }, 48 { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "25", "avr25" }, 49 { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "3", "avr3" }, 50 { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 0, 32, "31", "avr31" }, 51 { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "35", "avr35" }, 52 { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "4", "avr4" }, 53 { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "5", "avr5" }, 54 { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, 0, 32, "51", "avr51" }, 55 { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 0, 32, "6", "avr6" }, 56 57 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, 0x4000, 0, "100", "avrtiny" }, 58 { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0, 0, "102", "avrxmega2" }, 59 { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0x8000, 0, "103", "avrxmega3" }, 60 { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, 0, 0, "104", "avrxmega4" }, 61 { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, 0, 0, "105", "avrxmega5" }, 62 { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, 0, 0, "106", "avrxmega6" }, 63 { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, 0, 0, "107", "avrxmega7" } 64}; 65 66const avr_arch_info_t 67avr_texinfo[] = 68{ 69 { ARCH_AVR1, 70 "This ISA is implemented by the minimal AVR core and supported " 71 "for assembler only." }, 72 { ARCH_AVR2, 73 "``Classic'' devices with up to 8@tie{}KiB of program memory." }, 74 { ARCH_AVR25, 75 "``Classic'' devices with up to 8@tie{}KiB of program memory and with " 76 "the @code{MOVW} instruction." }, 77 { ARCH_AVR3, 78 "``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of " 79 "program memory." }, 80 { ARCH_AVR31, 81 "``Classic'' devices with 128@tie{}KiB of program memory." }, 82 { ARCH_AVR35, 83 "``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of " 84 "program memory and with the @code{MOVW} instruction." }, 85 { ARCH_AVR4, 86 "``Enhanced'' devices with up to 8@tie{}KiB of program memory." }, 87 { ARCH_AVR5, 88 "``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of " 89 "program memory." }, 90 { ARCH_AVR51, 91 "``Enhanced'' devices with 128@tie{}KiB of program memory." }, 92 { ARCH_AVR6, 93 "``Enhanced'' devices with 3-byte PC, i.e.@: with more than 128@tie{}KiB " 94 "of program memory." }, 95 { ARCH_AVRTINY, 96 "``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of " 97 "program memory." }, 98 { ARCH_AVRXMEGA2, 99 "``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB " 100 "of program memory." }, 101 { ARCH_AVRXMEGA3, 102 "``XMEGA'' devices with up to 64@tie{}KiB of combined program memory " 103 "and RAM, and with program memory visible in the RAM address space." }, 104 { ARCH_AVRXMEGA4, 105 "``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB " 106 "of program memory." }, 107 { ARCH_AVRXMEGA5, 108 "``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB " 109 "of program memory and more than 64@tie{}KiB of RAM." }, 110 { ARCH_AVRXMEGA6, 111 "``XMEGA'' devices with more than 128@tie{}KiB of program memory." }, 112 { ARCH_AVRXMEGA7, 113 "``XMEGA'' devices with more than 128@tie{}KiB of program memory " 114 "and more than 64@tie{}KiB of RAM." } 115}; 116 117const avr_mcu_t 118avr_mcu_types[] = 119{ 120#define AVR_MCU(NAME, ARCH, DEV_ATTRIBUTE, MACRO, DATA_SEC, TEXT_SEC, FLASH_SIZE, PMOFF) \ 121 { NAME, ARCH, DEV_ATTRIBUTE, MACRO, DATA_SEC, TEXT_SEC, FLASH_SIZE, PMOFF }, 122#include "avr-mcus.def" 123#undef AVR_MCU 124 /* End of list. */ 125 { NULL, ARCH_UNKNOWN, AVR_ISA_NONE, NULL, 0, 0, 0, 0 } 126}; 127 128 129 130 131#ifndef IN_GEN_AVR_MMCU_TEXI 132 133static char* 134avr_archs_str (void) 135{ 136 char *archs = concat ("", NULL); 137 138 // Build of core architectures' names. 139 140 for (const avr_mcu_t *mcu = avr_mcu_types; mcu->name; mcu++) 141 if (!mcu->macro) 142 archs = concat (archs, " ", avr_arch_types[mcu->arch_id].name, NULL); 143 144 return archs; 145} 146 147 148void 149avr_inform_core_architectures (void) 150{ 151 char *archs = avr_archs_str (); 152 inform (input_location, "supported core architectures:%s", archs); 153 free (archs); 154} 155 156#endif // IN_GEN_AVR_MMCU_TEXI 157