1/* Definitions of types that are used to store AVR architecture and
2   device information.
3   Copyright (C) 2012-2020 Free Software Foundation, Inc.
4   Contributed by Georg-Johann Lay (avr@gjlay.de)
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 3, or (at your option)
11any later version.
12
13GCC is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3.  If not see
20<http://www.gnu.org/licenses/>.  */
21
22#ifndef AVR_ARCH_H
23#define AVR_ARCH_H
24
25#define AVR_MMCU_DEFAULT "avr2"
26
27/* This enum supplies indices into the avr_arch_types[] table below. */
28
29enum avr_arch_id
30{
31  ARCH_UNKNOWN,
32  ARCH_AVR1,
33  ARCH_AVR2,
34  ARCH_AVR25,
35  ARCH_AVR3,
36  ARCH_AVR31,
37  ARCH_AVR35,
38  ARCH_AVR4,
39  ARCH_AVR5,
40  ARCH_AVR51,
41  ARCH_AVR6,
42  ARCH_AVRTINY,
43  ARCH_AVRXMEGA2,
44  ARCH_AVRXMEGA3,
45  ARCH_AVRXMEGA4,
46  ARCH_AVRXMEGA5,
47  ARCH_AVRXMEGA6,
48  ARCH_AVRXMEGA7
49};
50
51
52/* Architecture-specific properties.  */
53
54typedef struct
55{
56  /* Assembler only.  */
57  int asm_only;
58
59  /* Core have 'MUL*' instructions.  */
60  int have_mul;
61
62  /* Core have 'CALL' and 'JMP' instructions.  */
63  int have_jmp_call;
64
65  /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
66  int have_movw_lpmx;
67
68  /* Core have 'ELPM' instructions.  */
69  int have_elpm;
70
71  /* Core have 'ELPM Rx,Z' instructions.  */
72  int have_elpmx;
73
74  /* Core have 'EICALL' and 'EIJMP' instructions.  */
75  int have_eijmp_eicall;
76
77  /* This is an XMEGA core.  */
78  int xmega_p;
79
80  /* This core has the RAMPD special function register
81     and thus also the RAMPX, RAMPY and RAMPZ registers.  */
82  int have_rampd;
83
84  /* This is a TINY core. */
85  int tiny_p;
86
87  /* Default start of data section address for architecture.  */
88  int default_data_section_start;
89
90  /* Offset where flash memory is seen in RAM address range or 0.  */
91  int flash_pm_offset;
92
93  /* Offset between SFR address and RAM address:
94     SFR-address = RAM-address - sfr_offset  */
95  int sfr_offset;
96
97  /* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
98  const char *const macro;
99
100  /* Architecture name.  */
101  const char *const name;
102} avr_arch_t;
103
104
105/* Device-specific properties.  */
106
107typedef struct
108{
109  /* Device name.  */
110  const char *const name;
111
112  /* Index in avr_arch_types[].  */
113  enum avr_arch_id arch_id;
114
115  /* device specific feature */
116  int dev_attribute;
117
118  /* Must lie outside user's namespace.  NULL == no macro.  */
119  const char *const macro;
120
121  /* Start of data section.  */
122  int data_section_start;
123
124  /* Start of text section. */
125  int text_section_start;
126
127  /* Flash size in bytes.  */
128  int flash_size;
129
130  /* Offset where flash is seen in the RAM address space.  */
131  int flash_pm_offset;
132} avr_mcu_t;
133
134/* AVR device specific features.
135
136AVR_ISA_RMW
137  Only few avr devices have Read-Modify-Write (RMW) instructions
138  (XCH, LAC, LAS and LAT)
139
140AVR_SHORT_SP
141  Stack Pointer has only 8 bit width.
142  The device / multilib has an 8-bit stack pointer (no SPH).
143
144AVR_ERRATA_SKIP
145  Some AVR devices have a core erratum when skipping a 2-word instruction.
146  Skip instructions are:  SBRC, SBRS, SBIC, SBIS, CPSE.
147  Problems will occur with return address is IRQ executes during the
148  skip sequence.
149
150  A support ticket from Atmel returned the following information:
151
152     Subject: (ATTicket:644469) On AVR skip-bug core Erratum
153     From: avr@atmel.com                    Date: 2011-07-27
154     (Please keep the subject when replying to this mail)
155
156     This errata exists only in AT90S8515 and ATmega103 devices.
157
158     For information please refer the following respective errata links
159       http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
160       http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf
161
162AVR_ISA_RCALL
163  Always use RJMP / RCALL and assume JMP / CALL are not available.
164  This affects multilib selection via specs generation and -mshort-calls.
165  Even if a device like ATtiny417 from avrxmega3 supports JMP / CALL, we
166  assume these instructions are not available and we set the built-in
167  macro __AVR_HAVE_JMP_CALL__ accordingly.  This macro is used to
168  determine a rough estimate of flash size in libgcc, and AVR-LibC uses
169  this macro to determine vector sizes.  */
170
171enum avr_device_specific_features
172{
173  AVR_ISA_NONE,
174  AVR_ISA_RMW     = 0x1, /* device has RMW instructions. */
175  AVR_SHORT_SP    = 0x2, /* Stack Pointer has 8 bits width. */
176  AVR_ERRATA_SKIP = 0x4, /* device has a core erratum. */
177  AVR_ISA_LDS     = 0x8, /* whether LDS / STS is valid for all data in static
178                            storage.  Only useful for reduced Tiny.  */
179  AVR_ISA_RCALL   = 0x10 /* Use RJMP / RCALL even though JMP / CALL
180                            are available (-mshort-calls).  */
181};
182
183/* Map architecture to its texinfo string.  */
184
185typedef struct
186{
187  /* Architecture ID.  */
188  enum avr_arch_id arch_id;
189
190  /* textinfo source to describe the architecture.  */
191  const char *texinfo;
192} avr_arch_info_t;
193
194/* Preprocessor macros to define depending on MCU type.  */
195
196extern const avr_arch_t avr_arch_types[];
197extern const avr_arch_t *avr_arch;
198
199extern const avr_mcu_t avr_mcu_types[];
200
201extern void avr_inform_core_architectures (void);
202
203#endif /* AVR_ARCH_H */
204