arm.opt revision 1.6 
1; Options for the ARM port of the compiler.
2
3; Copyright (C) 2005-2016 Free Software Foundation, Inc.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 3, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15; for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21HeaderInclude
22config/arm/arm-opts.h
23
24Enum
25Name(tls_type) Type(enum arm_tls_type)
26TLS dialect to use:
27
28EnumValue
29Enum(tls_type) String(gnu) Value(TLS_GNU)
30
31EnumValue
32Enum(tls_type) String(gnu2) Value(TLS_GNU2)
33
34mabi=
35Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
36Specify an ABI.
37
38Enum
39Name(arm_abi_type) Type(enum arm_abi_type)
40Known ARM ABIs (for use with the -mabi= option):
41
42EnumValue
43Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
44
45EnumValue
46Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
47
48EnumValue
49Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
50
51EnumValue
52Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
53
54EnumValue
55Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
56
57mabort-on-noreturn
58Target Report Mask(ABORT_NORETURN)
59Generate a call to abort if a noreturn function returns.
60
61mapcs
62Target RejectNegative Mask(APCS_FRAME) Undocumented
63
64mapcs-float
65Target Report Mask(APCS_FLOAT)
66Pass FP arguments in FP registers.
67
68mapcs-frame
69Target Report Mask(APCS_FRAME)
70Generate APCS conformant stack frames.
71
72mapcs-reentrant
73Target Report Mask(APCS_REENT)
74Generate re-entrant, PIC code.
75
76mapcs-stack-check
77Target Report Mask(APCS_STACK) Undocumented
78
79march=
80Target RejectNegative ToLower Joined Enum(arm_arch) Var(arm_arch_option)
81Specify the name of the target architecture.
82
83; Other arm_arch values are loaded from arm-tables.opt
84; but that is a generated file and this is an odd-one-out.
85EnumValue
86Enum(arm_arch) String(native) Value(-1) DriverOnly
87
88marm
89Target Report RejectNegative InverseMask(THUMB)
90Generate code in 32 bit ARM state.
91
92mbig-endian
93Target Report RejectNegative Mask(BIG_END)
94Assume target CPU is configured as big endian.
95
96mcallee-super-interworking
97Target Report Mask(CALLEE_INTERWORKING)
98Thumb: Assume non-static functions may be called from ARM code.
99
100mcaller-super-interworking
101Target Report Mask(CALLER_INTERWORKING)
102Thumb: Assume function pointers may go to non-Thumb aware code.
103
104mcpu=
105Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none)
106Specify the name of the target CPU.
107
108mfloat-abi=
109Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
110Specify if floating point hardware should be used.
111
112Enum
113Name(float_abi_type) Type(enum float_abi_type)
114Known floating-point ABIs (for use with the -mfloat-abi= option):
115
116EnumValue
117Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
118
119EnumValue
120Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
121
122EnumValue
123Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
124
125mflip-thumb
126Target Report Var(TARGET_FLIP_THUMB) Undocumented
127Switch ARM/Thumb modes on alternating functions for compiler testing.
128
129mfp16-format=
130Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
131Specify the __fp16 floating-point format.
132
133Enum
134Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
135Known __fp16 formats (for use with the -mfp16-format= option):
136
137EnumValue
138Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
139
140EnumValue
141Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
142
143EnumValue
144Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
145
146mfpu=
147Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Save
148Specify the name of the target floating point hardware/format.
149
150mhard-float
151Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
152
153mlittle-endian
154Target Report RejectNegative InverseMask(BIG_END)
155Assume target CPU is configured as little endian.
156
157mlong-calls
158Target Report Mask(LONG_CALLS)
159Generate call insns as indirect calls, if necessary.
160
161mpic-data-is-text-relative
162Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
163Assume data segments are relative to text segment.
164
165mpic-register=
166Target RejectNegative Joined Var(arm_pic_register_string)
167Specify the register to be used for PIC addressing.
168
169mpoke-function-name
170Target Report Mask(POKE_FUNCTION_NAME)
171Store function names in object code.
172
173msched-prolog
174Target Report Mask(SCHED_PROLOG)
175Permit scheduling of a function's prologue sequence.
176
177msingle-pic-base
178Target Report Mask(SINGLE_PIC_BASE)
179Do not load the PIC register in function prologues.
180
181msoft-float
182Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
183
184mstructure-size-boundary=
185Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
186Specify the minimum bit alignment of structures.
187
188mthumb
189Target Report RejectNegative Mask(THUMB) Save
190Generate code for Thumb state.
191
192mthumb-interwork
193Target Report Mask(INTERWORK)
194Support calls between Thumb and ARM instruction sets.
195
196mtls-dialect=
197Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
198Specify thread local storage scheme.
199
200mtp=
201Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
202Specify how to access the thread pointer.
203
204Enum
205Name(arm_tp_type) Type(enum arm_tp_type)
206Valid arguments to -mtp=:
207
208EnumValue
209Enum(arm_tp_type) String(soft) Value(TP_SOFT)
210
211EnumValue
212Enum(arm_tp_type) String(auto) Value(TP_AUTO)
213
214EnumValue
215Enum(arm_tp_type) String(cp15) Value(TP_CP15)
216
217mtpcs-frame
218Target Report Mask(TPCS_FRAME)
219Thumb: Generate (non-leaf) stack frames even if not needed.
220
221mtpcs-leaf-frame
222Target Report Mask(TPCS_LEAF_FRAME)
223Thumb: Generate (leaf) stack frames even if not needed.
224
225mtune=
226Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(arm_none)
227Tune code for the given processor.
228
229mprint-tune-info
230Target Report RejectNegative Var(print_tune_info) Init(0)
231Print CPU tuning information as comment in assembler file.  This is
232an option used only for regression testing of the compiler and not
233intended for ordinary use in compiling code.
234
235; Other processor_type values are loaded from arm-tables.opt
236; but that is a generated file and this is an odd-one-out.
237EnumValue
238Enum(processor_type) String(native) Value(-1) DriverOnly
239
240mvectorize-with-neon-quad
241Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
242Use Neon quad-word (rather than double-word) registers for vectorization.
243
244mvectorize-with-neon-double
245Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
246Use Neon double-word (rather than quad-word) registers for vectorization.
247
248mword-relocations
249Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
250Only generate absolute relocations on word sized values.
251
252mrestrict-it
253Target Report Var(arm_restrict_it) Init(2) Save
254Generate IT blocks appropriate for ARMv8.
255
256mold-rtx-costs
257Target Report Mask(OLD_RTX_COSTS)
258Use the old RTX costing tables (transitional).
259
260mnew-generic-costs
261Target Report Mask(NEW_GENERIC_COSTS)
262Use the new generic RTX cost tables if new core-specific cost table not available (transitional).
263
264mfix-cortex-m3-ldrd
265Target Report Var(fix_cm3_ldrd) Init(2)
266Avoid overlapping destination and address registers on LDRD instructions
267that may trigger Cortex-M3 errata.
268
269munaligned-access
270Target Report Var(unaligned_access) Init(2) Save
271Enable unaligned word and halfword accesses to packed data.
272
273mneon-for-64bits
274Target Report RejectNegative Var(use_neon_for_64bits) Init(0)
275Use Neon to perform 64-bits operations rather than core registers.
276
277mslow-flash-data
278Target Report Var(target_slow_flash_data) Init(0)
279Assume loading data from flash is slower than fetching instructions.
280
281masm-syntax-unified
282Target Report Var(inline_asm_unified) Init(0) Save
283Assume unified syntax for inline assembly code.
284