arm.opt revision 1.5
1; Options for the ARM port of the compiler. 2 3; Copyright (C) 2005-2015 Free Software Foundation, Inc. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15; for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21HeaderInclude 22config/arm/arm-opts.h 23 24Enum 25Name(tls_type) Type(enum arm_tls_type) 26TLS dialect to use: 27 28EnumValue 29Enum(tls_type) String(gnu) Value(TLS_GNU) 30 31EnumValue 32Enum(tls_type) String(gnu2) Value(TLS_GNU2) 33 34mabi= 35Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI) 36Specify an ABI 37 38Enum 39Name(arm_abi_type) Type(enum arm_abi_type) 40Known ARM ABIs (for use with the -mabi= option): 41 42EnumValue 43Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS) 44 45EnumValue 46Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS) 47 48EnumValue 49Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS) 50 51EnumValue 52Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT) 53 54EnumValue 55Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX) 56 57mabort-on-noreturn 58Target Report Mask(ABORT_NORETURN) 59Generate a call to abort if a noreturn function returns 60 61mapcs 62Target RejectNegative Mask(APCS_FRAME) Undocumented 63 64mapcs-float 65Target Report Mask(APCS_FLOAT) 66Pass FP arguments in FP registers 67 68mapcs-frame 69Target Report Mask(APCS_FRAME) 70Generate APCS conformant stack frames 71 72mapcs-reentrant 73Target Report Mask(APCS_REENT) 74Generate re-entrant, PIC code 75 76mapcs-stack-check 77Target Report Mask(APCS_STACK) Undocumented 78 79march= 80Target RejectNegative ToLower Joined Enum(arm_arch) Var(arm_arch_option) 81Specify the name of the target architecture 82 83; Other arm_arch values are loaded from arm-tables.opt 84; but that is a generated file and this is an odd-one-out. 85EnumValue 86Enum(arm_arch) String(native) Value(-1) DriverOnly 87 88marm 89Target Report RejectNegative InverseMask(THUMB) 90Generate code in 32 bit ARM state. 91 92mbig-endian 93Target Report RejectNegative Mask(BIG_END) 94Assume target CPU is configured as big endian 95 96mcallee-super-interworking 97Target Report Mask(CALLEE_INTERWORKING) 98Thumb: Assume non-static functions may be called from ARM code 99 100mcaller-super-interworking 101Target Report Mask(CALLER_INTERWORKING) 102Thumb: Assume function pointers may go to non-Thumb aware code 103 104mcpu= 105Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none) 106Specify the name of the target CPU 107 108mfloat-abi= 109Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI) 110Specify if floating point hardware should be used 111 112Enum 113Name(float_abi_type) Type(enum float_abi_type) 114Known floating-point ABIs (for use with the -mfloat-abi= option): 115 116EnumValue 117Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT) 118 119EnumValue 120Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP) 121 122EnumValue 123Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD) 124 125mfp16-format= 126Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE) 127Specify the __fp16 floating-point format 128 129Enum 130Name(arm_fp16_format_type) Type(enum arm_fp16_format_type) 131Known __fp16 formats (for use with the -mfp16-format= option): 132 133EnumValue 134Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE) 135 136EnumValue 137Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE) 138 139EnumValue 140Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE) 141 142mfpu= 143Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) 144Specify the name of the target floating point hardware/format 145 146mhard-float 147Target RejectNegative Alias(mfloat-abi=, hard) Undocumented 148 149mlittle-endian 150Target Report RejectNegative InverseMask(BIG_END) 151Assume target CPU is configured as little endian 152 153mlong-calls 154Target Report Mask(LONG_CALLS) 155Generate call insns as indirect calls, if necessary 156 157mpic-data-is-text-relative 158Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE) 159Assume data segments are relative to text segment. 160 161mpic-register= 162Target RejectNegative Joined Var(arm_pic_register_string) 163Specify the register to be used for PIC addressing 164 165mpoke-function-name 166Target Report Mask(POKE_FUNCTION_NAME) 167Store function names in object code 168 169msched-prolog 170Target Report Mask(SCHED_PROLOG) 171Permit scheduling of a function's prologue sequence 172 173msingle-pic-base 174Target Report Mask(SINGLE_PIC_BASE) 175Do not load the PIC register in function prologues 176 177msoft-float 178Target RejectNegative Alias(mfloat-abi=, soft) Undocumented 179 180mstructure-size-boundary= 181Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY) 182Specify the minimum bit alignment of structures 183 184mthumb 185Target Report RejectNegative Mask(THUMB) 186Generate code for Thumb state 187 188mthumb-interwork 189Target Report Mask(INTERWORK) 190Support calls between Thumb and ARM instruction sets 191 192mtls-dialect= 193Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU) 194Specify thread local storage scheme 195 196mtp= 197Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO) 198Specify how to access the thread pointer 199 200Enum 201Name(arm_tp_type) Type(enum arm_tp_type) 202Valid arguments to -mtp=: 203 204EnumValue 205Enum(arm_tp_type) String(soft) Value(TP_SOFT) 206 207EnumValue 208Enum(arm_tp_type) String(auto) Value(TP_AUTO) 209 210EnumValue 211Enum(arm_tp_type) String(cp15) Value(TP_CP15) 212 213mtpcs-frame 214Target Report Mask(TPCS_FRAME) 215Thumb: Generate (non-leaf) stack frames even if not needed 216 217mtpcs-leaf-frame 218Target Report Mask(TPCS_LEAF_FRAME) 219Thumb: Generate (leaf) stack frames even if not needed 220 221mtune= 222Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(arm_none) 223Tune code for the given processor 224 225mprint-tune-info 226Target Report RejectNegative Var(print_tune_info) Init(0) 227Print CPU tuning information as comment in assembler file. This is 228an option used only for regression testing of the compiler and not 229intended for ordinary use in compiling code. 230 231; Other processor_type values are loaded from arm-tables.opt 232; but that is a generated file and this is an odd-one-out. 233EnumValue 234Enum(processor_type) String(native) Value(-1) DriverOnly 235 236mvectorize-with-neon-quad 237Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE) 238Use Neon quad-word (rather than double-word) registers for vectorization 239 240mvectorize-with-neon-double 241Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE) 242Use Neon double-word (rather than quad-word) registers for vectorization 243 244mword-relocations 245Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS) 246Only generate absolute relocations on word sized values. 247 248mrestrict-it 249Target Report Var(arm_restrict_it) Init(2) 250Generate IT blocks appropriate for ARMv8. 251 252mold-rtx-costs 253Target Report Mask(OLD_RTX_COSTS) 254Use the old RTX costing tables (transitional). 255 256mnew-generic-costs 257Target Report Mask(NEW_GENERIC_COSTS) 258Use the new generic RTX cost tables if new core-specific cost table not available (transitional). 259 260mfix-cortex-m3-ldrd 261Target Report Var(fix_cm3_ldrd) Init(2) 262Avoid overlapping destination and address registers on LDRD instructions 263that may trigger Cortex-M3 errata. 264 265munaligned-access 266Target Report Var(unaligned_access) Init(2) 267Enable unaligned word and halfword accesses to packed data. 268 269mneon-for-64bits 270Target Report RejectNegative Var(use_neon_for_64bits) Init(0) 271Use Neon to perform 64-bits operations rather than core registers. 272 273mslow-flash-data 274Target Report Var(target_slow_flash_data) Init(0) 275Assume loading data from flash is slower than fetching instructions. 276 277masm-syntax-unified 278Target Report Var(inline_asm_unified) Init(0) 279Assume unified syntax for Thumb inline assembly code. 280