arm.opt revision 1.10 
1; Options for the ARM port of the compiler.
2
3; Copyright (C) 2005-2019 Free Software Foundation, Inc.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 3, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15; for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21HeaderInclude
22config/arm/arm-opts.h
23
24TargetSave
25const char *x_arm_arch_string
26
27TargetSave
28const char *x_arm_cpu_string
29
30TargetSave
31const char *x_arm_tune_string
32
33Enum
34Name(tls_type) Type(enum arm_tls_type)
35TLS dialect to use:
36
37EnumValue
38Enum(tls_type) String(gnu) Value(TLS_GNU)
39
40EnumValue
41Enum(tls_type) String(gnu2) Value(TLS_GNU2)
42
43mabi=
44Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
45Specify an ABI.
46
47Enum
48Name(arm_abi_type) Type(enum arm_abi_type)
49Known ARM ABIs (for use with the -mabi= option):
50
51EnumValue
52Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
53
54EnumValue
55Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
56
57EnumValue
58Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
59
60EnumValue
61Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
62
63EnumValue
64Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
65
66mabort-on-noreturn
67Target Report Mask(ABORT_NORETURN)
68Generate a call to abort if a noreturn function returns.
69
70mapcs
71Target RejectNegative Mask(APCS_FRAME) Undocumented
72
73mapcs-frame
74Target Report Mask(APCS_FRAME)
75Generate APCS conformant stack frames.
76
77mapcs-reentrant
78Target Report Mask(APCS_REENT)
79Generate re-entrant, PIC code.
80
81mapcs-stack-check
82Target Report Mask(APCS_STACK) Undocumented
83
84march=
85Target RejectNegative Negative(march=) ToLower Joined Var(arm_arch_string)
86Specify the name of the target architecture.
87
88; Other arm_arch values are loaded from arm-tables.opt
89; but that is a generated file and this is an odd-one-out.
90EnumValue
91Enum(arm_arch) String(native) Value(-1) DriverOnly
92
93marm
94Target Report RejectNegative Negative(mthumb) InverseMask(THUMB)
95Generate code in 32 bit ARM state.
96
97mbig-endian
98Target Report RejectNegative Negative(mlittle-endian) Mask(BIG_END)
99Assume target CPU is configured as big endian.
100
101mcallee-super-interworking
102Target Report Mask(CALLEE_INTERWORKING)
103Thumb: Assume non-static functions may be called from ARM code.
104
105mcaller-super-interworking
106Target Report Mask(CALLER_INTERWORKING)
107Thumb: Assume function pointers may go to non-Thumb aware code.
108
109mcpu=
110Target RejectNegative Negative(mcpu=) ToLower Joined Var(arm_cpu_string)
111Specify the name of the target CPU.
112
113mfloat-abi=
114Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
115Specify if floating point hardware should be used.
116
117mcmse
118Target RejectNegative Var(use_cmse)
119Specify that the compiler should target secure code as per ARMv8-M Security Extensions.
120
121Enum
122Name(float_abi_type) Type(enum float_abi_type)
123Known floating-point ABIs (for use with the -mfloat-abi= option):
124
125EnumValue
126Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
127
128EnumValue
129Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
130
131EnumValue
132Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
133
134mflip-thumb
135Target Report Var(TARGET_FLIP_THUMB) Undocumented
136Switch ARM/Thumb modes on alternating functions for compiler testing.
137
138mfp16-format=
139Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
140Specify the __fp16 floating-point format.
141
142Enum
143Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
144Known __fp16 formats (for use with the -mfp16-format= option):
145
146EnumValue
147Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
148
149EnumValue
150Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
151
152EnumValue
153Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
154
155mfpu=
156Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Init(TARGET_FPU_auto) Save
157Specify the name of the target floating point hardware/format.
158
159mhard-float
160Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
161
162mlittle-endian
163Target Report RejectNegative Negative(mbig-endian) InverseMask(BIG_END)
164Assume target CPU is configured as little endian.
165
166mlong-calls
167Target Report Mask(LONG_CALLS)
168Generate call insns as indirect calls, if necessary.
169
170mpic-data-is-text-relative
171Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
172Assume data segments are relative to text segment.
173
174mpic-register=
175Target RejectNegative Joined Var(arm_pic_register_string)
176Specify the register to be used for PIC addressing.
177
178mpoke-function-name
179Target Report Mask(POKE_FUNCTION_NAME)
180Store function names in object code.
181
182msched-prolog
183Target Report Mask(SCHED_PROLOG)
184Permit scheduling of a function's prologue sequence.
185
186msingle-pic-base
187Target Report Mask(SINGLE_PIC_BASE)
188Do not load the PIC register in function prologues.
189
190msoft-float
191Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
192
193mstructure-size-boundary=
194Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
195Specify the minimum bit alignment of structures. (Deprecated).
196
197mthumb
198Target Report RejectNegative Negative(marm) Mask(THUMB) Save
199Generate code for Thumb state.
200
201mthumb-interwork
202Target Report Mask(INTERWORK)
203Support calls between Thumb and ARM instruction sets.
204
205mtls-dialect=
206Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
207Specify thread local storage scheme.
208
209mtp=
210Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
211Specify how to access the thread pointer.
212
213Enum
214Name(arm_tp_type) Type(enum arm_tp_type)
215Valid arguments to -mtp=:
216
217EnumValue
218Enum(arm_tp_type) String(soft) Value(TP_SOFT)
219
220EnumValue
221Enum(arm_tp_type) String(auto) Value(TP_AUTO)
222
223EnumValue
224Enum(arm_tp_type) String(cp15) Value(TP_CP15)
225
226mtpcs-frame
227Target Report Mask(TPCS_FRAME)
228Thumb: Generate (non-leaf) stack frames even if not needed.
229
230mtpcs-leaf-frame
231Target Report Mask(TPCS_LEAF_FRAME)
232Thumb: Generate (leaf) stack frames even if not needed.
233
234mtune=
235Target RejectNegative Negative(mtune=) ToLower Joined Var(arm_tune_string)
236Tune code for the given processor.
237
238mprint-tune-info
239Target Report RejectNegative Var(print_tune_info) Init(0)
240Print CPU tuning information as comment in assembler file.  This is
241an option used only for regression testing of the compiler and not
242intended for ordinary use in compiling code.
243
244; Other processor_type values are loaded from arm-tables.opt
245; but that is a generated file and this is an odd-one-out.
246EnumValue
247Enum(processor_type) String(native) Value(-1) DriverOnly
248
249mvectorize-with-neon-quad
250Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
251Use Neon quad-word (rather than double-word) registers for vectorization.
252
253mvectorize-with-neon-double
254Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
255Use Neon double-word (rather than quad-word) registers for vectorization.
256
257mverbose-cost-dump
258Common Undocumented Var(arm_verbose_cost) Init(0)
259Enable more verbose RTX cost dumps during debug.  For GCC developers use only.
260
261mword-relocations
262Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
263Only generate absolute relocations on word sized values.
264
265mrestrict-it
266Target Report Var(arm_restrict_it) Init(2) Save
267Generate IT blocks appropriate for ARMv8.
268
269mfix-cortex-m3-ldrd
270Target Report Var(fix_cm3_ldrd) Init(2)
271Avoid overlapping destination and address registers on LDRD instructions
272that may trigger Cortex-M3 errata.
273
274munaligned-access
275Target Report Var(unaligned_access) Init(2) Save
276Enable unaligned word and halfword accesses to packed data.
277
278mneon-for-64bits
279Target Report RejectNegative Var(use_neon_for_64bits) Init(0)
280Use Neon to perform 64-bits operations rather than core registers.
281
282mslow-flash-data
283Target Report Var(target_slow_flash_data) Init(0)
284Assume loading data from flash is slower than fetching instructions.
285
286masm-syntax-unified
287Target Report Var(inline_asm_unified) Init(0) Save
288Assume unified syntax for inline assembly code.
289
290mpure-code
291Target Report Var(target_pure_code) Init(0)
292Do not allow constant data to be placed in code sections.
293
294mbe8
295Target Report RejectNegative Negative(mbe32) Mask(BE8)
296When linking for big-endian targets, generate a BE8 format image.
297
298mbe32
299Target Report RejectNegative Negative(mbe8) InverseMask(BE8)
300When linking for big-endian targets, generate a legacy BE32 format image.
301
302mbranch-cost=
303Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
304Cost to assume for a branch insn.
305
306mgeneral-regs-only
307Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
308Generate code which uses the core registers only (r0-r14).
309