1;; DFA scheduling description of the Synopsys DesignWare ARC EM cpu
2;; for GNU C compiler
3;; Copyright (C) 2007-2020 Free Software Foundation, Inc.
4;; Contributor: Claudiu Zissulescu <claudiu.zissulescu@synopsys.com>
5
6;; This file is part of GCC.
7
8;; GCC is free software; you can redistribute it and/or modify
9;; it under the terms of the GNU General Public License as published by
10;; the Free Software Foundation; either version 3, or (at your option)
11;; any later version.
12
13;; GCC is distributed in the hope that it will be useful,
14;; but WITHOUT ANY WARRANTY; without even the implied warranty of
15;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16;; GNU General Public License for more details.
17
18;; You should have received a copy of the GNU General Public License
19;; along with GCC; see the file COPYING3.  If not see
20;; <http://www.gnu.org/licenses/>.
21
22(define_automaton "ARCEM")
23
24(define_cpu_unit "em_issue, ld_st, mul_em, divrem_em" "ARCEM")
25
26(define_insn_reservation "em_data_load" 2
27  (and (match_test "TARGET_EM")
28       (eq_attr "type" "load"))
29  "em_issue+ld_st,nothing")
30
31(define_insn_reservation "em_data_store" 1
32  (and (match_test "TARGET_EM")
33       (eq_attr "type" "store"))
34  "em_issue+ld_st")
35
36;; Multipliers options
37(define_insn_reservation "mul_em_mpyw_1" 1
38  (and (match_test "TARGET_EM")
39       (match_test "arc_mpy_option > 0")
40       (match_test "arc_mpy_option <= 2")
41       (eq_attr "type" "mul16_em"))
42  "em_issue+mul_em")
43
44(define_insn_reservation "mul_em_mpyw_2" 2
45  (and (match_test "TARGET_EM")
46       (match_test "arc_mpy_option > 2")
47       (match_test "arc_mpy_option <= 5")
48       (eq_attr "type" "mul16_em"))
49  "em_issue+mul_em, nothing")
50
51(define_insn_reservation "mul_em_mpyw_4" 4
52  (and (match_test "TARGET_EM")
53       (match_test "arc_mpy_option == 6")
54       (eq_attr "type" "mul16_em"))
55  "em_issue+mul_em, mul_em*3")
56
57(define_insn_reservation "mul_em_multi_wlh1" 1
58  (and (match_test "TARGET_EM")
59       (match_test "arc_mpy_option == 2")
60       (eq_attr "type" "multi,umulti"))
61  "em_issue+mul_em")
62
63(define_insn_reservation "mul_em_multi_wlh2" 2
64  (and (match_test "TARGET_EM")
65       (match_test "arc_mpy_option == 3")
66       (eq_attr "type" "multi,umulti"))
67  "em_issue+mul_em, nothing")
68
69(define_insn_reservation "mul_em_multi_wlh3" 3
70  (and (match_test "TARGET_EM")
71       (match_test "arc_mpy_option == 4")
72       (eq_attr "type" "multi,umulti"))
73  "em_issue+mul_em, mul_em*2")
74
75;; FIXME! Make the difference between MPY and MPYM for WLH4
76(define_insn_reservation "mul_em_multi_wlh4" 4
77  (and (match_test "TARGET_EM")
78       (match_test "arc_mpy_option == 5")
79       (eq_attr "type" "multi,umulti"))
80  "em_issue+mul_em, mul_em*4")
81
82(define_insn_reservation "mul_em_multi_wlh5" 9
83  (and (match_test "TARGET_EM")
84       (match_test "arc_mpy_option == 6")
85       (eq_attr "type" "multi,umulti"))
86  "em_issue+mul_em, mul_em*8")
87
88;; Radix-4 divider timing
89(define_insn_reservation "em_divrem" 3
90  (and (match_test "TARGET_EM")
91       (match_test "TARGET_DIVREM")
92       (eq_attr "type" "div_rem"))
93  "em_issue+mul_em+divrem_em, (mul_em+divrem_em)*2")
94