arc-simd.h revision 1.3
119370Spst/* Synopsys DesignWare ARC SIMD include file. 219370Spst Copyright (C) 2007-2017 Free Software Foundation, Inc. 3130803Smarcel Written by Saurabh Verma (saurabh.verma@celunite.com) on behalf os Synopsys 4130803Smarcel Inc. 5130803Smarcel 6130803Smarcel This file is part of GCC. 798944Sobrien 819370Spst GCC is free software; you can redistribute it and/or modify it 998944Sobrien under the terms of the GNU General Public License as published 1098944Sobrien by the Free Software Foundation; either version 3, or (at your 1198944Sobrien option) any later version. 1298944Sobrien 1319370Spst GCC is distributed in the hope that it will be useful, but WITHOUT 1498944Sobrien ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 1598944Sobrien or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 1698944Sobrien License for more details. 1798944Sobrien 1819370Spst You should have received a copy of the GNU General Public License 1998944Sobrien along with GCC; see the file COPYING3. If not see 2098944Sobrien <http://www.gnu.org/licenses/>. */ 2198944Sobrien 2298944Sobrien/* As a special exception, if you include this header file into source 2319370Spst files compiled by GCC, this header file does not by itself cause 2419370Spst the resulting executable to be covered by the GNU General Public 2519370Spst License. This exception does not however invalidate any other 2619370Spst reasons why the executable file might be covered by the GNU General 2719370Spst Public License. */ 2819370Spst 2919370Spst#ifndef _ARC_SIMD_H 3019370Spst#define _ARC_SIMD_H 1 3119370Spst 3219370Spst#ifndef __ARC_SIMD__ 3398944Sobrien#error Use the "-msimd" flag to enable ARC SIMD support 3446283Sdfr#endif 3598944Sobrien 3698944Sobrien/* I0-I7 registers. */ 37130803Smarcel#define _IREG_I0 0 38130803Smarcel#define _IREG_I1 1 3919370Spst#define _IREG_I2 2 4019370Spst#define _IREG_I3 3 4119370Spst#define _IREG_I4 4 4219370Spst#define _IREG_I5 5 4319370Spst#define _IREG_I6 6 4419370Spst#define _IREG_I7 7 4519370Spst 4619370Spst/* DMA configuration registers. */ 4719370Spst#define _DMA_REG_DR0 0 4898944Sobrien#define _DMA_SDM_SRC_ADR_REG _DMA_REG_DR0 4919370Spst#define _DMA_SDM_DEST_ADR_REG _DMA_REG_DR0 5019370Spst 5119370Spst#define _DMA_REG_DR1 1 52130803Smarcel#define _DMA_SDM_STRIDE_REG _DMA_REG_DR1 5319370Spst 5419370Spst#define _DMA_REG_DR2 2 55130803Smarcel#define _DMA_BLK_REG _DMA_REG_DR2 56130803Smarcel 57130803Smarcel#define _DMA_REG_DR3 3 5819370Spst#define _DMA_LOC_REG _DMA_REG_DR3 5919370Spst 6019370Spst#define _DMA_REG_DR4 4 6119370Spst#define _DMA_SYS_SRC_ADR_REG _DMA_REG_DR4 62130803Smarcel#define _DMA_SYS_DEST_ADR_REG _DMA_REG_DR4 6319370Spst 6419370Spst#define _DMA_REG_DR5 5 6519370Spst#define _DMA_SYS_STRIDE_REG _DMA_REG_DR5 6698944Sobrien 6719370Spst#define _DMA_REG_DR6 6 6819370Spst#define _DMA_CFG_REG _DMA_REG_DR6 6919370Spst 7098944Sobrien#define _DMA_REG_DR7 7 7119370Spst#define _DMA_FT_BASE_ADR_REG _DMA_REG_DR7 7219370Spst 7319370Spst/* Predefined types used in vector instructions. */ 7419370Spsttypedef int __v4si __attribute__((vector_size(16))); 7519370Spsttypedef short __v8hi __attribute__((vector_size(16))); 7619370Spst 7719370Spst/* Synonyms */ 7898944Sobrien#define _vaddaw __builtin_arc_vaddaw 7919370Spst#define _vaddw __builtin_arc_vaddw 8019370Spst#define _vavb __builtin_arc_vavb 8119370Spst#define _vavrb __builtin_arc_vavrb 8219370Spst#define _vdifaw __builtin_arc_vdifaw 8319370Spst#define _vdifw __builtin_arc_vdifw 8419370Spst#define _vmaxaw __builtin_arc_vmaxaw 8546283Sdfr#define _vmaxw __builtin_arc_vmaxw 86130803Smarcel#define _vminaw __builtin_arc_vminaw 8719370Spst#define _vminw __builtin_arc_vminw 8846283Sdfr#define _vmulaw __builtin_arc_vmulaw 89130803Smarcel#define _vmulfaw __builtin_arc_vmulfaw 90130803Smarcel#define _vmulfw __builtin_arc_vmulfw 91130803Smarcel#define _vmulw __builtin_arc_vmulw 9219370Spst#define _vsubaw __builtin_arc_vsubaw 9346283Sdfr#define _vsubw __builtin_arc_vsubw 9419370Spst#define _vsummw __builtin_arc_vsummw 9519370Spst#define _vand __builtin_arc_vand 96130803Smarcel#define _vandaw __builtin_arc_vandaw 9719370Spst#define _vbic __builtin_arc_vbic 9819370Spst#define _vbicaw __builtin_arc_vbicaw 9919370Spst#define _vor __builtin_arc_vor 10019370Spst#define _vxor __builtin_arc_vxor 10198944Sobrien#define _vxoraw __builtin_arc_vxoraw 10219370Spst#define _veqw __builtin_arc_veqw 10319370Spst#define _vlew __builtin_arc_vlew 10419370Spst#define _vltw __builtin_arc_vltw 10519370Spst#define _vnew __builtin_arc_vnew 10619370Spst#define _vmr1aw __builtin_arc_vmr1aw 10719370Spst#define _vmr1w __builtin_arc_vmr1w 10819370Spst#define _vmr2aw __builtin_arc_vmr2aw 10919370Spst#define _vmr2w __builtin_arc_vmr2w 11019370Spst#define _vmr3aw __builtin_arc_vmr3aw 11119370Spst#define _vmr3w __builtin_arc_vmr3w 11219370Spst#define _vmr4aw __builtin_arc_vmr4aw 11319370Spst#define _vmr4w __builtin_arc_vmr4w 11419370Spst#define _vmr5aw __builtin_arc_vmr5aw 11519370Spst#define _vmr5w __builtin_arc_vmr5w 11619370Spst#define _vmr6aw __builtin_arc_vmr6aw 11719370Spst#define _vmr6w __builtin_arc_vmr6w 11819370Spst#define _vmr7aw __builtin_arc_vmr7aw 11919370Spst#define _vmr7w __builtin_arc_vmr7w 120130803Smarcel#define _vmrb __builtin_arc_vmrb 12119370Spst#define _vh264f __builtin_arc_vh264f 12219370Spst#define _vh264ft __builtin_arc_vh264ft 12319370Spst#define _vh264fw __builtin_arc_vh264fw 12419370Spst#define _vvc1f __builtin_arc_vvc1f 12519370Spst#define _vvc1ft __builtin_arc_vvc1ft 12698944Sobrien#define _vbaddw __builtin_arc_vbaddw 12719370Spst#define _vbmaxw __builtin_arc_vbmaxw 12819370Spst#define _vbminw __builtin_arc_vbminw 12919370Spst#define _vbmulaw __builtin_arc_vbmulaw 13019370Spst#define _vbmulfw __builtin_arc_vbmulfw 13119370Spst#define _vbmulw __builtin_arc_vbmulw 13219370Spst#define _vbrsubw __builtin_arc_vbrsubw 13319370Spst#define _vbsubw __builtin_arc_vbsubw 13419370Spst#define _vasrw __builtin_arc_vasrw 13519370Spst#define _vsr8 __builtin_arc_vsr8 13619370Spst#define _vsr8aw __builtin_arc_vsr8aw 13719370Spst#define _vasrrwi __builtin_arc_vasrrwi 13819370Spst#define _vasrsrwi __builtin_arc_vasrsrwi 13919370Spst#define _vasrwi __builtin_arc_vasrwi 14019370Spst#define _vasrpwbi __builtin_arc_vasrpwbi 14119370Spst#define _vasrrpwbi __builtin_arc_vasrrpwbi 14219370Spst#define _vsr8awi __builtin_arc_vsr8awi 14319370Spst#define _vsr8i __builtin_arc_vsr8i 14419370Spst#define _vmvaw __builtin_arc_vmvaw 14519370Spst#define _vmvw __builtin_arc_vmvw 14619370Spst#define _vmvzw __builtin_arc_vmvzw 14719370Spst#define _vd6tapf __builtin_arc_vd6tapf 14819370Spst#define _vmovaw __builtin_arc_vmovaw 14919370Spst#define _vmovw __builtin_arc_vmovw 15019370Spst#define _vmovzw __builtin_arc_vmovzw 15119370Spst#define _vabsaw __builtin_arc_vabsaw 15219370Spst#define _vabsw __builtin_arc_vabsw 15319370Spst#define _vaddsuw __builtin_arc_vaddsuw 15419370Spst#define _vsignw __builtin_arc_vsignw 15519370Spst#define _vexch1 __builtin_arc_vexch1 15619370Spst#define _vexch2 __builtin_arc_vexch2 15719370Spst#define _vexch4 __builtin_arc_vexch4 15819370Spst#define _vupbaw __builtin_arc_vupbaw 15919370Spst#define _vupbw __builtin_arc_vupbw 16019370Spst#define _vupsbaw __builtin_arc_vupsbaw 16119370Spst#define _vupsbw __builtin_arc_vupsbw 16219370Spst#define _vdirun __builtin_arc_vdirun 16398944Sobrien#define _vdorun __builtin_arc_vdorun 16498944Sobrien#define _vdiwr __builtin_arc_vdiwr 16598944Sobrien#define _vdowr __builtin_arc_vdowr 16698944Sobrien#define _vrec __builtin_arc_vrec 167130803Smarcel#define _vrun __builtin_arc_vrun 16898944Sobrien#define _vrecrun __builtin_arc_vrecrun 16998944Sobrien#define _vendrec __builtin_arc_vendrec 17098944Sobrien#define _vld32wh __builtin_arc_vld32wh 17198944Sobrien#define _vld32wl __builtin_arc_vld32wl 17298944Sobrien#define _vld64 __builtin_arc_vld64 17398944Sobrien#define _vld32 __builtin_arc_vld32 17498944Sobrien#define _vld64w __builtin_arc_vld64w 17598944Sobrien#define _vld128 __builtin_arc_vld128 17698944Sobrien#define _vst128 __builtin_arc_vst128 17798944Sobrien#define _vst64 __builtin_arc_vst64 17898944Sobrien#define _vst16_n __builtin_arc_vst16_n 17919370Spst#define _vst32_n __builtin_arc_vst32_n 18098944Sobrien#define _vinti __builtin_arc_vinti 18119370Spst 18219370Spst/* Additional synonyms to ease programming. */ 18398944Sobrien#define _setup_dma_in_channel_reg _vdiwr 18419370Spst#define _setup_dma_out_channel_reg _vdowr 18519370Spst 18619370Spst#endif /* _ARC_SIMD_H */ 18719370Spst