aarch64-opts.h revision 1.6 
1/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
2   Contributed by ARM Ltd.
3
4   This file is part of GCC.
5
6   GCC is free software; you can redistribute it and/or modify it
7   under the terms of the GNU General Public License as published
8   by the Free Software Foundation; either version 3, or (at your
9   option) any later version.
10
11   GCC is distributed in the hope that it will be useful, but WITHOUT
12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14   License for more details.
15
16   You should have received a copy of the GNU General Public License
17   along with GCC; see the file COPYING3.  If not see
18   <http://www.gnu.org/licenses/>.  */
19
20/* Definitions for option handling for AArch64.  */
21
22#ifndef GCC_AARCH64_OPTS_H
23#define GCC_AARCH64_OPTS_H
24
25/* The various cores that implement AArch64.  */
26enum aarch64_processor
27{
28#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
29  INTERNAL_IDENT,
30#include "aarch64-cores.def"
31  /* Used to indicate that no processor has been specified.  */
32  generic,
33  /* Used to mark the end of the processor table.  */
34  aarch64_none
35};
36
37enum aarch64_arch
38{
39#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
40  AARCH64_ARCH_##ARCH_IDENT,
41#include "aarch64-arches.def"
42  aarch64_no_arch
43};
44
45/* TLS types.  */
46enum aarch64_tls_type {
47  TLS_TRADITIONAL,
48  TLS_DESCRIPTORS
49};
50
51/* The code model defines the address generation strategy.
52   Most have a PIC and non-PIC variant.  */
53enum aarch64_code_model {
54  /* Static code and data fit within a 1MB region.
55     Not fully implemented, mostly treated as SMALL.  */
56  AARCH64_CMODEL_TINY,
57  /* Static code, data and GOT/PLT fit within a 1MB region.
58     Not fully implemented, mostly treated as SMALL_PIC.  */
59  AARCH64_CMODEL_TINY_PIC,
60  /* Static code and data fit within a 4GB region.
61     The default non-PIC code model.  */
62  AARCH64_CMODEL_SMALL,
63  /* Static code, data and GOT/PLT fit within a 4GB region.
64     The default PIC code model.  */
65  AARCH64_CMODEL_SMALL_PIC,
66  /* -fpic for small memory model.
67     GOT size to 28KiB (4K*8-4K) or 3580 entries.  */
68  AARCH64_CMODEL_SMALL_SPIC,
69  /* No assumptions about addresses of code and data.
70     The PIC variant is not yet implemented.  */
71  AARCH64_CMODEL_LARGE
72};
73
74/* Function types -msign-return-address should sign.  */
75enum aarch64_function_type {
76  /* Don't sign any function.  */
77  AARCH64_FUNCTION_NONE,
78  /* Non-leaf functions.  */
79  AARCH64_FUNCTION_NON_LEAF,
80  /* All functions.  */
81  AARCH64_FUNCTION_ALL
82};
83
84#endif
85