xtensa.h revision 1.1.1.4
1238106Sdes/* Xtensa ELF support for BFD.
2238106Sdes   Copyright (C) 2003-2016 Free Software Foundation, Inc.
3238106Sdes   Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
4238106Sdes
5238106Sdes   This file is part of BFD, the Binary File Descriptor library.
6238106Sdes
7238106Sdes   This program is free software; you can redistribute it and/or modify
8238106Sdes   it under the terms of the GNU General Public License as published by
9238106Sdes   the Free Software Foundation; either version 3 of the License, or
10238106Sdes   (at your option) any later version.
11238106Sdes
12238106Sdes   This program is distributed in the hope that it will be useful,
13238106Sdes   but WITHOUT ANY WARRANTY; without even the implied warranty of
14238106Sdes   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15238106Sdes   GNU General Public License for more details.
16238106Sdes
17238106Sdes   You should have received a copy of the GNU General Public License
18238106Sdes   along with this program; if not, write to the Free Software
19238106Sdes   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
20238106Sdes   USA.  */
21238106Sdes
22238106Sdes/* This file holds definitions specific to the Xtensa ELF ABI.  */
23238106Sdes
24269257Sdes#ifndef _ELF_XTENSA_H
25269257Sdes#define _ELF_XTENSA_H
26269257Sdes
27269257Sdes#include "elf/reloc-macros.h"
28269257Sdes
29269257Sdes#ifdef __cplusplus
30269257Sdesextern "C" {
31269257Sdes#endif
32269257Sdes
33269257Sdes/* Relocations.  */
34238106SdesSTART_RELOC_NUMBERS (elf_xtensa_reloc_type)
35238106Sdes     RELOC_NUMBER (R_XTENSA_NONE, 0)
36238106Sdes     RELOC_NUMBER (R_XTENSA_32, 1)
37238106Sdes     RELOC_NUMBER (R_XTENSA_RTLD, 2)
38238106Sdes     RELOC_NUMBER (R_XTENSA_GLOB_DAT, 3)
39238106Sdes     RELOC_NUMBER (R_XTENSA_JMP_SLOT, 4)
40238106Sdes     RELOC_NUMBER (R_XTENSA_RELATIVE, 5)
41238106Sdes     RELOC_NUMBER (R_XTENSA_PLT, 6)
42238106Sdes     RELOC_NUMBER (R_XTENSA_OP0, 8)
43238106Sdes     RELOC_NUMBER (R_XTENSA_OP1, 9)
44238106Sdes     RELOC_NUMBER (R_XTENSA_OP2, 10)
45238106Sdes     RELOC_NUMBER (R_XTENSA_ASM_EXPAND, 11)
46238106Sdes     RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12)
47238106Sdes     RELOC_NUMBER (R_XTENSA_32_PCREL, 14)
48238106Sdes     RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15)
49238106Sdes     RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16)
50238106Sdes     RELOC_NUMBER (R_XTENSA_DIFF8, 17)
51238106Sdes     RELOC_NUMBER (R_XTENSA_DIFF16, 18)
52238106Sdes     RELOC_NUMBER (R_XTENSA_DIFF32, 19)
53238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT0_OP, 20)
54238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT1_OP, 21)
55238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT2_OP, 22)
56238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT3_OP, 23)
57238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT4_OP, 24)
58238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT5_OP, 25)
59238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT6_OP, 26)
60238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT7_OP, 27)
61238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT8_OP, 28)
62238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT9_OP, 29)
63238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT10_OP, 30)
64238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT11_OP, 31)
65238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT12_OP, 32)
66238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT13_OP, 33)
67238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT14_OP, 34)
68238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT0_ALT, 35)
69238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT1_ALT, 36)
70238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT2_ALT, 37)
71238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT3_ALT, 38)
72238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT4_ALT, 39)
73238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT5_ALT, 40)
74238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT6_ALT, 41)
75238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT7_ALT, 42)
76238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT8_ALT, 43)
77238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT9_ALT, 44)
78238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT10_ALT, 45)
79238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT11_ALT, 46)
80238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47)
81238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48)
82238106Sdes     RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49)
83238106Sdes     RELOC_NUMBER (R_XTENSA_TLSDESC_FN, 50)
84238106Sdes     RELOC_NUMBER (R_XTENSA_TLSDESC_ARG, 51)
85238106Sdes     RELOC_NUMBER (R_XTENSA_TLS_DTPOFF, 52)
86238106Sdes     RELOC_NUMBER (R_XTENSA_TLS_TPOFF, 53)
87238106Sdes     RELOC_NUMBER (R_XTENSA_TLS_FUNC, 54)
88238106Sdes     RELOC_NUMBER (R_XTENSA_TLS_ARG, 55)
89238106Sdes     RELOC_NUMBER (R_XTENSA_TLS_CALL, 56)
90238106SdesEND_RELOC_NUMBERS (R_XTENSA_max)
91238106Sdes
92238106Sdes/* Processor-specific flags for the ELF header e_flags field.  */
93238106Sdes
94238106Sdes/* Four-bit Xtensa machine type field.  */
95238106Sdes#define EF_XTENSA_MACH			0x0000000f
96238106Sdes
97238106Sdes/* Various CPU types.  */
98238106Sdes#define E_XTENSA_MACH			0x00000000
99238106Sdes
100238106Sdes/* Leave bits 0xf0 alone in case we ever have more than 16 cpu types.
101238106Sdes   Highly unlikely, but what the heck.  */
102238106Sdes
103238106Sdes#define EF_XTENSA_XT_INSN		0x00000100
104238106Sdes#define EF_XTENSA_XT_LIT		0x00000200
105238106Sdes
106238106Sdes
107238106Sdes/* Processor-specific dynamic array tags.  */
108238106Sdes
109238106Sdes/* Offset of the table that records the GOT location(s).  */
110238106Sdes#define DT_XTENSA_GOT_LOC_OFF		0x70000000
111238106Sdes
112238106Sdes/* Number of entries in the GOT location table.  */
113238106Sdes#define DT_XTENSA_GOT_LOC_SZ		0x70000001
114238106Sdes
115238106Sdes
116238106Sdes/* Definitions for instruction and literal property tables.  The
117238106Sdes   tables for ".gnu.linkonce.*" sections are placed in the following
118238106Sdes   sections:
119238106Sdes
120238106Sdes   instruction tables:	.gnu.linkonce.x.*
121238106Sdes   literal tables:	.gnu.linkonce.p.*
122238106Sdes*/
123238106Sdes
124238106Sdes#define XTENSA_INSN_SEC_NAME ".xt.insn"
125238106Sdes#define XTENSA_LIT_SEC_NAME  ".xt.lit"
126238106Sdes#define XTENSA_PROP_SEC_NAME ".xt.prop"
127238106Sdes
128238106Sdestypedef struct property_table_entry_t
129238106Sdes{
130238106Sdes  bfd_vma address;
131238106Sdes  bfd_vma size;
132238106Sdes  flagword flags;
133238106Sdes} property_table_entry;
134238106Sdes
135238106Sdes/* Flags in the property tables to specify whether blocks of memory are
136238106Sdes   literals, instructions, data, or unreachable.  For instructions,
137238106Sdes   blocks that begin loop targets and branch targets are designated.
138238106Sdes   Blocks that do not allow density instructions, instruction reordering
139238106Sdes   or transformation are also specified.  Finally, for branch targets,
140238106Sdes   branch target alignment priority is included.  Alignment of the next
141238106Sdes   block is specified in the current block and the size of the current
142238106Sdes   block does not include any fill required to align to the next
143238106Sdes   block.  */
144238106Sdes
145238106Sdes#define XTENSA_PROP_LITERAL		0x00000001
146238106Sdes#define XTENSA_PROP_INSN		0x00000002
147238106Sdes#define XTENSA_PROP_DATA		0x00000004
148238106Sdes#define XTENSA_PROP_UNREACHABLE		0x00000008
149238106Sdes/* Instruction-only properties at beginning of code. */
150238106Sdes#define XTENSA_PROP_INSN_LOOP_TARGET	0x00000010
151238106Sdes#define XTENSA_PROP_INSN_BRANCH_TARGET	0x00000020
152238106Sdes/* Instruction-only properties about code. */
153238106Sdes#define XTENSA_PROP_INSN_NO_DENSITY	0x00000040
154238106Sdes#define XTENSA_PROP_INSN_NO_REORDER	0x00000080
155238106Sdes/* Historically, NO_TRANSFORM was a property of instructions,
156238106Sdes   but it should apply to literals under certain circumstances.  */
157238106Sdes#define XTENSA_PROP_NO_TRANSFORM	0x00000100
158238106Sdes
159238106Sdes/*  Branch target alignment information.  This transmits information
160238106Sdes    to the linker optimization about the priority of aligning a
161238106Sdes    particular block for branch target alignment: None, low priority,
162238106Sdes    high priority, or required.  These only need to be checked in
163238106Sdes    instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
164238106Sdes    Common usage is:
165238106Sdes
166238106Sdes    switch (GET_XTENSA_PROP_BT_ALIGN(flags))
167238106Sdes    case XTENSA_PROP_BT_ALIGN_NONE:
168238106Sdes    case XTENSA_PROP_BT_ALIGN_LOW:
169238106Sdes    case XTENSA_PROP_BT_ALIGN_HIGH:
170238106Sdes    case XTENSA_PROP_BT_ALIGN_REQUIRE:
171238106Sdes*/
172238106Sdes#define XTENSA_PROP_BT_ALIGN_MASK       0x00000600
173238106Sdes
174238106Sdes/* No branch target alignment.  */
175238106Sdes#define XTENSA_PROP_BT_ALIGN_NONE       0x0
176238106Sdes/* Low priority branch target alignment.  */
177238106Sdes#define XTENSA_PROP_BT_ALIGN_LOW        0x1
178238106Sdes/* High priority branch target alignment. */
179238106Sdes#define XTENSA_PROP_BT_ALIGN_HIGH       0x2
180238106Sdes/* Required branch target alignment.  */
181238106Sdes#define XTENSA_PROP_BT_ALIGN_REQUIRE    0x3
182238106Sdes
183238106Sdes#define GET_XTENSA_PROP_BT_ALIGN(flag) \
184238106Sdes  (((unsigned)((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)
185238106Sdes#define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
186238106Sdes  (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
187238106Sdes    (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
188238106Sdes
189238106Sdes/* Alignment is specified in the block BEFORE the one that needs
190238106Sdes   alignment.  Up to 5 bits.  Use GET_XTENSA_PROP_ALIGNMENT(flags) to
191238106Sdes   get the required alignment specified as a power of 2.  Use
192285206Sdes   SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
193238106Sdes   alignment.  Be careful of side effects since the SET will evaluate
194238106Sdes   flags twice.  Also, note that the SIZE of a block in the property
195238106Sdes   table does not include the alignment size, so the alignment fill
196238106Sdes   must be calculated to determine if two blocks are contiguous.
197238106Sdes   TEXT_ALIGN is not currently implemented but is a placeholder for a
198238106Sdes   possible future implementation.  */
199238106Sdes
200238106Sdes#define XTENSA_PROP_ALIGN		0x00000800
201238106Sdes
202238106Sdes#define XTENSA_PROP_ALIGNMENT_MASK      0x0001f000
203238106Sdes
204238106Sdes#define GET_XTENSA_PROP_ALIGNMENT(flag) \
205238106Sdes  (((unsigned)((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)
206238106Sdes#define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
207238106Sdes  (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
208238106Sdes    (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
209238106Sdes
210238106Sdes#define XTENSA_PROP_INSN_ABSLIT        0x00020000
211238106Sdes
212238106Sdesextern asection *xtensa_make_property_section (asection *, const char *);
213238106Sdes
214238106Sdes#ifdef __cplusplus
215238106Sdes}
216238106Sdes#endif
217269257Sdes
218238106Sdes#endif /* _ELF_XTENSA_H */
219238106Sdes