1/* tc-mcore.c -- Assemble code for M*Core 2 Copyright (C) 1999-2022 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to the Free 18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 19 02110-1301, USA. */ 20 21#include "as.h" 22#include "subsegs.h" 23#define DEFINE_TABLE 24#include "../opcodes/mcore-opc.h" 25#include "safe-ctype.h" 26 27#ifdef OBJ_ELF 28#include "elf/mcore.h" 29#endif 30 31#ifndef streq 32#define streq(a,b) (strcmp (a, b) == 0) 33#endif 34 35/* Forward declarations for dumb compilers. */ 36 37/* Several places in this file insert raw instructions into the 38 object. They should use MCORE_INST_XXX macros to get the opcodes 39 and then use these two macros to crack the MCORE_INST value into 40 the appropriate byte values. */ 41#define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF)) 42#define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF)) 43 44const char comment_chars[] = "#/"; 45const char line_separator_chars[] = ";"; 46const char line_comment_chars[] = "#/"; 47 48static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ 49static int sifilter_mode = 0; 50 51const char EXP_CHARS[] = "eE"; 52 53/* Chars that mean this number is a floating point constant 54 As in 0f12.456 55 or 0d1.2345e12 */ 56const char FLT_CHARS[] = "rRsSfFdDxXpP"; 57 58#define C(what,length) (((what) << 2) + (length)) 59#define GET_WHAT(x) ((x >> 2)) 60 61/* These are the two types of relaxable instruction. */ 62#define COND_JUMP 1 63#define UNCD_JUMP 2 64 65#define UNDEF_DISP 0 66#define DISP12 1 67#define DISP32 2 68#define UNDEF_WORD_DISP 3 69 70#define C12_LEN 2 71#define C32_LEN 10 /* Allow for align. */ 72#define U12_LEN 2 73#define U32_LEN 8 /* Allow for align. */ 74 75typedef enum 76{ 77 M210, 78 M340 79} 80cpu_type; 81 82cpu_type cpu = M340; 83 84/* Initialize the relax table. */ 85const relax_typeS md_relax_table[] = 86{ 87 { 0, 0, 0, 0 }, 88 { 0, 0, 0, 0 }, 89 { 0, 0, 0, 0 }, 90 { 0, 0, 0, 0 }, 91 92 /* COND_JUMP */ 93 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 94 { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */ 95 { 0, 0, C32_LEN, 0 }, /* DISP32 */ 96 { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */ 97 98 /* UNCD_JUMP */ 99 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 100 { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */ 101 { 0, 0, U32_LEN, 0 }, /* DISP32 */ 102 { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */ 103 104}; 105 106/* Literal pool data structures. */ 107struct literal 108{ 109 unsigned short refcnt; 110 unsigned char ispcrel; 111 unsigned char unused; 112 expressionS e; 113}; 114 115#define MAX_POOL_SIZE (1024/4) 116static struct literal litpool [MAX_POOL_SIZE]; 117static unsigned poolsize; 118static unsigned poolnumber; 119static unsigned long poolspan; 120 121/* SPANPANIC: the point at which we get too scared and force a dump 122 of the literal pool, and perhaps put a branch in place. 123 Calculated as: 124 1024 span of lrw/jmpi/jsri insn (actually span+1) 125 -2 possible alignment at the insn. 126 -2 possible alignment to get the table aligned. 127 -2 an inserted branch around the table. 128 == 1018 129 at 1018, we might be in trouble. 130 -- so we have to be smaller than 1018 and since we deal with 2-byte 131 instructions, the next good choice is 1016. 132 -- Note we have a test case that fails when we've got 1018 here. */ 133#define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ 134#define SPANCLOSE (900) 135#define SPANEXIT (600) 136static symbolS * poolsym; /* Label for current pool. */ 137static char poolname[8]; 138static htab_t opcode_hash_control; /* Opcode mnemonics. */ 139 140#define POOL_END_LABEL ".LE" 141#define POOL_START_LABEL ".LS" 142 143static void 144make_name (char * s, const char * p, int n) 145{ 146 static const char hex[] = "0123456789ABCDEF"; 147 148 s[0] = p[0]; 149 s[1] = p[1]; 150 s[2] = p[2]; 151 s[3] = hex[(n >> 12) & 0xF]; 152 s[4] = hex[(n >> 8) & 0xF]; 153 s[5] = hex[(n >> 4) & 0xF]; 154 s[6] = hex[(n) & 0xF]; 155 s[7] = 0; 156} 157 158static void 159dump_literals (int isforce) 160{ 161 unsigned int i; 162 struct literal * p; 163 symbolS * brarsym = NULL; 164 165 if (poolsize == 0) 166 return; 167 168 /* Must we branch around the literal table? */ 169 if (isforce) 170 { 171 char * output; 172 char brarname[8]; 173 174 make_name (brarname, POOL_END_LABEL, poolnumber); 175 176 brarsym = symbol_make (brarname); 177 178 symbol_table_insert (brarsym); 179 180 output = frag_var (rs_machine_dependent, 181 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 182 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 183 C (UNCD_JUMP, 0), brarsym, 0, 0); 184 output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */ 185 output[1] = INST_BYTE1 (MCORE_INST_BR); 186 } 187 188 /* Make sure that the section is sufficiently aligned and that 189 the literal table is aligned within it. */ 190 record_alignment (now_seg, 2); 191 frag_align (2, 0, 0); 192 193 colon (S_GET_NAME (poolsym)); 194 195 for (i = 0, p = litpool; i < poolsize; i++, p++) 196 emit_expr (& p->e, 4); 197 198 if (brarsym != NULL) 199 colon (S_GET_NAME (brarsym)); 200 201 poolsize = 0; 202} 203 204static void 205mcore_s_literals (int ignore ATTRIBUTE_UNUSED) 206{ 207 dump_literals (0); 208 demand_empty_rest_of_line (); 209} 210 211/* Perform FUNC (ARG), and track number of bytes added to frag. */ 212 213static void 214mcore_pool_count (void (*func) (int), int arg) 215{ 216 const fragS *curr_frag = frag_now; 217 offsetT added = -frag_now_fix_octets (); 218 219 (*func) (arg); 220 221 while (curr_frag != frag_now) 222 { 223 added += curr_frag->fr_fix; 224 curr_frag = curr_frag->fr_next; 225 } 226 227 added += frag_now_fix_octets (); 228 poolspan += added; 229} 230 231static void 232check_literals (int kind, int offset) 233{ 234 poolspan += offset; 235 236 /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC. 237 SPANPANIC means that we must dump now. 238 kind == 0 is any old instruction. 239 kind > 0 means we just had a control transfer instruction. 240 kind == 1 means within a function 241 kind == 2 means we just left a function 242 243 The dump_literals (1) call inserts a branch around the table, so 244 we first look to see if it's a situation where we won't have to 245 insert a branch (e.g., the previous instruction was an unconditional 246 branch). 247 248 SPANPANIC is the point where we must dump a single-entry pool. 249 it accounts for alignments and an inserted branch. 250 the 'poolsize*2' accounts for the scenario where we do: 251 lrw r1,lit1; lrw r2,lit2; lrw r3,lit3 252 Note that the 'lit2' reference is 2 bytes further along 253 but the literal it references will be 4 bytes further along, 254 so we must consider the poolsize into this equation. 255 This is slightly over-cautious, but guarantees that we won't 256 panic because a relocation is too distant. */ 257 258 if (poolspan > SPANCLOSE && kind > 0) 259 dump_literals (0); 260 else if (poolspan > SPANEXIT && kind > 1) 261 dump_literals (0); 262 else if (poolspan >= (SPANPANIC - poolsize * 2)) 263 dump_literals (1); 264} 265 266static void 267mcore_cons (int nbytes) 268{ 269 if (now_seg == text_section) 270 mcore_pool_count (cons, nbytes); 271 else 272 cons (nbytes); 273 274 /* In theory we ought to call check_literals (2,0) here in case 275 we need to dump the literal table. We cannot do this however, 276 as the directives that we are intercepting may be being used 277 to build a switch table, and we must not interfere with its 278 contents. Instead we cross our fingers and pray... */ 279} 280 281static void 282mcore_float_cons (int float_type) 283{ 284 if (now_seg == text_section) 285 mcore_pool_count (float_cons, float_type); 286 else 287 float_cons (float_type); 288 289 /* See the comment in mcore_cons () about calling check_literals. 290 It is unlikely that a switch table will be constructed using 291 floating point values, but it is still likely that an indexed 292 table of floating point constants is being created by these 293 directives, so again we must not interfere with their placement. */ 294} 295 296static void 297mcore_stringer (int append_zero) 298{ 299 if (now_seg == text_section) 300 mcore_pool_count (stringer, append_zero); 301 else 302 stringer (append_zero); 303 304 /* We call check_literals here in case a large number of strings are 305 being placed into the text section with a sequence of stringer 306 directives. In theory we could be upsetting something if these 307 strings are actually in an indexed table instead of referenced by 308 individual labels. Let us hope that that never happens. */ 309 check_literals (2, 0); 310} 311 312static void 313mcore_fill (int unused) 314{ 315 if (now_seg == text_section) 316 mcore_pool_count (s_fill, unused); 317 else 318 s_fill (unused); 319 320 check_literals (2, 0); 321} 322 323/* Handle the section changing pseudo-ops. These call through to the 324 normal implementations, but they dump the literal pool first. */ 325 326static void 327mcore_s_text (int ignore) 328{ 329 dump_literals (0); 330 331#ifdef OBJ_ELF 332 obj_elf_text (ignore); 333#else 334 s_text (ignore); 335#endif 336} 337 338static void 339mcore_s_data (int ignore) 340{ 341 dump_literals (0); 342 343#ifdef OBJ_ELF 344 obj_elf_data (ignore); 345#else 346 s_data (ignore); 347#endif 348} 349 350static void 351mcore_s_section (int ignore) 352{ 353 /* Scan forwards to find the name of the section. If the section 354 being switched to is ".line" then this is a DWARF1 debug section 355 which is arbitrarily placed inside generated code. In this case 356 do not dump the literal pool because it is a) inefficient and 357 b) would require the generation of extra code to jump around the 358 pool. */ 359 char * ilp = input_line_pointer; 360 361 while (*ilp != 0 && ISSPACE (*ilp)) 362 ++ ilp; 363 364 if (startswith (ilp, ".line") 365 && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r')) 366 ; 367 else 368 dump_literals (0); 369 370#ifdef OBJ_ELF 371 obj_elf_section (ignore); 372#endif 373#ifdef OBJ_COFF 374 obj_coff_section (ignore); 375#endif 376} 377 378static void 379mcore_s_bss (int needs_align) 380{ 381 dump_literals (0); 382 383 s_lcomm_bytes (needs_align); 384} 385 386#ifdef OBJ_ELF 387static void 388mcore_s_comm (int needs_align) 389{ 390 dump_literals (0); 391 392 obj_elf_common (needs_align); 393} 394#endif 395 396/* This table describes all the machine specific pseudo-ops the assembler 397 has to support. The fields are: 398 Pseudo-op name without dot 399 Function to call to execute this pseudo-op 400 Integer arg to pass to the function. */ 401const pseudo_typeS md_pseudo_table[] = 402{ 403 { "export", s_globl, 0 }, 404 { "import", s_ignore, 0 }, 405 { "literals", mcore_s_literals, 0 }, 406 { "page", listing_eject, 0 }, 407 408 /* The following are to intercept the placement of data into the text 409 section (eg addresses for a switch table), so that the space they 410 occupy can be taken into account when deciding whether or not to 411 dump the current literal pool. 412 XXX - currently we do not cope with the .space and .dcb.d directives. */ 413 { "ascii", mcore_stringer, 8 + 0 }, 414 { "asciz", mcore_stringer, 8 + 1 }, 415 { "byte", mcore_cons, 1 }, 416 { "dc", mcore_cons, 2 }, 417 { "dc.b", mcore_cons, 1 }, 418 { "dc.d", mcore_float_cons, 'd'}, 419 { "dc.l", mcore_cons, 4 }, 420 { "dc.s", mcore_float_cons, 'f'}, 421 { "dc.w", mcore_cons, 2 }, 422 { "dc.x", mcore_float_cons, 'x'}, 423 { "double", mcore_float_cons, 'd'}, 424 { "float", mcore_float_cons, 'f'}, 425 { "hword", mcore_cons, 2 }, 426 { "int", mcore_cons, 4 }, 427 { "long", mcore_cons, 4 }, 428 { "octa", mcore_cons, 16 }, 429 { "quad", mcore_cons, 8 }, 430 { "short", mcore_cons, 2 }, 431 { "single", mcore_float_cons, 'f'}, 432 { "string", mcore_stringer, 8 + 1 }, 433 { "word", mcore_cons, 2 }, 434 { "fill", mcore_fill, 0 }, 435 436 /* Allow for the effect of section changes. */ 437 { "text", mcore_s_text, 0 }, 438 { "data", mcore_s_data, 0 }, 439 { "bss", mcore_s_bss, 1 }, 440#ifdef OBJ_ELF 441 { "comm", mcore_s_comm, 0 }, 442#endif 443 { "section", mcore_s_section, 0 }, 444 { "section.s", mcore_s_section, 0 }, 445 { "sect", mcore_s_section, 0 }, 446 { "sect.s", mcore_s_section, 0 }, 447 448 { 0, 0, 0 } 449}; 450 451/* This function is called once, at assembler startup time. This should 452 set up all the tables, etc that the MD part of the assembler needs. */ 453 454void 455md_begin (void) 456{ 457 const char * prev_name = ""; 458 unsigned int i; 459 460 opcode_hash_control = str_htab_create (); 461 462 /* Insert unique names into hash table. */ 463 for (i = 0; i < ARRAY_SIZE (mcore_table); i++) 464 { 465 if (! streq (prev_name, mcore_table[i].name)) 466 { 467 prev_name = mcore_table[i].name; 468 str_hash_insert (opcode_hash_control, mcore_table[i].name, 469 &mcore_table[i], 0); 470 } 471 } 472} 473 474/* Get a log2(val). */ 475 476static int 477mylog2 (unsigned int val) 478{ 479 int log = -1; 480 481 while (val != 0) 482 { 483 log ++; 484 val >>= 1; 485 } 486 487 return log; 488} 489 490/* Try to parse a reg name. */ 491 492static char * 493parse_reg (char * s, unsigned * reg) 494{ 495 /* Strip leading whitespace. */ 496 while (ISSPACE (* s)) 497 ++ s; 498 499 if (TOLOWER (s[0]) == 'r') 500 { 501 if (s[1] == '1' && s[2] >= '0' && s[2] <= '5') 502 { 503 *reg = 10 + s[2] - '0'; 504 return s + 3; 505 } 506 507 if (s[1] >= '0' && s[1] <= '9') 508 { 509 *reg = s[1] - '0'; 510 return s + 2; 511 } 512 } 513 else if ( TOLOWER (s[0]) == 's' 514 && TOLOWER (s[1]) == 'p' 515 && ! ISALNUM (s[2])) 516 { 517 * reg = 0; 518 return s + 2; 519 } 520 521 as_bad (_("register expected, but saw '%.6s'"), s); 522 return s; 523} 524 525static struct Cregs 526{ 527 const char * name; 528 unsigned int crnum; 529} 530cregs[] = 531{ 532 { "psr", 0}, 533 { "vbr", 1}, 534 { "epsr", 2}, 535 { "fpsr", 3}, 536 { "epc", 4}, 537 { "fpc", 5}, 538 { "ss0", 6}, 539 { "ss1", 7}, 540 { "ss2", 8}, 541 { "ss3", 9}, 542 { "ss4", 10}, 543 { "gcr", 11}, 544 { "gsr", 12}, 545 { "", 0} 546}; 547 548static char * 549parse_creg (char * s, unsigned * reg) 550{ 551 int i; 552 553 /* Strip leading whitespace. */ 554 while (ISSPACE (* s)) 555 ++s; 556 557 if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r')) 558 { 559 if (s[2] == '3' && s[3] >= '0' && s[3] <= '1') 560 { 561 *reg = 30 + s[3] - '0'; 562 return s + 4; 563 } 564 565 if (s[2] == '2' && s[3] >= '0' && s[3] <= '9') 566 { 567 *reg = 20 + s[3] - '0'; 568 return s + 4; 569 } 570 571 if (s[2] == '1' && s[3] >= '0' && s[3] <= '9') 572 { 573 *reg = 10 + s[3] - '0'; 574 return s + 4; 575 } 576 577 if (s[2] >= '0' && s[2] <= '9') 578 { 579 *reg = s[2] - '0'; 580 return s + 3; 581 } 582 } 583 584 /* Look at alternate creg names before giving error. */ 585 for (i = 0; cregs[i].name[0] != '\0'; i++) 586 { 587 char buf [10]; 588 int length; 589 int j; 590 591 length = strlen (cregs[i].name); 592 593 for (j = 0; j < length; j++) 594 buf[j] = TOLOWER (s[j]); 595 596 if (strncmp (cregs[i].name, buf, length) == 0) 597 { 598 *reg = cregs[i].crnum; 599 return s + length; 600 } 601 } 602 603 as_bad (_("control register expected, but saw '%.6s'"), s); 604 605 return s; 606} 607 608static char * 609parse_psrmod (char * s, unsigned * reg) 610{ 611 int i; 612 char buf[10]; 613 static struct psrmods 614 { 615 const char * name; 616 unsigned int value; 617 } 618 psrmods[] = 619 { 620 { "ie", 1 }, 621 { "fe", 2 }, 622 { "ee", 4 }, 623 { "af", 8 } /* Really 0 and non-combinable. */ 624 }; 625 626 for (i = 0; i < 2; i++) 627 buf[i] = TOLOWER (s[i]); 628 629 for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;) 630 { 631 if (! strncmp (psrmods[i].name, buf, 2)) 632 { 633 * reg = psrmods[i].value; 634 635 return s + 2; 636 } 637 } 638 639 as_bad (_("bad/missing psr specifier")); 640 641 * reg = 0; 642 643 return s; 644} 645 646static char * 647parse_exp (char * s, expressionS * e) 648{ 649 char * save; 650 char * new_pointer; 651 652 /* Skip whitespace. */ 653 while (ISSPACE (* s)) 654 ++ s; 655 656 save = input_line_pointer; 657 input_line_pointer = s; 658 659 expression (e); 660 661 if (e->X_op == O_absent) 662 as_bad (_("missing operand")); 663 664 new_pointer = input_line_pointer; 665 input_line_pointer = save; 666 667 return new_pointer; 668} 669 670static int 671enter_literal (expressionS * e, int ispcrel) 672{ 673 unsigned int i; 674 struct literal * p; 675 676 if (poolsize >= MAX_POOL_SIZE - 2) 677 /* The literal pool is as full as we can handle. We have 678 to be 2 entries shy of the 1024/4=256 entries because we 679 have to allow for the branch (2 bytes) and the alignment 680 (2 bytes before the first insn referencing the pool and 681 2 bytes before the pool itself) == 6 bytes, rounds up 682 to 2 entries. */ 683 dump_literals (1); 684 685 if (poolsize == 0) 686 { 687 /* Create new literal pool. */ 688 if (++ poolnumber > 0xFFFF) 689 as_fatal (_("more than 65K literal pools")); 690 691 make_name (poolname, POOL_START_LABEL, poolnumber); 692 poolsym = symbol_make (poolname); 693 symbol_table_insert (poolsym); 694 poolspan = 0; 695 } 696 697 /* Search pool for value so we don't have duplicates. */ 698 for (p = litpool, i = 0; i < poolsize; i++, p++) 699 { 700 if (e->X_op == p->e.X_op 701 && e->X_add_symbol == p->e.X_add_symbol 702 && e->X_add_number == p->e.X_add_number 703 && ispcrel == p->ispcrel) 704 { 705 p->refcnt ++; 706 return i; 707 } 708 } 709 710 p->refcnt = 1; 711 p->ispcrel = ispcrel; 712 p->e = * e; 713 714 poolsize ++; 715 716 return i; 717} 718 719/* Parse a literal specification. -- either new or old syntax. 720 old syntax: the user supplies the label and places the literal. 721 new syntax: we put it into the literal pool. */ 722 723static char * 724parse_rt (char * s, 725 char ** outputp, 726 int ispcrel, 727 expressionS * ep) 728{ 729 expressionS e; 730 int n; 731 732 if (ep) 733 /* Indicate nothing there. */ 734 ep->X_op = O_absent; 735 736 if (*s == '[') 737 { 738 s = parse_exp (s + 1, & e); 739 740 if (*s == ']') 741 s++; 742 else 743 as_bad (_("missing ']'")); 744 } 745 else 746 { 747 s = parse_exp (s, & e); 748 749 n = enter_literal (& e, ispcrel); 750 751 if (ep) 752 *ep = e; 753 754 /* Create a reference to pool entry. */ 755 e.X_op = O_symbol; 756 e.X_add_symbol = poolsym; 757 e.X_add_number = n << 2; 758 } 759 760 * outputp = frag_more (2); 761 762 fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1, 763 BFD_RELOC_MCORE_PCREL_IMM8BY4); 764 765 return s; 766} 767 768static char * 769parse_imm (char * s, 770 unsigned * val, 771 unsigned min, 772 unsigned max) 773{ 774 char * new_pointer; 775 expressionS e; 776 777 new_pointer = parse_exp (s, & e); 778 779 if (e.X_op == O_absent) 780 ; /* An error message has already been emitted. */ 781 else if (e.X_op != O_constant) 782 as_bad (_("operand must be a constant")); 783 else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max) 784 as_bad (_("operand must be absolute in range %u..%u, not %ld"), 785 min, max, (long) e.X_add_number); 786 787 * val = e.X_add_number; 788 789 return new_pointer; 790} 791 792static char * 793parse_mem (char * s, 794 unsigned * reg, 795 unsigned * off, 796 unsigned siz) 797{ 798 * off = 0; 799 800 while (ISSPACE (* s)) 801 ++ s; 802 803 if (* s == '(') 804 { 805 s = parse_reg (s + 1, reg); 806 807 while (ISSPACE (* s)) 808 ++ s; 809 810 if (* s == ',') 811 { 812 s = parse_imm (s + 1, off, 0, 63); 813 814 if (siz > 1) 815 { 816 if (siz > 2) 817 { 818 if (* off & 0x3) 819 as_bad (_("operand must be a multiple of 4")); 820 821 * off >>= 2; 822 } 823 else 824 { 825 if (* off & 0x1) 826 as_bad (_("operand must be a multiple of 2")); 827 828 * off >>= 1; 829 } 830 } 831 } 832 833 while (ISSPACE (* s)) 834 ++ s; 835 836 if (* s == ')') 837 s ++; 838 } 839 else 840 as_bad (_("base register expected")); 841 842 return s; 843} 844 845/* This is the guts of the machine-dependent assembler. STR points to a 846 machine dependent instruction. This function is supposed to emit 847 the frags/bytes it assembles to. */ 848 849void 850md_assemble (char * str) 851{ 852 char * op_start; 853 char * op_end; 854 mcore_opcode_info * opcode; 855 char * output = NULL; 856 int nlen = 0; 857 unsigned short inst; 858 unsigned reg; 859 unsigned off; 860 unsigned isize; 861 expressionS e; 862 char name[21]; 863 864 /* Drop leading whitespace. */ 865 while (ISSPACE (* str)) 866 str ++; 867 868 /* Find the op code end. */ 869 for (op_start = op_end = str; 870 nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' '; 871 op_end++) 872 { 873 name[nlen] = op_start[nlen]; 874 nlen++; 875 } 876 877 name [nlen] = 0; 878 879 if (nlen == 0) 880 { 881 as_bad (_("can't find opcode ")); 882 return; 883 } 884 885 opcode = (mcore_opcode_info *) str_hash_find (opcode_hash_control, name); 886 if (opcode == NULL) 887 { 888 as_bad (_("unknown opcode \"%s\""), name); 889 return; 890 } 891 892 inst = opcode->inst; 893 isize = 2; 894 895 switch (opcode->opclass) 896 { 897 case O0: 898 output = frag_more (2); 899 break; 900 901 case OT: 902 op_end = parse_imm (op_end + 1, & reg, 0, 3); 903 inst |= reg; 904 output = frag_more (2); 905 break; 906 907 case O1: 908 op_end = parse_reg (op_end + 1, & reg); 909 inst |= reg; 910 output = frag_more (2); 911 break; 912 913 case JMP: 914 op_end = parse_reg (op_end + 1, & reg); 915 inst |= reg; 916 output = frag_more (2); 917 /* In a sifilter mode, we emit this insn 2 times, 918 fixes problem of an interrupt during a jmp.. */ 919 if (sifilter_mode) 920 { 921 output[0] = INST_BYTE0 (inst); 922 output[1] = INST_BYTE1 (inst); 923 output = frag_more (2); 924 } 925 break; 926 927 case JSR: 928 op_end = parse_reg (op_end + 1, & reg); 929 930 if (reg == 15) 931 as_bad (_("invalid register: r15 illegal")); 932 933 inst |= reg; 934 output = frag_more (2); 935 936 if (sifilter_mode) 937 { 938 /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx. */ 939 inst = MCORE_INST_BSR; /* With 0 displacement. */ 940 output[0] = INST_BYTE0 (inst); 941 output[1] = INST_BYTE1 (inst); 942 943 output = frag_more (2); 944 inst = MCORE_INST_ADDI; 945 inst |= 15; /* addi r15,6 */ 946 inst |= (6 - 1) << 4; /* Over the jmp's. */ 947 output[0] = INST_BYTE0 (inst); 948 output[1] = INST_BYTE1 (inst); 949 950 output = frag_more (2); 951 inst = MCORE_INST_JMP | reg; 952 output[0] = INST_BYTE0 (inst); 953 output[1] = INST_BYTE1 (inst); 954 955 /* 2nd emitted in fallthrough. */ 956 output = frag_more (2); 957 } 958 break; 959 960 case OC: 961 op_end = parse_reg (op_end + 1, & reg); 962 inst |= reg; 963 964 /* Skip whitespace. */ 965 while (ISSPACE (* op_end)) 966 ++ op_end; 967 968 if (*op_end == ',') 969 { 970 op_end = parse_creg (op_end + 1, & reg); 971 inst |= reg << 4; 972 } 973 974 output = frag_more (2); 975 break; 976 977 case MULSH: 978 if (cpu == M210) 979 { 980 as_bad (_("M340 specific opcode used when assembling for M210")); 981 break; 982 } 983 /* Fall through. */ 984 case O2: 985 op_end = parse_reg (op_end + 1, & reg); 986 inst |= reg; 987 988 /* Skip whitespace. */ 989 while (ISSPACE (* op_end)) 990 ++ op_end; 991 992 if (* op_end == ',') 993 { 994 op_end = parse_reg (op_end + 1, & reg); 995 inst |= reg << 4; 996 } 997 else 998 as_bad (_("second operand missing")); 999 1000 output = frag_more (2); 1001 break; 1002 1003 case X1: 1004 /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx. */ 1005 op_end = parse_reg (op_end + 1, & reg); 1006 1007 /* Skip whitespace. */ 1008 while (ISSPACE (* op_end)) 1009 ++ op_end; 1010 1011 if (* op_end == ',') /* xtrb- r1,rx. */ 1012 { 1013 if (reg != 1) 1014 as_bad (_("destination register must be r1")); 1015 1016 op_end = parse_reg (op_end + 1, & reg); 1017 } 1018 1019 inst |= reg; 1020 output = frag_more (2); 1021 break; 1022 1023 case O1R1: /* div- rx,r1. */ 1024 op_end = parse_reg (op_end + 1, & reg); 1025 inst |= reg; 1026 1027 /* Skip whitespace. */ 1028 while (ISSPACE (* op_end)) 1029 ++ op_end; 1030 1031 if (* op_end == ',') 1032 { 1033 op_end = parse_reg (op_end + 1, & reg); 1034 if (reg != 1) 1035 as_bad (_("source register must be r1")); 1036 } 1037 else 1038 as_bad (_("second operand missing")); 1039 1040 output = frag_more (2); 1041 break; 1042 1043 case OI: 1044 op_end = parse_reg (op_end + 1, & reg); 1045 inst |= reg; 1046 1047 /* Skip whitespace. */ 1048 while (ISSPACE (* op_end)) 1049 ++ op_end; 1050 1051 if (* op_end == ',') 1052 { 1053 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1054 inst |= (reg - 1) << 4; 1055 } 1056 else 1057 as_bad (_("second operand missing")); 1058 1059 output = frag_more (2); 1060 break; 1061 1062 case OB: 1063 op_end = parse_reg (op_end + 1, & reg); 1064 inst |= reg; 1065 1066 /* Skip whitespace. */ 1067 while (ISSPACE (* op_end)) 1068 ++ op_end; 1069 1070 if (* op_end == ',') 1071 { 1072 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1073 inst |= reg << 4; 1074 } 1075 else 1076 as_bad (_("second operand missing")); 1077 1078 output = frag_more (2); 1079 break; 1080 1081 case OB2: 1082 /* Like OB, but arg is 2^n instead of n. */ 1083 op_end = parse_reg (op_end + 1, & reg); 1084 inst |= reg; 1085 1086 /* Skip whitespace. */ 1087 while (ISSPACE (* op_end)) 1088 ++ op_end; 1089 1090 if (* op_end == ',') 1091 { 1092 op_end = parse_imm (op_end + 1, & reg, 1, 1u << 31); 1093 /* Further restrict the immediate to a power of two. */ 1094 if ((reg & (reg - 1)) == 0) 1095 reg = mylog2 (reg); 1096 else 1097 { 1098 reg = 0; 1099 as_bad (_("immediate is not a power of two")); 1100 } 1101 inst |= (reg) << 4; 1102 } 1103 else 1104 as_bad (_("second operand missing")); 1105 1106 output = frag_more (2); 1107 break; 1108 1109 case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */ 1110 case OBRb: 1111 case OBRc: 1112 op_end = parse_reg (op_end + 1, & reg); 1113 inst |= reg; 1114 1115 /* Skip whitespace. */ 1116 while (ISSPACE (* op_end)) 1117 ++ op_end; 1118 1119 if (* op_end == ',') 1120 { 1121 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1122 /* Immediate values of 0 -> 6 translate to movi. */ 1123 if (reg <= 6) 1124 { 1125 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1126 reg = 0x1 << reg; 1127 as_warn (_("translating bgeni to movi")); 1128 } 1129 inst &= ~ 0x01f0; 1130 inst |= reg << 4; 1131 } 1132 else 1133 as_bad (_("second operand missing")); 1134 1135 output = frag_more (2); 1136 break; 1137 1138 case OBR2: /* Like OBR, but arg is 2^n instead of n. */ 1139 op_end = parse_reg (op_end + 1, & reg); 1140 inst |= reg; 1141 1142 /* Skip whitespace. */ 1143 while (ISSPACE (* op_end)) 1144 ++ op_end; 1145 1146 if (* op_end == ',') 1147 { 1148 op_end = parse_imm (op_end + 1, & reg, 1, 1u << 31); 1149 1150 /* Further restrict the immediate to a power of two. */ 1151 if ((reg & (reg - 1)) == 0) 1152 reg = mylog2 (reg); 1153 else 1154 { 1155 reg = 0; 1156 as_bad (_("immediate is not a power of two")); 1157 } 1158 1159 /* Immediate values of 0 -> 6 translate to movi. */ 1160 if (reg <= 6) 1161 { 1162 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1163 reg = 0x1 << reg; 1164 as_warn (_("translating mgeni to movi")); 1165 } 1166 1167 inst |= reg << 4; 1168 } 1169 else 1170 as_bad (_("second operand missing")); 1171 1172 output = frag_more (2); 1173 break; 1174 1175 case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */ 1176 case OMb: 1177 case OMc: 1178 op_end = parse_reg (op_end + 1, & reg); 1179 inst |= reg; 1180 1181 /* Skip whitespace. */ 1182 while (ISSPACE (* op_end)) 1183 ++ op_end; 1184 1185 if (* op_end == ',') 1186 { 1187 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1188 1189 /* Immediate values of 1 -> 7 translate to movi. */ 1190 if (reg <= 7) 1191 { 1192 inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT; 1193 reg = (0x1 << reg) - 1; 1194 inst |= reg << 4; 1195 1196 as_warn (_("translating bmaski to movi")); 1197 } 1198 else 1199 { 1200 inst &= ~ 0x01F0; 1201 inst |= (reg & 0x1F) << 4; 1202 } 1203 } 1204 else 1205 as_bad (_("second operand missing")); 1206 1207 output = frag_more (2); 1208 break; 1209 1210 case SI: 1211 op_end = parse_reg (op_end + 1, & reg); 1212 inst |= reg; 1213 1214 /* Skip whitespace. */ 1215 while (ISSPACE (* op_end)) 1216 ++ op_end; 1217 1218 if (* op_end == ',') 1219 { 1220 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1221 inst |= reg << 4; 1222 } 1223 else 1224 as_bad (_("second operand missing")); 1225 1226 output = frag_more (2); 1227 break; 1228 1229 case I7: 1230 op_end = parse_reg (op_end + 1, & reg); 1231 inst |= reg; 1232 1233 /* Skip whitespace. */ 1234 while (ISSPACE (* op_end)) 1235 ++ op_end; 1236 1237 if (* op_end == ',') 1238 { 1239 op_end = parse_imm (op_end + 1, & reg, 0, 0x7F); 1240 inst |= reg << 4; 1241 } 1242 else 1243 as_bad (_("second operand missing")); 1244 1245 output = frag_more (2); 1246 break; 1247 1248 case LS: 1249 op_end = parse_reg (op_end + 1, & reg); 1250 inst |= reg << 8; 1251 1252 /* Skip whitespace. */ 1253 while (ISSPACE (* op_end)) 1254 ++ op_end; 1255 1256 if (* op_end == ',') 1257 { 1258 int size; 1259 1260 if ((inst & 0x6000) == 0) 1261 size = 4; 1262 else if ((inst & 0x6000) == 0x4000) 1263 size = 2; 1264 else if ((inst & 0x6000) == 0x2000) 1265 size = 1; 1266 else 1267 abort (); 1268 1269 op_end = parse_mem (op_end + 1, & reg, & off, size); 1270 1271 if (off > 16) 1272 as_bad (_("displacement too large (%d)"), off); 1273 else 1274 inst |= (reg) | (off << 4); 1275 } 1276 else 1277 as_bad (_("second operand missing")); 1278 1279 output = frag_more (2); 1280 break; 1281 1282 case LR: 1283 op_end = parse_reg (op_end + 1, & reg); 1284 1285 if (reg == 0 || reg == 15) 1286 as_bad (_("Invalid register: r0 and r15 illegal")); 1287 1288 inst |= (reg << 8); 1289 1290 /* Skip whitespace. */ 1291 while (ISSPACE (* op_end)) 1292 ++ op_end; 1293 1294 if (* op_end == ',') 1295 { 1296 /* parse_rt calls frag_more() for us. */ 1297 input_line_pointer = parse_rt (op_end + 1, & output, 0, 0); 1298 op_end = input_line_pointer; 1299 } 1300 else 1301 { 1302 as_bad (_("second operand missing")); 1303 output = frag_more (2); /* save its space */ 1304 } 1305 break; 1306 1307 case LJ: 1308 input_line_pointer = parse_rt (op_end + 1, & output, 1, 0); 1309 /* parse_rt() calls frag_more() for us. */ 1310 op_end = input_line_pointer; 1311 break; 1312 1313 case RM: 1314 op_end = parse_reg (op_end + 1, & reg); 1315 1316 if (reg == 0 || reg == 15) 1317 as_bad (_("bad starting register: r0 and r15 invalid")); 1318 1319 inst |= reg; 1320 1321 /* Skip whitespace. */ 1322 while (ISSPACE (* op_end)) 1323 ++ op_end; 1324 1325 if (* op_end == '-') 1326 { 1327 op_end = parse_reg (op_end + 1, & reg); 1328 1329 if (reg != 15) 1330 as_bad (_("ending register must be r15")); 1331 1332 /* Skip whitespace. */ 1333 while (ISSPACE (* op_end)) 1334 ++ op_end; 1335 } 1336 1337 if (* op_end == ',') 1338 { 1339 op_end ++; 1340 1341 /* Skip whitespace. */ 1342 while (ISSPACE (* op_end)) 1343 ++ op_end; 1344 1345 if (* op_end == '(') 1346 { 1347 op_end = parse_reg (op_end + 1, & reg); 1348 1349 if (reg != 0) 1350 as_bad (_("bad base register: must be r0")); 1351 1352 if (* op_end == ')') 1353 op_end ++; 1354 } 1355 else 1356 as_bad (_("base register expected")); 1357 } 1358 else 1359 as_bad (_("second operand missing")); 1360 1361 output = frag_more (2); 1362 break; 1363 1364 case RQ: 1365 op_end = parse_reg (op_end + 1, & reg); 1366 1367 if (reg != 4) 1368 as_fatal (_("first register must be r4")); 1369 1370 /* Skip whitespace. */ 1371 while (ISSPACE (* op_end)) 1372 ++ op_end; 1373 1374 if (* op_end == '-') 1375 { 1376 op_end = parse_reg (op_end + 1, & reg); 1377 1378 if (reg != 7) 1379 as_fatal (_("last register must be r7")); 1380 1381 /* Skip whitespace. */ 1382 while (ISSPACE (* op_end)) 1383 ++ op_end; 1384 1385 if (* op_end == ',') 1386 { 1387 op_end ++; 1388 1389 /* Skip whitespace. */ 1390 while (ISSPACE (* op_end)) 1391 ++ op_end; 1392 1393 if (* op_end == '(') 1394 { 1395 op_end = parse_reg (op_end + 1, & reg); 1396 1397 if (reg >= 4 && reg <= 7) 1398 as_fatal ("base register cannot be r4, r5, r6, or r7"); 1399 1400 inst |= reg; 1401 1402 /* Skip whitespace. */ 1403 while (ISSPACE (* op_end)) 1404 ++ op_end; 1405 1406 if (* op_end == ')') 1407 op_end ++; 1408 } 1409 else 1410 as_bad (_("base register expected")); 1411 } 1412 else 1413 as_bad (_("second operand missing")); 1414 } 1415 else 1416 as_bad (_("reg-reg expected")); 1417 1418 output = frag_more (2); 1419 break; 1420 1421 case BR: 1422 input_line_pointer = parse_exp (op_end + 1, & e); 1423 op_end = input_line_pointer; 1424 1425 output = frag_more (2); 1426 1427 fix_new_exp (frag_now, output-frag_now->fr_literal, 1428 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2); 1429 break; 1430 1431 case BL: 1432 op_end = parse_reg (op_end + 1, & reg); 1433 inst |= reg << 4; 1434 1435 /* Skip whitespace. */ 1436 while (ISSPACE (* op_end)) 1437 ++ op_end; 1438 1439 if (* op_end == ',') 1440 { 1441 op_end = parse_exp (op_end + 1, & e); 1442 output = frag_more (2); 1443 1444 fix_new_exp (frag_now, output-frag_now->fr_literal, 1445 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2); 1446 } 1447 else 1448 { 1449 as_bad (_("second operand missing")); 1450 output = frag_more (2); 1451 } 1452 break; 1453 1454 case JC: 1455 input_line_pointer = parse_exp (op_end + 1, & e); 1456 op_end = input_line_pointer; 1457 1458 output = frag_var (rs_machine_dependent, 1459 md_relax_table[C (COND_JUMP, DISP32)].rlx_length, 1460 md_relax_table[C (COND_JUMP, DISP12)].rlx_length, 1461 C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1462 isize = C32_LEN; 1463 break; 1464 1465 case JU: 1466 input_line_pointer = parse_exp (op_end + 1, & e); 1467 op_end = input_line_pointer; 1468 1469 output = frag_var (rs_machine_dependent, 1470 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 1471 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 1472 C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1473 isize = U32_LEN; 1474 break; 1475 1476 case JL: 1477 inst = MCORE_INST_JSRI; /* jsri */ 1478 input_line_pointer = parse_rt (op_end + 1, & output, 1, & e); 1479 /* parse_rt() calls frag_more for us. */ 1480 op_end = input_line_pointer; 1481 1482 /* Only do this if we know how to do it ... */ 1483 if (e.X_op != O_absent && do_jsri2bsr) 1484 { 1485 /* Look at adding the R_PCREL_JSRIMM11BY2. */ 1486 fix_new_exp (frag_now, output-frag_now->fr_literal, 1487 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2); 1488 } 1489 break; 1490 1491 case RSI: 1492 /* SI, but imm becomes 32-imm. */ 1493 op_end = parse_reg (op_end + 1, & reg); 1494 inst |= reg; 1495 1496 /* Skip whitespace. */ 1497 while (ISSPACE (* op_end)) 1498 ++ op_end; 1499 1500 if (* op_end == ',') 1501 { 1502 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1503 1504 reg = 32 - reg; 1505 inst |= reg << 4; 1506 } 1507 else 1508 as_bad (_("second operand missing")); 1509 1510 output = frag_more (2); 1511 break; 1512 1513 case DO21: /* O2, dup rd, lit must be 1 */ 1514 op_end = parse_reg (op_end + 1, & reg); 1515 inst |= reg; 1516 inst |= reg << 4; 1517 1518 /* Skip whitespace. */ 1519 while (ISSPACE (* op_end)) 1520 ++ op_end; 1521 1522 if (* op_end == ',') 1523 { 1524 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1525 1526 if (reg != 1) 1527 as_bad (_("second operand must be 1")); 1528 } 1529 else 1530 as_bad (_("second operand missing")); 1531 1532 output = frag_more (2); 1533 break; 1534 1535 case SIa: 1536 op_end = parse_reg (op_end + 1, & reg); 1537 inst |= reg; 1538 1539 /* Skip whitespace. */ 1540 while (ISSPACE (* op_end)) 1541 ++ op_end; 1542 1543 if (* op_end == ',') 1544 { 1545 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1546 1547 if (reg == 0) 1548 as_bad (_("zero used as immediate value")); 1549 1550 inst |= reg << 4; 1551 } 1552 else 1553 as_bad (_("second operand missing")); 1554 1555 output = frag_more (2); 1556 break; 1557 1558 case OPSR: 1559 if (cpu == M210) 1560 { 1561 as_bad (_("M340 specific opcode used when assembling for M210")); 1562 break; 1563 } 1564 1565 op_end = parse_psrmod (op_end + 1, & reg); 1566 1567 /* Look for further selectors. */ 1568 while (* op_end == ',') 1569 { 1570 unsigned value; 1571 1572 op_end = parse_psrmod (op_end + 1, & value); 1573 1574 if (value & reg) 1575 as_bad (_("duplicated psr bit specifier")); 1576 1577 reg |= value; 1578 } 1579 1580 if (reg > 8) 1581 as_bad (_("`af' must appear alone")); 1582 1583 inst |= (reg & 0x7); 1584 output = frag_more (2); 1585 break; 1586 1587 default: 1588 as_bad (_("unimplemented opcode \"%s\""), name); 1589 } 1590 1591 /* Drop whitespace after all the operands have been parsed. */ 1592 while (ISSPACE (* op_end)) 1593 op_end ++; 1594 1595 /* Give warning message if the insn has more operands than required. */ 1596 if (strcmp (op_end, opcode->name) && strcmp (op_end, "")) 1597 as_warn (_("ignoring operands: %s "), op_end); 1598 1599 if (output != NULL) 1600 { 1601 output[0] = INST_BYTE0 (inst); 1602 output[1] = INST_BYTE1 (inst); 1603 } 1604 1605#ifdef OBJ_ELF 1606 dwarf2_emit_insn (2); 1607#endif 1608 check_literals (opcode->transfer, isize); 1609} 1610 1611symbolS * 1612md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 1613{ 1614 return 0; 1615} 1616 1617void 1618md_mcore_end (void) 1619{ 1620 dump_literals (0); 1621 subseg_set (text_section, 0); 1622} 1623 1624/* Various routines to kill one day. */ 1625 1626const char * 1627md_atof (int type, char * litP, int * sizeP) 1628{ 1629 return ieee_md_atof (type, litP, sizeP, target_big_endian); 1630} 1631 1632const char * md_shortopts = ""; 1633 1634enum options 1635{ 1636 OPTION_JSRI2BSR_ON = OPTION_MD_BASE, 1637 OPTION_JSRI2BSR_OFF, 1638 OPTION_SIFILTER_ON, 1639 OPTION_SIFILTER_OFF, 1640 OPTION_CPU, 1641 OPTION_EB, 1642 OPTION_EL, 1643}; 1644 1645struct option md_longopts[] = 1646{ 1647 { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF}, 1648 { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON}, 1649 { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON}, 1650 { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF}, 1651 { "cpu", required_argument, NULL, OPTION_CPU}, 1652 { "EB", no_argument, NULL, OPTION_EB}, 1653 { "EL", no_argument, NULL, OPTION_EL}, 1654 { NULL, no_argument, NULL, 0} 1655}; 1656 1657size_t md_longopts_size = sizeof (md_longopts); 1658 1659int 1660md_parse_option (int c, const char * arg) 1661{ 1662 switch (c) 1663 { 1664 case OPTION_CPU: 1665 if (streq (arg, "210")) 1666 { 1667 cpu = M210; 1668 target_big_endian = 1; 1669 } 1670 else if (streq (arg, "340")) 1671 cpu = M340; 1672 else 1673 as_warn (_("unrecognised cpu type '%s'"), arg); 1674 break; 1675 1676 case OPTION_EB: target_big_endian = 1; break; 1677 case OPTION_EL: target_big_endian = 0; cpu = M340; break; 1678 case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break; 1679 case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break; 1680 case OPTION_SIFILTER_ON: sifilter_mode = 1; break; 1681 case OPTION_SIFILTER_OFF: sifilter_mode = 0; break; 1682 default: return 0; 1683 } 1684 1685 return 1; 1686} 1687 1688void 1689md_show_usage (FILE * stream) 1690{ 1691 fprintf (stream, _("\ 1692MCORE specific options:\n\ 1693 -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\ 1694 -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\ 1695 -cpu=[210|340] select CPU type\n\ 1696 -EB assemble for a big endian system (default)\n\ 1697 -EL assemble for a little endian system\n")); 1698} 1699 1700int md_short_jump_size; 1701 1702void 1703md_create_short_jump (char * ptr ATTRIBUTE_UNUSED, 1704 addressT from_Nddr ATTRIBUTE_UNUSED, 1705 addressT to_Nddr ATTRIBUTE_UNUSED, 1706 fragS * frag ATTRIBUTE_UNUSED, 1707 symbolS * to_symbol ATTRIBUTE_UNUSED) 1708{ 1709 as_fatal (_("failed sanity check: short_jump")); 1710} 1711 1712void 1713md_create_long_jump (char * ptr ATTRIBUTE_UNUSED, 1714 addressT from_Nddr ATTRIBUTE_UNUSED, 1715 addressT to_Nddr ATTRIBUTE_UNUSED, 1716 fragS * frag ATTRIBUTE_UNUSED, 1717 symbolS * to_symbol ATTRIBUTE_UNUSED) 1718{ 1719 as_fatal (_("failed sanity check: long_jump")); 1720} 1721 1722/* Called after relaxing, change the frags so they know how big they are. */ 1723 1724void 1725md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, 1726 segT sec ATTRIBUTE_UNUSED, 1727 fragS * fragP) 1728{ 1729 char *buffer; 1730 int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; 1731 1732 buffer = fragP->fr_fix + &fragP->fr_literal[0]; 1733 1734 switch (fragP->fr_subtype) 1735 { 1736 case C (COND_JUMP, DISP12): 1737 case C (UNCD_JUMP, DISP12): 1738 { 1739 /* Get the address of the end of the instruction. */ 1740 int next_inst = fragP->fr_fix + fragP->fr_address + 2; 1741 unsigned char t0; 1742 int disp = targ_addr - next_inst; 1743 1744 if (disp & 1) 1745 as_bad (_("odd displacement at %x"), next_inst - 2); 1746 1747 disp >>= 1; 1748 1749 if (! target_big_endian) 1750 { 1751 t0 = buffer[1] & 0xF8; 1752 1753 md_number_to_chars (buffer, disp, 2); 1754 1755 buffer[1] = (buffer[1] & 0x07) | t0; 1756 } 1757 else 1758 { 1759 t0 = buffer[0] & 0xF8; 1760 1761 md_number_to_chars (buffer, disp, 2); 1762 1763 buffer[0] = (buffer[0] & 0x07) | t0; 1764 } 1765 1766 fragP->fr_fix += 2; 1767 } 1768 break; 1769 1770 case C (COND_JUMP, DISP32): 1771 case C (COND_JUMP, UNDEF_WORD_DISP): 1772 { 1773 /* A conditional branch won't fit into 12 bits so: 1774 b!cond 1f 1775 jmpi 0f 1776 .align 2 1777 0: .long disp 1778 1: 1779 1780 If the b!cond is 4 byte aligned, the literal which would 1781 go at x+4 will also be aligned. */ 1782 int first_inst = fragP->fr_fix + fragP->fr_address; 1783 int needpad = (first_inst & 3); 1784 1785 if (! target_big_endian) 1786 buffer[1] ^= 0x08; 1787 else 1788 buffer[0] ^= 0x08; /* Toggle T/F bit. */ 1789 1790 buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1791 buffer[3] = INST_BYTE1 (MCORE_INST_JMPI); 1792 1793 if (needpad) 1794 { 1795 if (! target_big_endian) 1796 { 1797 buffer[0] = 4; /* Branch over jmpi, pad, and ptr. */ 1798 buffer[2] = 1; /* Jmpi offset of 1 gets the pointer. */ 1799 } 1800 else 1801 { 1802 buffer[1] = 4; /* Branch over jmpi, pad, and ptr. */ 1803 buffer[3] = 1; /* Jmpi offset of 1 gets the pointer. */ 1804 } 1805 1806 buffer[4] = 0; /* Alignment/pad. */ 1807 buffer[5] = 0; 1808 buffer[6] = 0; /* Space for 32 bit address. */ 1809 buffer[7] = 0; 1810 buffer[8] = 0; 1811 buffer[9] = 0; 1812 1813 /* Make reloc for the long disp. */ 1814 fix_new (fragP, fragP->fr_fix + 6, 4, 1815 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1816 1817 fragP->fr_fix += C32_LEN; 1818 } 1819 else 1820 { 1821 /* See comment below about this given gas' limitations for 1822 shrinking the fragment. '3' is the amount of code that 1823 we inserted here, but '4' is right for the space we reserved 1824 for this fragment. */ 1825 if (! target_big_endian) 1826 { 1827 buffer[0] = 3; /* Branch over jmpi, and ptr. */ 1828 buffer[2] = 0; /* Jmpi offset of 0 gets the pointer. */ 1829 } 1830 else 1831 { 1832 buffer[1] = 3; /* Branch over jmpi, and ptr. */ 1833 buffer[3] = 0; /* Jmpi offset of 0 gets the pointer. */ 1834 } 1835 1836 buffer[4] = 0; /* Space for 32 bit address. */ 1837 buffer[5] = 0; 1838 buffer[6] = 0; 1839 buffer[7] = 0; 1840 1841 /* Make reloc for the long disp. */ 1842 fix_new (fragP, fragP->fr_fix + 4, 4, 1843 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1844 fragP->fr_fix += C32_LEN; 1845 1846 /* Frag is actually shorter (see the other side of this ifdef) 1847 but gas isn't prepared for that. We have to re-adjust 1848 the branch displacement so that it goes beyond the 1849 full length of the fragment, not just what we actually 1850 filled in. */ 1851 if (! target_big_endian) 1852 buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1853 else 1854 buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1855 } 1856 } 1857 break; 1858 1859 case C (UNCD_JUMP, DISP32): 1860 case C (UNCD_JUMP, UNDEF_WORD_DISP): 1861 { 1862 /* An unconditional branch will not fit in 12 bits, make code which 1863 looks like: 1864 jmpi 0f 1865 .align 2 1866 0: .long disp 1867 we need a pad if "first_inst" is 4 byte aligned. 1868 [because the natural literal place is x + 2]. */ 1869 int first_inst = fragP->fr_fix + fragP->fr_address; 1870 int needpad = !(first_inst & 3); 1871 1872 buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1873 buffer[1] = INST_BYTE1 (MCORE_INST_JMPI); 1874 1875 if (needpad) 1876 { 1877 if (! target_big_endian) 1878 buffer[0] = 1; /* Jmpi offset of 1 since padded. */ 1879 else 1880 buffer[1] = 1; /* Jmpi offset of 1 since padded. */ 1881 buffer[2] = 0; /* Alignment. */ 1882 buffer[3] = 0; 1883 buffer[4] = 0; /* Space for 32 bit address. */ 1884 buffer[5] = 0; 1885 buffer[6] = 0; 1886 buffer[7] = 0; 1887 1888 /* Make reloc for the long disp. */ 1889 fix_new (fragP, fragP->fr_fix + 4, 4, 1890 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1891 1892 fragP->fr_fix += U32_LEN; 1893 } 1894 else 1895 { 1896 if (! target_big_endian) 1897 buffer[0] = 0; /* Jmpi offset of 0 if no pad. */ 1898 else 1899 buffer[1] = 0; /* Jmpi offset of 0 if no pad. */ 1900 buffer[2] = 0; /* Space for 32 bit address. */ 1901 buffer[3] = 0; 1902 buffer[4] = 0; 1903 buffer[5] = 0; 1904 1905 /* Make reloc for the long disp. */ 1906 fix_new (fragP, fragP->fr_fix + 2, 4, 1907 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1908 fragP->fr_fix += U32_LEN; 1909 } 1910 } 1911 break; 1912 1913 default: 1914 abort (); 1915 } 1916} 1917 1918/* Applies the desired value to the specified location. 1919 Also sets up addends for 'rela' type relocations. */ 1920 1921void 1922md_apply_fix (fixS * fixP, 1923 valueT * valP, 1924 segT segment ATTRIBUTE_UNUSED) 1925{ 1926 char * buf = fixP->fx_where + fixP->fx_frag->fr_literal; 1927 const char * file = fixP->fx_file ? fixP->fx_file : _("unknown"); 1928 const char * symname; 1929 /* Note: use offsetT because it is signed, valueT is unsigned. */ 1930 offsetT val = *valP; 1931 1932 symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); 1933 /* Save this for the addend in the relocation record. */ 1934 fixP->fx_addnumber = val; 1935 1936 if (fixP->fx_addsy != NULL) 1937 { 1938#ifdef OBJ_ELF 1939 /* For ELF we can just return and let the reloc that will be generated 1940 take care of everything. For COFF we still have to insert 'val' 1941 into the insn since the addend field will be ignored. */ 1942 return; 1943#endif 1944 } 1945 else 1946 fixP->fx_done = 1; 1947 1948 switch (fixP->fx_r_type) 1949 { 1950 /* Second byte of 2 byte opcode. */ 1951 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 1952 if ((val & 1) != 0) 1953 as_bad_where (file, fixP->fx_line, 1954 ngettext ("odd distance branch (0x%lx byte)", 1955 "odd distance branch (0x%lx bytes)", 1956 (long) val), 1957 (long) val); 1958 val /= 2; 1959 if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1)) 1960 as_bad_where (file, fixP->fx_line, 1961 _("pcrel for branch to %s too far (0x%lx)"), 1962 symname, (long) val); 1963 if (target_big_endian) 1964 { 1965 buf[0] |= ((val >> 8) & 0x7); 1966 buf[1] |= (val & 0xff); 1967 } 1968 else 1969 { 1970 buf[1] |= ((val >> 8) & 0x7); 1971 buf[0] |= (val & 0xff); 1972 } 1973 break; 1974 1975 /* Lower 8 bits of 2 byte opcode. */ 1976 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 1977 val += 3; 1978 val /= 4; 1979 if (val & ~0xff) 1980 as_bad_where (file, fixP->fx_line, 1981 _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"), 1982 symname, (long) val); 1983 else if (! target_big_endian) 1984 buf[0] |= (val & 0xff); 1985 else 1986 buf[1] |= (val & 0xff); 1987 break; 1988 1989 /* Loopt instruction. */ 1990 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 1991 if ((val < -32) || (val > -2)) 1992 as_bad_where (file, fixP->fx_line, 1993 _("pcrel for loopt too far (0x%lx)"), (long) val); 1994 val /= 2; 1995 if (! target_big_endian) 1996 buf[0] |= (val & 0xf); 1997 else 1998 buf[1] |= (val & 0xf); 1999 break; 2000 2001 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2002 /* Conditional linker map jsri to bsr. */ 2003 /* If it's a local target and close enough, fix it. 2004 NB: >= -2k for backwards bsr; < 2k for forwards... */ 2005 if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048) 2006 { 2007 long nval = (val / 2) & 0x7ff; 2008 nval |= MCORE_INST_BSR; 2009 2010 /* REPLACE the instruction, don't just modify it. */ 2011 buf[0] = INST_BYTE0 (nval); 2012 buf[1] = INST_BYTE1 (nval); 2013 } 2014 else 2015 fixP->fx_done = 0; 2016 break; 2017 2018 case BFD_RELOC_MCORE_PCREL_32: 2019 case BFD_RELOC_VTABLE_INHERIT: 2020 case BFD_RELOC_VTABLE_ENTRY: 2021 fixP->fx_done = 0; 2022 break; 2023 2024 default: 2025 if (fixP->fx_addsy != NULL) 2026 { 2027 /* If the fix is an absolute reloc based on a symbol's 2028 address, then it cannot be resolved until the final link. */ 2029 fixP->fx_done = 0; 2030 } 2031#ifdef OBJ_ELF 2032 else 2033#endif 2034 { 2035 if (fixP->fx_size == 4) 2036 ; 2037 else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767) 2038 ; 2039 else if (fixP->fx_size == 1 && val >= -256 && val <= 255) 2040 ; 2041 else 2042 abort (); 2043 md_number_to_chars (buf, val, fixP->fx_size); 2044 } 2045 break; 2046 } 2047} 2048 2049void 2050md_operand (expressionS * expressionP) 2051{ 2052 /* Ignore leading hash symbol, if present. */ 2053 if (* input_line_pointer == '#') 2054 { 2055 input_line_pointer ++; 2056 expression (expressionP); 2057 } 2058} 2059 2060int md_long_jump_size; 2061 2062/* Called just before address relaxation, return the length 2063 by which a fragment must grow to reach it's destination. */ 2064int 2065md_estimate_size_before_relax (fragS * fragP, segT segment_type) 2066{ 2067 switch (fragP->fr_subtype) 2068 { 2069 default: 2070 abort (); 2071 2072 case C (UNCD_JUMP, UNDEF_DISP): 2073 /* Used to be a branch to somewhere which was unknown. */ 2074 if (!fragP->fr_symbol) 2075 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2076 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2077 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2078 else 2079 fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP); 2080 break; 2081 2082 case C (COND_JUMP, UNDEF_DISP): 2083 /* Used to be a branch to somewhere which was unknown. */ 2084 if (fragP->fr_symbol 2085 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2086 /* Got a symbol and it's defined in this segment, become byte 2087 sized - maybe it will fix up */ 2088 fragP->fr_subtype = C (COND_JUMP, DISP12); 2089 else if (fragP->fr_symbol) 2090 /* It's got a segment, but it's not ours, so it will always be long. */ 2091 fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP); 2092 else 2093 /* We know the abs value. */ 2094 fragP->fr_subtype = C (COND_JUMP, DISP12); 2095 break; 2096 2097 case C (UNCD_JUMP, DISP12): 2098 case C (UNCD_JUMP, DISP32): 2099 case C (UNCD_JUMP, UNDEF_WORD_DISP): 2100 case C (COND_JUMP, DISP12): 2101 case C (COND_JUMP, DISP32): 2102 case C (COND_JUMP, UNDEF_WORD_DISP): 2103 /* When relaxing a section for the second time, we don't need to 2104 do anything besides return the current size. */ 2105 break; 2106 } 2107 2108 return md_relax_table[fragP->fr_subtype].rlx_length; 2109} 2110 2111/* Put number into target byte order. */ 2112 2113void 2114md_number_to_chars (char * ptr, valueT use, int nbytes) 2115{ 2116 if (target_big_endian) 2117 number_to_chars_bigendian (ptr, use, nbytes); 2118 else 2119 number_to_chars_littleendian (ptr, use, nbytes); 2120} 2121 2122/* Round up a section size to the appropriate boundary. */ 2123 2124valueT 2125md_section_align (segT segment ATTRIBUTE_UNUSED, 2126 valueT size) 2127{ 2128 /* Byte alignment is fine. */ 2129 return size; 2130} 2131 2132/* The location from which a PC relative jump should be calculated, 2133 given a PC relative reloc. */ 2134 2135long 2136md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) 2137{ 2138#ifdef OBJ_ELF 2139 /* If the symbol is undefined or defined in another section 2140 we leave the add number alone for the linker to fix it later. 2141 Only account for the PC pre-bump (which is 2 bytes on the MCore). */ 2142 if (fixp->fx_addsy != (symbolS *) NULL 2143 && (! S_IS_DEFINED (fixp->fx_addsy) 2144 || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) 2145 2146 { 2147 gas_assert (fixp->fx_size == 2); /* must be an insn */ 2148 return fixp->fx_size; 2149 } 2150#endif 2151 2152 /* The case where we are going to resolve things... */ 2153 return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address; 2154} 2155 2156#define F(SZ,PCREL) (((SZ) << 1) + (PCREL)) 2157#define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break 2158 2159arelent * 2160tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) 2161{ 2162 arelent * rel; 2163 bfd_reloc_code_real_type code; 2164 2165 switch (fixp->fx_r_type) 2166 { 2167 /* These confuse the size/pcrel macro approach. */ 2168 case BFD_RELOC_VTABLE_INHERIT: 2169 case BFD_RELOC_VTABLE_ENTRY: 2170 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 2171 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 2172 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 2173 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2174 case BFD_RELOC_RVA: 2175 code = fixp->fx_r_type; 2176 break; 2177 2178 default: 2179 switch (F (fixp->fx_size, fixp->fx_pcrel)) 2180 { 2181 MAP (1, 0, BFD_RELOC_8); 2182 MAP (2, 0, BFD_RELOC_16); 2183 MAP (4, 0, BFD_RELOC_32); 2184 MAP (1, 1, BFD_RELOC_8_PCREL); 2185 MAP (2, 1, BFD_RELOC_16_PCREL); 2186 MAP (4, 1, BFD_RELOC_32_PCREL); 2187 default: 2188 code = fixp->fx_r_type; 2189 as_bad (_("Can not do %d byte %srelocation"), 2190 fixp->fx_size, 2191 fixp->fx_pcrel ? _("pc-relative ") : ""); 2192 } 2193 break; 2194 } 2195 2196 rel = XNEW (arelent); 2197 rel->sym_ptr_ptr = XNEW (asymbol *); 2198 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2199 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 2200 /* Always pass the addend along! */ 2201 rel->addend = fixp->fx_addnumber; 2202 2203 rel->howto = bfd_reloc_type_lookup (stdoutput, code); 2204 2205 if (rel->howto == NULL) 2206 { 2207 as_bad_where (fixp->fx_file, fixp->fx_line, 2208 _("Cannot represent relocation type %s"), 2209 bfd_get_reloc_code_name (code)); 2210 2211 /* Set howto to a garbage value so that we can keep going. */ 2212 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 2213 gas_assert (rel->howto != NULL); 2214 } 2215 2216 return rel; 2217} 2218 2219#ifdef OBJ_ELF 2220/* See whether we need to force a relocation into the output file. 2221 This is used to force out switch and PC relative relocations when 2222 relaxing. */ 2223int 2224mcore_force_relocation (fixS * fix) 2225{ 2226 if (fix->fx_r_type == BFD_RELOC_RVA) 2227 return 1; 2228 2229 return generic_force_reloc (fix); 2230} 2231 2232/* Return true if the fix can be handled by GAS, false if it must 2233 be passed through to the linker. */ 2234 2235bool 2236mcore_fix_adjustable (fixS * fixP) 2237{ 2238 /* We need the symbol name for the VTABLE entries. */ 2239 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 2240 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 2241 return 0; 2242 2243 return 1; 2244} 2245#endif /* OBJ_ELF */ 2246