12022-07-08 Nick Clifton <nickc@redhat.com> 2 3 * 2.39 branch created. 4 52022-01-22 Nick Clifton <nickc@redhat.com> 6 7 * 2.38 release branch created. 8 92021-07-05 Alan Modra <amodra@gmail.com> 10 11 * mep.opc (macros): Make static and const. 12 (lookup_macro): Return and use const pointer. 13 (expand_macro): Make mac param const. 14 (expand_string): Make pmacro const. 15 162021-07-03 Nick Clifton <nickc@redhat.com> 17 18 * 2.37 release branch created. 19 202021-05-06 Stafford Horne <shorne@gmail.com> 21 22 PR 21464 23 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic 24 for gotha() relocation. 25 262021-03-31 Alan Modra <amodra@gmail.com> 27 28 * frv.opc: Replace bfd_boolean with bool, FALSE with false, and 29 TRUE with true throughout. 30 312021-03-29 Alan Modra <amodra@gmail.com> 32 33 * frv.opc (frv_is_branch_major, frv_is_float_major), 34 (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn), 35 (frv_is_media_insn, spr_valid): Correct prototypes. 36 372021-01-09 Nick Clifton <nickc@redhat.com> 38 39 * 2.36 release branch crated. 40 412020-10-05 Samanta Navarro <ferivoz@riseup.net> 42 43 * m32r.cpu: Fix spelling mistakes. 44 452020-09-18 David Faust <david.faust@oracle.com> 46 47 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD. 48 (define-alu-insn-bin, daib): Take ISAs as an argument. 49 (define-alu-instructions): Update calls to daib pmacro with 50 ISAs; add sdiv and smod. 51 522020-09-08 David Faust <david.faust@oracle.com> 53 54 * bpf.cpu (define-alu-instructions): Correct semantic operators 55 for div, mod to unsigned versions. 56 572020-09-01 Alan Modra <amodra@gmail.com> 58 59 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed 60 value by two rather than shifting left. 61 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract. 62 632020-08-26 David Faust <david.faust@oracle.com> 64 65 * bpf.cpu (arch bpf): Add xbpf mach and isas. 66 (define-xbpf-isa) New pmacro. 67 (all-isas) Add xbpfle,xbpfbe. 68 (endian-isas): New pmacro. 69 (mach xbpf): New. 70 (model xbpf-def): Likewise. 71 (h-gpr): Add xbpf mach. 72 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa. 73 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa. 74 (define-alu-insn-un): Use new endian-isas pmacro. 75 (define-alu-insn-bin, define-alu-insn-mov): Likewise. 76 (define-endian-insn, define-lddw): Likewise. 77 (dlind, dxli, dxsi, dsti): Likewise. 78 (define-cond-jump-insn, define-call-insn): Likewise. 79 (define-atomic-insns): Likewise. 80 812020-07-04 Nick Clifton <nickc@redhat.com> 82 83 Binutils 2.35 branch created. 84 852020-06-25 David Faust <david.faust@oracle.com> 86 87 * bpf.cpu (f-offset16): Change type from INT to HI. 88 (dxli): Simplify memory access. 89 (dxsi): Likewise. 90 (define-endian-insn): Update c-call in semantics. 91 (dlabs) Likewise. 92 (dlind) Likewise. 93 942020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> 95 96 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64. 97 * bpf.opc (bpf_print_insn): Do not set endian_code here. 98 992020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> 100 101 * mep.opc (print_slot_insn): Pass the insn endianness to 102 cgen_get_insn_value. 103 1042020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com> 105 David Faust <david.faust@oracle.com> 106 107 * bpf.cpu (define-alu-insn-un): Add definitions of semantics. 108 (define-alu-insn-mov): Likewise. 109 (daib): Likewise. 110 (define-alu-instructions): Likewise. 111 (define-endian-insn): Likewise. 112 (define-lddw): Likewise. 113 (dlabs): Likewise. 114 (dlind): Likewise. 115 (dxli): Likewise. 116 (dxsi): Likewise. 117 (dsti): Likewise. 118 (define-ldstx-insns): Likewise. 119 (define-st-insns): Likewise. 120 (define-cond-jump-insn): Likewise. 121 (dcji): Likewise. 122 (define-condjump-insns): Likewise. 123 (define-call-insn): Likewise. 124 (ja): Likewise. 125 ("exit"): Likewise. 126 (define-atomic-insns): Likewise. 127 (sem-exchange-and-add): New macro. 128 * bpf.cpu ("brkpt"): New instruction. 129 (bpfbf): Set word-bitsize to 32 and insn-endian big. 130 (h-gpr): Prefer r0 to `a' and r6 to `ctx'. 131 (h-pc): Expand definition. 132 * bpf.opc (bpf_print_insn): Set endian_code to BIG. 133 1342020-05-21 Alan Modra <amodra@gmail.com> 135 136 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace 137 "if (x) free (x)" with "free (x)". 138 1392020-05-19 Stafford Horne <shorne@gmail.com> 140 141 PR 25184 142 * or1k.cpu (arch or1k): Remove or64 and or64nd machs. 143 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros. 144 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions. 145 * or1kcommon.cpu (h-fdr): Remove hardware. 146 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions. 147 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern. 148 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern. 149 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern. 150 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove. 151 1522020-02-16 David Faust <david.faust@oracle.com> 153 154 * bpf.cpu (define-cond-jump-insn): Renamed from djci. 155 (dcji) New version with support for JMP32 156 1572020-02-03 Alan Modra <amodra@gmail.com> 158 159 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value. 160 1612020-02-01 Alan Modra <amodra@gmail.com> 162 163 * frv.cpu (f-u12): Multiply rather than left shift signed values. 164 (f-label16, f-label24): Likewise. 165 1662020-01-30 Alan Modra <amodra@gmail.com> 167 168 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting. 169 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise. 170 (f-dst32-rn-prefixed-QI): Likewise. 171 (f-dsp-32-s32): Mask before shifting left. 172 (f-dsp-48-u32, f-dsp-48-s32): Likewise. 173 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than 174 shifting left. 175 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise. 176 (h-gr-SI): Mask before shifting. 177 1782020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> 179 180 * bpf.cpu (define-alu-insn-un): The unary BPF instructions 181 (neg and neg32) use OP_SRC_K even if they operate only in 182 registers. 183 1842020-01-18 Nick Clifton <nickc@redhat.com> 185 186 Binutils 2.34 branch created. 187 1882020-01-13 Alan Modra <amodra@gmail.com> 189 190 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't 191 left shift signed values. 192 1932020-01-06 Alan Modra <amodra@gmail.com> 194 195 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign 196 bits before shifting rather than masking after shifting. 197 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise. 198 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise. 199 (f-dsp-64-u16, f-dsp-8-s24): Likewise. 200 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift. 201 2022020-01-04 Alan Modra <amodra@gmail.com> 203 204 * m32r.cpu (f-disp8): Avoid left shift of negative values. 205 (f-disp16, f-disp24): Likewise. 206 2072019-12-23 Alan Modra <amodra@gmail.com> 208 209 * iq2000.cpu (f-offset): Avoid left shift of negative values. 210 2112019-12-20 Alan Modra <amodra@gmail.com> 212 213 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values. 214 2152019-12-17 Alan Modra <amodra@gmail.com> 216 217 * bpf.cpu (f-imm64): Avoid signed overflow. 218 2192019-12-16 Alan Modra <amodra@gmail.com> 220 221 * xstormy16.cpu (f-rel12a): Avoid signed overflow. 222 2232019-12-11 Alan Modra <amodra@gmail.com> 224 225 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts. 226 * lm32.cpu (f-branch, f-vall): Likewise. 227 * m32.cpu (f-lab-8-16): Likewise. 228 2292019-12-11 Alan Modra <amodra@gmail.com> 230 231 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than 232 shift left to avoid UB on left shift of negative values. 233 2342019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com> 235 236 * bpf.cpu: Fix comment describing the 128-bit instruction format. 237 2382019-09-09 Phil Blundell <pb@pbcl.net> 239 240 binutils 2.33 branch created. 241 2422019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> 243 244 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of 245 %a and %ctx. 246 2472019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com> 248 249 * bpf.cpu (dlabs): New pmacro. 250 (dlind): Likewise. 251 2522019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> 253 254 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an 255 explicit 'dst' argument. 256 2572019-06-13 Stafford Horne <shorne@gmail.com> 258 259 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol. 260 2612019-06-13 Stafford Horne <shorne@gmail.com> 262 263 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a 264 (l-adrp): Improve comment. 265 2662019-06-13 Stafford Horne <shorne@gmail.com> 267 268 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S, 269 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D, 270 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes. 271 (float-setflag-insn-base): New pmacro based on float-setflag-insn. 272 (float-setflag-symantics, float-setflag-unordered-cmp-symantics, 273 float-setflag-unordered-symantics): New pmacro for instruction 274 symantics. 275 (float-setflag-insn): Update to use float-setflag-insn-base. 276 (float-setflag-unordered-insn): New pmacro for generating instructions. 277 2782019-06-13 Andrey Bacherov <avbacherov@opencores.org> 279 Stafford Horne <shorne@gmail.com> 280 281 * or1k.cpu (ORFPX64A32-MACHS): New pmacro. 282 (ORFPX-MACHS): Removed pmacro. 283 * or1k.opc (or1k_cgen_insn_supported): New function. 284 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro. 285 (parse_regpair, print_regpair): New functions. 286 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder 287 and add comments. 288 (h-fdr): Update comment to indicate or64. 289 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs. 290 (h-fd32r): New hardware for 64-bit fpu registers. 291 (h-i64r): New hardware for 64-bit int registers. 292 * or1korbis.cpu (f-resv-8-1): New field. 293 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS. 294 (rDDF, rADF, rBDF): Update operand comment to indicate or64. 295 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields. 296 (h-roff1): New hardware. 297 (double-field-and-ops mnemonic): New pmacro to generate operations 298 rDD32F, rAD32F, rBD32F, rDDI and rADI. 299 (float-regreg-insn): Update single precision generator to MACH 300 ORFPX32-MACHS. Add generator for or32 64-bit instructions. 301 (float-setflag-insn): Update single precision generator to MACH 302 ORFPX32-MACHS. Fix double instructions from single to double 303 precision. Add generator for or32 64-bit instructions. 304 (float-cust-insn cust-num): Update single precision generator to MACH 305 ORFPX32-MACHS. Add generator for or32 64-bit instructions. 306 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to 307 ORFPX32-MACHS. 308 (lf-rem-d): Fix operation from mod to rem. 309 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction. 310 (lf-itof-d): Fix operands from single to double. 311 (lf-ftoi-d): Update operand mode from DI to WI. 312 3132019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> 314 315 * bpf.cpu: New file. 316 * bpf.opc: Likewise. 317 3182018-06-24 Nick Clifton <nickc@redhat.com> 319 320 2.32 branch created. 321 3222018-10-05 Richard Henderson <rth@twiddle.net> 323 Stafford Horne <shorne@gmail.com> 324 325 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU. 326 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU. 327 (l-mul): Fix overflow support and indentation. 328 (l-mulu): Fix overflow support and indentation. 329 (l-muld, l-muldu, l-msbu, l-macu): New instructions. 330 (l-div); Remove incorrect carry behavior. 331 (l-divu): Fix carry and overflow behavior. 332 (l-mac): Add overflow support. 333 (l-msb, l-msbu): Add carry and overflow support. 334 3352018-10-05 Richard Henderson <rth@twiddle.net> 336 337 * or1k.opc (parse_disp26): Add support for plta() relocations. 338 (parse_disp21): New function. 339 (or1k_rclass): New enum. 340 (or1k_rtype): New enum. 341 (or1k_imm16_relocs): Define new PO and SPO relocation mappings. 342 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations. 343 (parse_imm16): Add support for the new 21bit and 13bit relocations. 344 * or1korbis.cpu (f-disp26): Don't assume SI. 345 (f-disp21): New pc-relative 21-bit 13 shifted to right. 346 (insn-opcode): Add ADRP. 347 (l-adrp): New instruction. 348 3492018-10-05 Richard Henderson <rth@twiddle.net> 350 351 * or1k.opc: Add RTYPE_ enum. 352 (INVALID_STORE_RELOC): New string. 353 (or1k_imm16_relocs): New array array. 354 (parse_reloc): New static function that just does the parsing. 355 (parse_imm16): New static function for generic parsing. 356 (parse_simm16): Change to just call parse_imm16. 357 (parse_simm16_split): New function. 358 (parse_uimm16): Change to call parse_imm16. 359 (parse_uimm16_split): New function. 360 * or1korbis.cpu (simm16-split): Change to use new simm16_split. 361 (uimm16-split): Change to use new uimm16_split. 362 3632018-07-24 Alan Modra <amodra@gmail.com> 364 365 PR 23430 366 * or1kcommon.cpu (spr-reg-indices): Fix description typo. 367 3682018-05-09 Sebastian Rasmussen <sebras@gmail.com> 369 370 * or1kcommon.cpu (spr-reg-info): Typo fix. 371 3722018-03-03 Alan Modra <amodra@gmail.com> 373 374 * frv.opc: Include opintl.h. 375 (add_next_to_vliw): Use opcodes_error_handler to print error. 376 Standardize error message. 377 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. 378 3792018-01-13 Nick Clifton <nickc@redhat.com> 380 381 2.30 branch created. 382 3832017-03-15 Stafford Horne <shorne@gmail.com> 384 385 * or1kcommon.cpu: Add pc set semantics to also update ppc. 386 3872016-10-06 Alan Modra <amodra@gmail.com> 388 389 * mep.opc (expand_string): Add fall through comment. 390 3912016-03-03 Alan Modra <amodra@gmail.com> 392 393 * fr30.cpu (f-m4): Replace bogus comment with a better guess 394 at what is really going on. 395 3962016-03-02 Alan Modra <amodra@gmail.com> 397 398 * fr30.cpu (f-m4): Replace -1 << 4 with -16. 399 4002016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> 401 402 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to 403 a constant to better align disassembler output. 404 4052014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 406 407 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. 408 4092014-06-12 Alan Modra <amodra@gmail.com> 410 411 * or1k.opc: Whitespace fixes. 412 4132014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 414 415 * or1korbis.cpu (h-atomic-reserve): New hardware. 416 (h-atomic-address): Likewise. 417 (insn-opcode): Add opcodes for LWA and SWA. 418 (atomic-reserve): New operand. 419 (atomic-address): Likewise. 420 (l-lwa, l-swa): New instructions. 421 (l-lbs): Fix typo in comment. 422 (store-insn): Clear atomic reserve on store to atomic-address. 423 Fix register names in fmt field. 424 4252014-04-22 Christian Svensson <blue@cmd.nu> 426 427 * openrisc.cpu: Delete. 428 * openrisc.opc: Delete. 429 * or1k.cpu: New file. 430 * or1k.opc: New file. 431 * or1kcommon.cpu: New file. 432 * or1korbis.cpu: New file. 433 * or1korfpx.cpu: New file. 434 4352013-12-07 Mike Frysinger <vapier@gentoo.org> 436 437 * epiphany.opc: Remove +x file mode. 438 4392013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 440 441 PR binutils/15241 442 * lm32.cpu (Control and status registers): Add CFG2, PSW, 443 TLBVADDR, TLBPADDR and TLBBADVADDR. 444 4452012-11-30 Oleg Raikhman <oleg@adapteva.com> 446 Joern Rennecke <joern.rennecke@embecosm.com> 447 448 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 449 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 450 (testset-insn): Add NO_DIS attribute to t.l. 451 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 452 (move-insns): Add NO-DIS attribute to cmov.l. 453 (op-mmr-movts): Add NO-DIS attribute to movts.l. 454 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 455 (op-rrr): Add NO-DIS attribute to .l. 456 (shift-rrr): Add NO-DIS attribute to .l. 457 (op-shift-rri): Add NO-DIS attribute to i32.l. 458 (bitrl, movtl): Add NO-DIS attribute. 459 (op-iextrrr): Add NO-DIS attribute to .l 460 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 461 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 462 4632012-02-27 Alan Modra <amodra@gmail.com> 464 465 * mt.opc (print_dollarhex): Trim values to 32 bits. 466 4672011-12-15 Nick Clifton <nickc@redhat.com> 468 469 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 470 hosts. 471 4722011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 473 474 * epiphany.opc (parse_branch_addr): Fix type of valuep. 475 Cast value before printing it as a long. 476 (parse_postindex): Fix type of valuep. 477 4782011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 479 480 * cpu/epiphany.cpu: New file. 481 * cpu/epiphany.opc: New file. 482 4832011-08-22 Nick Clifton <nickc@redhat.com> 484 485 * fr30.cpu: Newly contributed file. 486 * fr30.opc: Likewise. 487 * ip2k.cpu: Likewise. 488 * ip2k.opc: Likewise. 489 * mep-avc.cpu: Likewise. 490 * mep-avc2.cpu: Likewise. 491 * mep-c5.cpu: Likewise. 492 * mep-core.cpu: Likewise. 493 * mep-default.cpu: Likewise. 494 * mep-ext-cop.cpu: Likewise. 495 * mep-fmax.cpu: Likewise. 496 * mep-h1.cpu: Likewise. 497 * mep-ivc2.cpu: Likewise. 498 * mep-rhcop.cpu: Likewise. 499 * mep-sample-ucidsp.cpu: Likewise. 500 * mep.cpu: Likewise. 501 * mep.opc: Likewise. 502 * openrisc.cpu: Likewise. 503 * openrisc.opc: Likewise. 504 * xstormy16.cpu: Likewise. 505 * xstormy16.opc: Likewise. 506 5072010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 508 509 * frv.opc: #undef DEBUG. 510 5112010-07-03 DJ Delorie <dj@delorie.com> 512 513 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 514 5152010-02-11 Doug Evans <dje@sebabeach.org> 516 517 * m32r.cpu (HASH-PREFIX): Delete. 518 (duhpo, dshpo): New pmacros. 519 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 520 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 521 attribute, define with dshpo. 522 (uimm24): Delete HASH-PREFIX attribute. 523 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 524 (print_signed_with_hash_prefix): New function. 525 (print_unsigned_with_hash_prefix): New function. 526 * xc16x.cpu (dowh): New pmacro. 527 (upof16): Define with dowh, specify print handler. 528 (qbit, qlobit, qhibit): Ditto. 529 (upag16): Ditto. 530 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 531 (print_with_dot_prefix): New functions. 532 (print_with_pof_prefix, print_with_pag_prefix): New functions. 533 5342010-01-24 Doug Evans <dje@sebabeach.org> 535 536 * frv.cpu (floating-point-conversion): Update call to fp conv op. 537 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 538 conditional-floating-point-conversion, ne-floating-point-conversion, 539 float-parallel-mul-add-double-semantics): Ditto. 540 5412010-01-05 Doug Evans <dje@sebabeach.org> 542 543 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 544 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 545 5462010-01-02 Doug Evans <dje@sebabeach.org> 547 548 * m32c.opc (parse_signed16): Fix typo. 549 5502009-12-11 Nick Clifton <nickc@redhat.com> 551 552 * frv.opc: Fix shadowed variable warnings. 553 * m32c.opc: Fix shadowed variable warnings. 554 5552009-11-14 Doug Evans <dje@sebabeach.org> 556 557 Must use VOID expression in VOID context. 558 * xc16x.cpu (mov4): Fix mode of `sequence'. 559 (mov9, mov10): Ditto. 560 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 561 (callr, callseg, calls, trap, rets, reti): Ditto. 562 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 563 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 564 (exts, exts1, extsr, extsr1, prior): Ditto. 565 5662009-10-23 Doug Evans <dje@sebabeach.org> 567 568 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 569 cgen-ops.h -> cgen/basic-ops.h. 570 5712009-09-25 Alan Modra <amodra@bigpond.net.au> 572 573 * m32r.cpu (stb-plus): Typo fix. 574 5752009-09-23 Doug Evans <dje@sebabeach.org> 576 577 * m32r.cpu (sth-plus): Fix address mode and calculation. 578 (stb-plus): Ditto. 579 (clrpsw): Fix mask calculation. 580 (bset, bclr, btst): Make mode in bit calculation match expression. 581 582 * xc16x.cpu (rtl-version): Set to 0.8. 583 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 584 make uppercase. Remove unnecessary name-prefix spec. 585 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 586 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 587 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 588 (h-cr): New hardware. 589 (muls): Comment out parts that won't compile, add fixme. 590 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 591 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 592 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 593 5942009-07-16 Doug Evans <dje@sebabeach.org> 595 596 * cpu/simplify.inc (*): One line doc strings don't need \n. 597 (df): Invoke define-full-ifield instead of claiming it's an alias. 598 (dno): Define. 599 (dnop): Mark as deprecated. 600 6012009-06-22 Alan Modra <amodra@bigpond.net.au> 602 603 * m32c.opc (parse_lab_5_3): Use correct enum. 604 6052009-01-07 Hans-Peter Nilsson <hp@axis.com> 606 607 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 608 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 609 (media-arith-sat-semantics): Explicitly sign- or zero-extend 610 arguments of "operation" to DI using "mode" and the new pmacros. 611 6122009-01-03 Hans-Peter Nilsson <hp@axis.com> 613 614 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 615 of number 2, PID. 616 6172008-12-23 Jon Beniston <jon@beniston.com> 618 619 * lm32.cpu: New file. 620 * lm32.opc: New file. 621 6222008-01-29 Alan Modra <amodra@bigpond.net.au> 623 624 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 625 to source. 626 6272007-10-22 Hans-Peter Nilsson <hp@axis.com> 628 629 * cris.cpu (movs, movu): Use result of extension operation when 630 updating flags. 631 6322007-07-04 Nick Clifton <nickc@redhat.com> 633 634 * cris.cpu: Update copyright notice to refer to GPLv3. 635 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 636 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 637 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 638 xc16x.opc: Likewise. 639 * iq2000.cpu: Fix copyright notice to refer to FSF. 640 6412007-04-30 Mark Salter <msalter@sadr.localdomain> 642 643 * frv.cpu (spr-names): Support new coprocessor SPR registers. 644 6452007-04-20 Nick Clifton <nickc@redhat.com> 646 647 * xc16x.cpu: Restore after accidentally overwriting this file with 648 xc16x.opc. 649 6502007-03-29 DJ Delorie <dj@redhat.com> 651 652 * m32c.cpu (Imm-8-s4n): Fix print hook. 653 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 654 (arith-jnz-imm4-dst-defn): Make relaxable. 655 (arith-jnz16-imm4-dst-defn): Fix encodings. 656 6572007-03-20 DJ Delorie <dj@redhat.com> 658 659 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 660 mem20): New. 661 (src16-16-20-An-relative-*): New. 662 (dst16-*-20-An-relative-*): New. 663 (dst16-16-16sa-*): New 664 (dst16-16-16ar-*): New 665 (dst32-16-16sa-Unprefixed-*): New 666 (jsri): Fix operands. 667 (setzx): Fix encoding. 668 6692007-03-08 Alan Modra <amodra@bigpond.net.au> 670 671 * m32r.opc: Formatting. 672 6732006-05-22 Nick Clifton <nickc@redhat.com> 674 675 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 676 6772006-04-10 DJ Delorie <dj@redhat.com> 678 679 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 680 decides if this function accepts symbolic constants or not. 681 (parse_signed_bitbase): Likewise. 682 (parse_unsigned_bitbase8): Pass the new parameter. 683 (parse_unsigned_bitbase11): Likewise. 684 (parse_unsigned_bitbase16): Likewise. 685 (parse_unsigned_bitbase19): Likewise. 686 (parse_unsigned_bitbase27): Likewise. 687 (parse_signed_bitbase8): Likewise. 688 (parse_signed_bitbase11): Likewise. 689 (parse_signed_bitbase19): Likewise. 690 6912006-03-13 DJ Delorie <dj@redhat.com> 692 693 * m32c.cpu (Bit3-S): New. 694 (btst:s): New. 695 * m32c.opc (parse_bit3_S): New. 696 697 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 698 (btst): Add optional :G suffix for MACH32. 699 (or.b:S): New. 700 (pop.w:G): Add optional :G suffix for MACH16. 701 (push.b.imm): Fix syntax. 702 7032006-03-10 DJ Delorie <dj@redhat.com> 704 705 * m32c.cpu (mul.l): New. 706 (mulu.l): New. 707 7082006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 709 710 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 711 an error message otherwise. 712 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 713 Fix up comments to correctly describe the functions. 714 7152006-02-24 DJ Delorie <dj@redhat.com> 716 717 * m32c.cpu (RL_TYPE): New attribute, with macros. 718 (Lab-8-24): Add RELAX. 719 (unary-insn-defn-g, binary-arith-imm-dst-defn, 720 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 721 (binary-arith-src-dst-defn): Add 2ADDR attribute. 722 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 723 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 724 attribute. 725 (jsri16, jsri32): Add 1ADDR attribute. 726 (jsr32.w, jsr32.a): Add JUMP attribute. 727 7282006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 729 Anil Paranjape <anilp1@kpitcummins.com> 730 Shilin Shakti <shilins@kpitcummins.com> 731 732 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 733 description. 734 * xc16x.opc: New file containing supporting XC16C routines. 735 7362006-02-10 Nick Clifton <nickc@redhat.com> 737 738 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 739 7402006-01-06 DJ Delorie <dj@redhat.com> 741 742 * m32c.cpu (mov.w:q): Fix mode. 743 (push32.b.imm): Likewise, for the comment. 744 7452005-12-16 Nathan Sidwell <nathan@codesourcery.com> 746 747 Second part of ms1 to mt renaming. 748 * mt.cpu (define-arch, define-isa): Set name to mt. 749 (define-mach): Adjust. 750 * mt.opc (CGEN_ASM_HASH): Update. 751 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 752 (parse_loopsize, parse_imm16): Adjust. 753 7542005-12-13 DJ Delorie <dj@redhat.com> 755 756 * m32c.cpu (jsri): Fix order so register names aren't treated as 757 symbols. 758 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 759 indexwd, indexws): Fix encodings. 760 7612005-12-12 Nathan Sidwell <nathan@codesourcery.com> 762 763 * mt.cpu: Rename from ms1.cpu. 764 * mt.opc: Rename from ms1.opc. 765 7662005-12-06 Hans-Peter Nilsson <hp@axis.com> 767 768 * cris.cpu (simplecris-common-writable-specregs) 769 (simplecris-common-readable-specregs): Split from 770 simplecris-common-specregs. All users changed. 771 (cris-implemented-writable-specregs-v0) 772 (cris-implemented-readable-specregs-v0): Similar from 773 cris-implemented-specregs-v0. 774 (cris-implemented-writable-specregs-v3) 775 (cris-implemented-readable-specregs-v3) 776 (cris-implemented-writable-specregs-v8) 777 (cris-implemented-readable-specregs-v8) 778 (cris-implemented-writable-specregs-v10) 779 (cris-implemented-readable-specregs-v10) 780 (cris-implemented-writable-specregs-v32) 781 (cris-implemented-readable-specregs-v32): Similar. 782 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 783 insns and specializations. 784 7852005-11-08 Nathan Sidwell <nathan@codesourcery.com> 786 787 Add ms2 788 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 789 model. 790 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 791 f-cb2incr, f-rc3): New fields. 792 (LOOP): New instruction. 793 (JAL-HAZARD): New hazard. 794 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 795 New operands. 796 (mul, muli, dbnz, iflush): Enable for ms2 797 (jal, reti): Has JAL-HAZARD. 798 (ldctxt, ldfb, stfb): Only ms1. 799 (fbcb): Only ms1,ms1-003. 800 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 801 fbcbincrs, mfbcbincrs): Enable for ms2. 802 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 803 * ms1.opc (parse_loopsize): New. 804 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 805 (print_pcrel): New. 806 8072005-10-28 Dave Brolley <brolley@redhat.com> 808 809 Contribute the following change: 810 2003-09-24 Dave Brolley <brolley@redhat.com> 811 812 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 813 CGEN_ATTR_VALUE_TYPE. 814 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 815 Use cgen_bitset_intersect_p. 816 8172005-10-27 DJ Delorie <dj@redhat.com> 818 819 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 820 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 821 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 822 imm operand is needed. 823 (adjnz, sbjnz): Pass the right operands. 824 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 825 unary-insn): Add -g variants for opcodes that need to support :G. 826 (not.BW:G, push.BW:G): Call it. 827 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 828 stzx16-imm8-imm8-abs16): Fix operand typos. 829 * m32c.opc (m32c_asm_hash): Support bnCND. 830 (parse_signed4n, print_signed4n): New. 831 8322005-10-26 DJ Delorie <dj@redhat.com> 833 834 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 835 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 836 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 837 dsp8[sp] is signed. 838 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 839 (mov.BW:S r0,r1): Fix typo r1l->r1. 840 (tst): Allow :G suffix. 841 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 842 8432005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 844 845 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 846 8472005-10-25 DJ Delorie <dj@redhat.com> 848 849 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 850 making one a macro of the other. 851 8522005-10-21 DJ Delorie <dj@redhat.com> 853 854 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 855 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 856 indexld, indexls): .w variants have `1' bit. 857 (rot32.b): QI, not SI. 858 (rot32.w): HI, not SI. 859 (xchg16): HI for .w variant. 860 8612005-10-19 Nick Clifton <nickc@redhat.com> 862 863 * m32r.opc (parse_slo16): Fix bad application of previous patch. 864 8652005-10-18 Andreas Schwab <schwab@suse.de> 866 867 * m32r.opc (parse_slo16): Better version of previous patch. 868 8692005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 870 871 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 872 size. 873 8742005-07-25 DJ Delorie <dj@redhat.com> 875 876 * m32c.opc (parse_unsigned8): Add %dsp8(). 877 (parse_signed8): Add %hi8(). 878 (parse_unsigned16): Add %dsp16(). 879 (parse_signed16): Add %lo16() and %hi16(). 880 (parse_lab_5_3): Make valuep a bfd_vma *. 881 8822005-07-18 Nick Clifton <nickc@redhat.com> 883 884 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 885 components. 886 (f-lab32-jmp-s): Fix insertion sequence. 887 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 888 (Dsp-40-s8): Make parameter be signed. 889 (Dsp-40-s16): Likewise. 890 (Dsp-48-s8): Likewise. 891 (Dsp-48-s16): Likewise. 892 (Imm-13-u3): Likewise. (Despite its name!) 893 (BitBase16-16-s8): Make the parameter be unsigned. 894 (BitBase16-8-u11-S): Likewise. 895 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 896 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 897 relaxation. 898 899 * m32c.opc: Fix formatting. 900 Use safe-ctype.h instead of ctype.h 901 Move duplicated code sequences into a macro. 902 Fix compile time warnings about signedness mismatches. 903 Remove dead code. 904 (parse_lab_5_3): New parser function. 905 9062005-07-16 Jim Blandy <jimb@redhat.com> 907 908 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 909 to represent isa sets. 910 9112005-07-15 Jim Blandy <jimb@redhat.com> 912 913 * m32c.cpu, m32c.opc: Fix copyright. 914 9152005-07-14 Jim Blandy <jimb@redhat.com> 916 917 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 918 9192005-07-14 Alan Modra <amodra@bigpond.net.au> 920 921 * ms1.opc (print_dollarhex): Correct format string. 922 9232005-07-06 Alan Modra <amodra@bigpond.net.au> 924 925 * iq2000.cpu: Include from binutils cpu dir. 926 9272005-07-05 Nick Clifton <nickc@redhat.com> 928 929 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 930 unsigned in order to avoid compile time warnings about sign 931 conflicts. 932 933 * ms1.opc (parse_*): Likewise. 934 (parse_imm16): Use a "void *" as it is passed both signed and 935 unsigned arguments. 936 9372005-07-01 Nick Clifton <nickc@redhat.com> 938 939 * frv.opc: Update to ISO C90 function declaration style. 940 * iq2000.opc: Likewise. 941 * m32r.opc: Likewise. 942 * sh.opc: Likewise. 943 9442005-06-15 Dave Brolley <brolley@redhat.com> 945 946 Contributed by Red Hat. 947 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 948 * ms1.opc: New file. Written by Stan Cox. 949 9502005-05-10 Nick Clifton <nickc@redhat.com> 951 952 * Update the address and phone number of the FSF organization in 953 the GPL notices in the following files: 954 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 955 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 956 sh64-media.cpu, simplify.inc 957 9582005-02-24 Alan Modra <amodra@bigpond.net.au> 959 960 * frv.opc (parse_A): Warning fix. 961 9622005-02-23 Nick Clifton <nickc@redhat.com> 963 964 * frv.opc: Fixed compile time warnings about differing signed'ness 965 of pointers passed to functions. 966 * m32r.opc: Likewise. 967 9682005-02-11 Nick Clifton <nickc@redhat.com> 969 970 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 971 'bfd_vma *' in order avoid compile time warning message. 972 9732005-01-28 Hans-Peter Nilsson <hp@axis.com> 974 975 * cris.cpu (mstep): Add missing insn. 976 9772005-01-25 Alexandre Oliva <aoliva@redhat.com> 978 979 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 980 * frv.cpu: Add support for TLS annotations in loads and calll. 981 * frv.opc (parse_symbolic_address): New. 982 (parse_ldd_annotation): New. 983 (parse_call_annotation): New. 984 (parse_ld_annotation): New. 985 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 986 Introduce TLS relocations. 987 (parse_d12, parse_s12, parse_u12): Likewise. 988 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 989 (parse_call_label, print_at): New. 990 9912004-12-21 Mikael Starvik <starvik@axis.com> 992 993 * cris.cpu (cris-set-mem): Correct integral write semantics. 994 9952004-11-29 Hans-Peter Nilsson <hp@axis.com> 996 997 * cris.cpu: New file. 998 9992004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 1000 1001 * iq2000.cpu: Added quotes around macro arguments so that they 1002 will work with newer versions of guile. 1003 10042004-10-27 Nick Clifton <nickc@redhat.com> 1005 1006 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 1007 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 1008 operand. 1009 * iq2000.cpu (dnop index): Rename to _index to avoid complications 1010 with guile. 1011 10122004-08-27 Richard Sandiford <rsandifo@redhat.com> 1013 1014 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 1015 10162004-05-15 Nick Clifton <nickc@redhat.com> 1017 1018 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 1019 10202004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1021 1022 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 1023 10242004-03-01 Richard Sandiford <rsandifo@redhat.com> 1025 1026 * frv.cpu (define-arch frv): Add fr450 mach. 1027 (define-mach fr450): New. 1028 (define-model fr450): New. Add profile units to every fr450 insn. 1029 (define-attr UNIT): Add MDCUTSSI. 1030 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 1031 (define-attr AUDIO): New boolean. 1032 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 1033 (f-LRA-null, f-TLBPR-null): New fields. 1034 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 1035 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 1036 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 1037 (LRA-null, TLBPR-null): New macros. 1038 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 1039 (load-real-address): New macro. 1040 (lrai, lrad, tlbpr): New instructions. 1041 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 1042 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 1043 (mdcutssi): Change UNIT attribute to MDCUTSSI. 1044 (media-low-clear-semantics, media-scope-limit-semantics) 1045 (media-quad-limit, media-quad-shift): New macros. 1046 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 1047 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 1048 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 1049 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 1050 (fr450_unit_mapping): New array. 1051 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 1052 for new MDCUTSSI unit. 1053 (fr450_check_insn_major_constraints): New function. 1054 (check_insn_major_constraints): Use it. 1055 10562004-03-01 Richard Sandiford <rsandifo@redhat.com> 1057 1058 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 1059 (scutss): Change unit to I0. 1060 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 1061 (mqsaths): Fix FR400-MAJOR categorization. 1062 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 1063 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 1064 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 1065 combinations. 1066 10672004-03-01 Richard Sandiford <rsandifo@redhat.com> 1068 1069 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 1070 (rstb, rsth, rst, rstd, rstq): Delete. 1071 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 1072 10732004-02-23 Nick Clifton <nickc@redhat.com> 1074 1075 * Apply these patches from Renesas: 1076 1077 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1078 1079 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 1080 disassembling codes for 0x*2 addresses. 1081 1082 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1083 1084 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 1085 1086 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1087 1088 * cpu/m32r.cpu : Add new model m32r2. 1089 Add new instructions. 1090 Replace occurrances of 'Mitsubishi' with 'Renesas'. 1091 Changed PIPE attr of push from O to OS. 1092 Care for Little-endian of M32R. 1093 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 1094 Care for Little-endian of M32R. 1095 (parse_slo16): signed extension for value. 1096 10972004-02-20 Andrew Cagney <cagney@redhat.com> 1098 1099 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 1100 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 1101 1102 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 1103 written by Ben Elliston. 1104 11052004-01-14 Richard Sandiford <rsandifo@redhat.com> 1106 1107 * frv.cpu (UNIT): Add IACC. 1108 (iacc-multiply-r-r): Use it. 1109 * frv.opc (fr400_unit_mapping): Add entry for IACC. 1110 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 1111 11122004-01-06 Alexandre Oliva <aoliva@redhat.com> 1113 1114 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 1115 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 1116 cut&paste errors in shifting/truncating numerical operands. 1117 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 1118 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 1119 (parse_uslo16): Likewise. 1120 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 1121 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 1122 (parse_s12): Likewise. 1123 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 1124 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 1125 (parse_uslo16): Likewise. 1126 (parse_uhi16): Parse gothi and gotfuncdeschi. 1127 (parse_d12): Parse got12 and gotfuncdesc12. 1128 (parse_s12): Likewise. 1129 11302003-10-10 Dave Brolley <brolley@redhat.com> 1131 1132 * frv.cpu (dnpmop): New p-macro. 1133 (GRdoublek): Use dnpmop. 1134 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 1135 (store-double-r-r): Use (.sym regtype doublek). 1136 (r-store-double): Ditto. 1137 (store-double-r-r-u): Ditto. 1138 (conditional-store-double): Ditto. 1139 (conditional-store-double-u): Ditto. 1140 (store-double-r-simm): Ditto. 1141 (fmovs): Assign to UNIT FMALL. 1142 11432003-10-06 Dave Brolley <brolley@redhat.com> 1144 1145 * frv.cpu, frv.opc: Add support for fr550. 1146 11472003-09-24 Dave Brolley <brolley@redhat.com> 1148 1149 * frv.cpu (u-commit): New modelling unit for fr500. 1150 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 1151 (commit-r): Use u-commit model for fr500. 1152 (commit): Ditto. 1153 (conditional-float-binary-op): Take profiling data as an argument. 1154 Update callers. 1155 (ne-float-binary-op): Ditto. 1156 11572003-09-19 Michael Snyder <msnyder@redhat.com> 1158 1159 * frv.cpu (nldqi): Delete unimplemented instruction. 1160 11612003-09-12 Dave Brolley <brolley@redhat.com> 1162 1163 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 1164 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 1165 frv_ref_SI to get input register referenced for profiling. 1166 (clear-ne-flag-all): Pass insn profiling in as an argument. 1167 (clrgr,clrfr,clrga,clrfa): Add profiling information. 1168 11692003-09-11 Michael Snyder <msnyder@redhat.com> 1170 1171 * frv.cpu: Typographical corrections. 1172 11732003-09-09 Dave Brolley <brolley@redhat.com> 1174 1175 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 1176 (conditional-media-dual-complex, media-quad-complex): Likewise. 1177 11782003-09-04 Dave Brolley <brolley@redhat.com> 1179 1180 * frv.cpu (register-transfer): Pass in all attributes in on argument. 1181 Update all callers. 1182 (conditional-register-transfer): Ditto. 1183 (cache-preload): Ditto. 1184 (floating-point-conversion): Ditto. 1185 (floating-point-neg): Ditto. 1186 (float-abs): Ditto. 1187 (float-binary-op-s): Ditto. 1188 (conditional-float-binary-op): Ditto. 1189 (ne-float-binary-op): Ditto. 1190 (float-dual-arith): Ditto. 1191 (ne-float-dual-arith): Ditto. 1192 11932003-09-03 Dave Brolley <brolley@redhat.com> 1194 1195 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 1196 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 1197 MCLRACC-1. 1198 (A): Removed operand. 1199 (A0,A1): New operands replace operand A. 1200 (mnop): Now a real insn 1201 (mclracc): Removed insn. 1202 (mclracc-0, mclracc-1): New insns replace mclracc. 1203 (all insns): Use new UNIT attributes. 1204 12052003-08-21 Nick Clifton <nickc@redhat.com> 1206 1207 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 1208 and u-media-dual-btoh with output parameter. 1209 (cmbtoh): Add profiling hack. 1210 12112003-08-19 Michael Snyder <msnyder@redhat.com> 1212 1213 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 1214 12152003-06-10 Doug Evans <dje@sebabeach.org> 1216 1217 * frv.cpu: Add IDOC attribute. 1218 12192003-06-06 Andrew Cagney <cagney@redhat.com> 1220 1221 Contributed by Red Hat. 1222 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 1223 Stan Cox, and Frank Ch. Eigler. 1224 * iq2000.opc: New file. Written by Ben Elliston, Frank 1225 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 1226 * iq2000m.cpu: New file. Written by Jeff Johnston. 1227 * iq10.cpu: New file. Written by Jeff Johnston. 1228 12292003-06-05 Nick Clifton <nickc@redhat.com> 1230 1231 * frv.cpu (FRintieven): New operand. An even-numbered only 1232 version of the FRinti operand. 1233 (FRintjeven): Likewise for FRintj. 1234 (FRintkeven): Likewise for FRintk. 1235 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 1236 media-quad-arith-sat-semantics, media-quad-arith-sat, 1237 conditional-media-quad-arith-sat, mdunpackh, 1238 media-quad-multiply-semantics, media-quad-multiply, 1239 conditional-media-quad-multiply, media-quad-complex-i, 1240 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 1241 conditional-media-quad-multiply-acc, munpackh, 1242 media-quad-multiply-cross-acc-semantics, mdpackh, 1243 media-quad-multiply-cross-acc, mbtoh-semantics, 1244 media-quad-cross-multiply-cross-acc-semantics, 1245 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 1246 media-quad-cross-multiply-acc-semantics, cmbtoh, 1247 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 1248 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 1249 cmhtob): Use new operands. 1250 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 1251 (parse_even_register): New function. 1252 12532003-06-03 Nick Clifton <nickc@redhat.com> 1254 1255 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 1256 immediate value not unsigned. 1257 12582003-06-03 Andrew Cagney <cagney@redhat.com> 1259 1260 Contributed by Red Hat. 1261 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 1262 and Eric Christopher. 1263 * frv.opc: New file. Written by Catherine Moore, and Dave 1264 Brolley. 1265 * simplify.inc: New file. Written by Doug Evans. 1266 12672003-05-02 Andrew Cagney <cagney@redhat.com> 1268 1269 * New file. 1270 1271 1272Copyright (C) 2003-2012 Free Software Foundation, Inc. 1273 1274Copying and distribution of this file, with or without modification, 1275are permitted in any medium without royalty provided the copyright 1276notice and this notice are preserved. 1277 1278Local Variables: 1279mode: change-log 1280left-margin: 8 1281fill-column: 74 1282version-control: never 1283End: 1284