archures.texi revision 1.1.1.6
1@section Architectures 2BFD keeps one atom in a BFD describing the 3architecture of the data attached to the BFD: a pointer to a 4@code{bfd_arch_info_type}. 5 6Pointers to structures can be requested independently of a BFD 7so that an architecture's information can be interrogated 8without access to an open BFD. 9 10The architecture information is provided by each architecture package. 11The set of default architectures is selected by the macro 12@code{SELECT_ARCHITECTURES}. This is normally set up in the 13@file{config/@var{target}.mt} file of your choice. If the name is not 14defined, then all the architectures supported are included. 15 16When BFD starts up, all the architectures are called with an 17initialize method. It is up to the architecture back end to 18insert as many items into the list of architectures as it wants to; 19generally this would be one for each machine and one for the 20default case (an item with a machine field of 0). 21 22BFD's idea of an architecture is implemented in @file{archures.c}. 23 24@subsection bfd_architecture 25 26 27@strong{Description}@* 28This enum gives the object file's CPU architecture, in a 29global sense---i.e., what processor family does it belong to? 30Another field indicates which processor within 31the family is in use. The machine gives a number which 32distinguishes different versions of the architecture, 33containing, for example, 2 and 3 for Intel i960 KA and i960 KB, 34and 68020 and 68030 for Motorola 68020 and 68030. 35@example 36enum bfd_architecture 37@{ 38 bfd_arch_unknown, /* File arch not known. */ 39 bfd_arch_obscure, /* Arch known, not one of these. */ 40 bfd_arch_m68k, /* Motorola 68xxx. */ 41#define bfd_mach_m68000 1 42#define bfd_mach_m68008 2 43#define bfd_mach_m68010 3 44#define bfd_mach_m68020 4 45#define bfd_mach_m68030 5 46#define bfd_mach_m68040 6 47#define bfd_mach_m68060 7 48#define bfd_mach_cpu32 8 49#define bfd_mach_fido 9 50#define bfd_mach_mcf_isa_a_nodiv 10 51#define bfd_mach_mcf_isa_a 11 52#define bfd_mach_mcf_isa_a_mac 12 53#define bfd_mach_mcf_isa_a_emac 13 54#define bfd_mach_mcf_isa_aplus 14 55#define bfd_mach_mcf_isa_aplus_mac 15 56#define bfd_mach_mcf_isa_aplus_emac 16 57#define bfd_mach_mcf_isa_b_nousp 17 58#define bfd_mach_mcf_isa_b_nousp_mac 18 59#define bfd_mach_mcf_isa_b_nousp_emac 19 60#define bfd_mach_mcf_isa_b 20 61#define bfd_mach_mcf_isa_b_mac 21 62#define bfd_mach_mcf_isa_b_emac 22 63#define bfd_mach_mcf_isa_b_float 23 64#define bfd_mach_mcf_isa_b_float_mac 24 65#define bfd_mach_mcf_isa_b_float_emac 25 66#define bfd_mach_mcf_isa_c 26 67#define bfd_mach_mcf_isa_c_mac 27 68#define bfd_mach_mcf_isa_c_emac 28 69#define bfd_mach_mcf_isa_c_nodiv 29 70#define bfd_mach_mcf_isa_c_nodiv_mac 30 71#define bfd_mach_mcf_isa_c_nodiv_emac 31 72 bfd_arch_vax, /* DEC Vax. */ 73 bfd_arch_i960, /* Intel 960. */ 74 /* The order of the following is important. 75 lower number indicates a machine type that 76 only accepts a subset of the instructions 77 available to machines with higher numbers. 78 The exception is the "ca", which is 79 incompatible with all other machines except 80 "core". */ 81 82#define bfd_mach_i960_core 1 83#define bfd_mach_i960_ka_sa 2 84#define bfd_mach_i960_kb_sb 3 85#define bfd_mach_i960_mc 4 86#define bfd_mach_i960_xa 5 87#define bfd_mach_i960_ca 6 88#define bfd_mach_i960_jx 7 89#define bfd_mach_i960_hx 8 90 91 bfd_arch_or1k, /* OpenRISC 1000. */ 92#define bfd_mach_or1k 1 93#define bfd_mach_or1knd 2 94 95 bfd_arch_sparc, /* SPARC. */ 96#define bfd_mach_sparc 1 97/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ 98#define bfd_mach_sparc_sparclet 2 99#define bfd_mach_sparc_sparclite 3 100#define bfd_mach_sparc_v8plus 4 101#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ 102#define bfd_mach_sparc_sparclite_le 6 103#define bfd_mach_sparc_v9 7 104#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ 105#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ 106#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ 107#define bfd_mach_sparc_v8plusc 11 /* with UA2005 and T1 add'ns. */ 108#define bfd_mach_sparc_v9c 12 /* with UA2005 and T1 add'ns. */ 109#define bfd_mach_sparc_v8plusd 13 /* with UA2007 and T3 add'ns. */ 110#define bfd_mach_sparc_v9d 14 /* with UA2007 and T3 add'ns. */ 111#define bfd_mach_sparc_v8pluse 15 /* with OSA2001 and T4 add'ns (no IMA). */ 112#define bfd_mach_sparc_v9e 16 /* with OSA2001 and T4 add'ns (no IMA). */ 113#define bfd_mach_sparc_v8plusv 17 /* with OSA2011 and T4 and IMA and FJMAU add'ns. */ 114#define bfd_mach_sparc_v9v 18 /* with OSA2011 and T4 and IMA and FJMAU add'ns. */ 115#define bfd_mach_sparc_v8plusm 19 /* with OSA2015 and M7 add'ns. */ 116#define bfd_mach_sparc_v9m 20 /* with OSA2015 and M7 add'ns. */ 117#define bfd_mach_sparc_v8plusm8 21 /* with OSA2017 and M8 add'ns. */ 118#define bfd_mach_sparc_v9m8 22 /* with OSA2017 and M8 add'ns. */ 119/* Nonzero if MACH has the v9 instruction set. */ 120#define bfd_mach_sparc_v9_p(mach) \ 121 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m8 \ 122 && (mach) != bfd_mach_sparc_sparclite_le) 123/* Nonzero if MACH is a 64 bit sparc architecture. */ 124#define bfd_mach_sparc_64bit_p(mach) \ 125 ((mach) >= bfd_mach_sparc_v9 \ 126 && (mach) != bfd_mach_sparc_v8plusb \ 127 && (mach) != bfd_mach_sparc_v8plusc \ 128 && (mach) != bfd_mach_sparc_v8plusd \ 129 && (mach) != bfd_mach_sparc_v8pluse \ 130 && (mach) != bfd_mach_sparc_v8plusv \ 131 && (mach) != bfd_mach_sparc_v8plusm \ 132 && (mach) != bfd_mach_sparc_v8plusm8) 133 bfd_arch_spu, /* PowerPC SPU. */ 134#define bfd_mach_spu 256 135 bfd_arch_mips, /* MIPS Rxxxx. */ 136#define bfd_mach_mips3000 3000 137#define bfd_mach_mips3900 3900 138#define bfd_mach_mips4000 4000 139#define bfd_mach_mips4010 4010 140#define bfd_mach_mips4100 4100 141#define bfd_mach_mips4111 4111 142#define bfd_mach_mips4120 4120 143#define bfd_mach_mips4300 4300 144#define bfd_mach_mips4400 4400 145#define bfd_mach_mips4600 4600 146#define bfd_mach_mips4650 4650 147#define bfd_mach_mips5000 5000 148#define bfd_mach_mips5400 5400 149#define bfd_mach_mips5500 5500 150#define bfd_mach_mips5900 5900 151#define bfd_mach_mips6000 6000 152#define bfd_mach_mips7000 7000 153#define bfd_mach_mips8000 8000 154#define bfd_mach_mips9000 9000 155#define bfd_mach_mips10000 10000 156#define bfd_mach_mips12000 12000 157#define bfd_mach_mips14000 14000 158#define bfd_mach_mips16000 16000 159#define bfd_mach_mips16 16 160#define bfd_mach_mips5 5 161#define bfd_mach_mips_loongson_2e 3001 162#define bfd_mach_mips_loongson_2f 3002 163#define bfd_mach_mips_loongson_3a 3003 164#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01. */ 165#define bfd_mach_mips_octeon 6501 166#define bfd_mach_mips_octeonp 6601 167#define bfd_mach_mips_octeon2 6502 168#define bfd_mach_mips_octeon3 6503 169#define bfd_mach_mips_xlr 887682 /* decimal 'XLR'. */ 170#define bfd_mach_mips_interaptiv_mr2 736550 /* decimal 'IA2'. */ 171#define bfd_mach_mipsisa32 32 172#define bfd_mach_mipsisa32r2 33 173#define bfd_mach_mipsisa32r3 34 174#define bfd_mach_mipsisa32r5 36 175#define bfd_mach_mipsisa32r6 37 176#define bfd_mach_mipsisa64 64 177#define bfd_mach_mipsisa64r2 65 178#define bfd_mach_mipsisa64r3 66 179#define bfd_mach_mipsisa64r5 68 180#define bfd_mach_mipsisa64r6 69 181#define bfd_mach_mips_micromips 96 182 bfd_arch_i386, /* Intel 386. */ 183#define bfd_mach_i386_intel_syntax (1 << 0) 184#define bfd_mach_i386_i8086 (1 << 1) 185#define bfd_mach_i386_i386 (1 << 2) 186#define bfd_mach_x86_64 (1 << 3) 187#define bfd_mach_x64_32 (1 << 4) 188#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) 189#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) 190#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) 191 bfd_arch_l1om, /* Intel L1OM. */ 192#define bfd_mach_l1om (1 << 5) 193#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) 194 bfd_arch_k1om, /* Intel K1OM. */ 195#define bfd_mach_k1om (1 << 6) 196#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) 197#define bfd_mach_i386_nacl (1 << 7) 198#define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl) 199#define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl) 200#define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl) 201 bfd_arch_iamcu, /* Intel MCU. */ 202#define bfd_mach_iamcu (1 << 8) 203#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu) 204#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax) 205 bfd_arch_we32k, /* AT&T WE32xxx. */ 206 bfd_arch_tahoe, /* CCI/Harris Tahoe. */ 207 bfd_arch_i860, /* Intel 860. */ 208 bfd_arch_i370, /* IBM 360/370 Mainframes. */ 209 bfd_arch_romp, /* IBM ROMP PC/RT. */ 210 bfd_arch_convex, /* Convex. */ 211 bfd_arch_m88k, /* Motorola 88xxx. */ 212 bfd_arch_m98k, /* Motorola 98xxx. */ 213 bfd_arch_pyramid, /* Pyramid Technology. */ 214 bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300). */ 215#define bfd_mach_h8300 1 216#define bfd_mach_h8300h 2 217#define bfd_mach_h8300s 3 218#define bfd_mach_h8300hn 4 219#define bfd_mach_h8300sn 5 220#define bfd_mach_h8300sx 6 221#define bfd_mach_h8300sxn 7 222 bfd_arch_pdp11, /* DEC PDP-11. */ 223 bfd_arch_plugin, 224 bfd_arch_powerpc, /* PowerPC. */ 225#define bfd_mach_ppc 32 226#define bfd_mach_ppc64 64 227#define bfd_mach_ppc_403 403 228#define bfd_mach_ppc_403gc 4030 229#define bfd_mach_ppc_405 405 230#define bfd_mach_ppc_505 505 231#define bfd_mach_ppc_601 601 232#define bfd_mach_ppc_602 602 233#define bfd_mach_ppc_603 603 234#define bfd_mach_ppc_ec603e 6031 235#define bfd_mach_ppc_604 604 236#define bfd_mach_ppc_620 620 237#define bfd_mach_ppc_630 630 238#define bfd_mach_ppc_750 750 239#define bfd_mach_ppc_860 860 240#define bfd_mach_ppc_a35 35 241#define bfd_mach_ppc_rs64ii 642 242#define bfd_mach_ppc_rs64iii 643 243#define bfd_mach_ppc_7400 7400 244#define bfd_mach_ppc_e500 500 245#define bfd_mach_ppc_e500mc 5001 246#define bfd_mach_ppc_e500mc64 5005 247#define bfd_mach_ppc_e5500 5006 248#define bfd_mach_ppc_e6500 5007 249#define bfd_mach_ppc_titan 83 250#define bfd_mach_ppc_vle 84 251 bfd_arch_rs6000, /* IBM RS/6000. */ 252#define bfd_mach_rs6k 6000 253#define bfd_mach_rs6k_rs1 6001 254#define bfd_mach_rs6k_rsc 6003 255#define bfd_mach_rs6k_rs2 6002 256 bfd_arch_hppa, /* HP PA RISC. */ 257#define bfd_mach_hppa10 10 258#define bfd_mach_hppa11 11 259#define bfd_mach_hppa20 20 260#define bfd_mach_hppa20w 25 261 bfd_arch_d10v, /* Mitsubishi D10V. */ 262#define bfd_mach_d10v 1 263#define bfd_mach_d10v_ts2 2 264#define bfd_mach_d10v_ts3 3 265 bfd_arch_d30v, /* Mitsubishi D30V. */ 266 bfd_arch_dlx, /* DLX. */ 267 bfd_arch_m68hc11, /* Motorola 68HC11. */ 268 bfd_arch_m68hc12, /* Motorola 68HC12. */ 269#define bfd_mach_m6812_default 0 270#define bfd_mach_m6812 1 271#define bfd_mach_m6812s 2 272 bfd_arch_m9s12x, /* Freescale S12X. */ 273 bfd_arch_m9s12xg, /* Freescale XGATE. */ 274 bfd_arch_z8k, /* Zilog Z8000. */ 275#define bfd_mach_z8001 1 276#define bfd_mach_z8002 2 277 bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500). */ 278 bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH). */ 279#define bfd_mach_sh 1 280#define bfd_mach_sh2 0x20 281#define bfd_mach_sh_dsp 0x2d 282#define bfd_mach_sh2a 0x2a 283#define bfd_mach_sh2a_nofpu 0x2b 284#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 285#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 286#define bfd_mach_sh2a_or_sh4 0x2a3 287#define bfd_mach_sh2a_or_sh3e 0x2a4 288#define bfd_mach_sh2e 0x2e 289#define bfd_mach_sh3 0x30 290#define bfd_mach_sh3_nommu 0x31 291#define bfd_mach_sh3_dsp 0x3d 292#define bfd_mach_sh3e 0x3e 293#define bfd_mach_sh4 0x40 294#define bfd_mach_sh4_nofpu 0x41 295#define bfd_mach_sh4_nommu_nofpu 0x42 296#define bfd_mach_sh4a 0x4a 297#define bfd_mach_sh4a_nofpu 0x4b 298#define bfd_mach_sh4al_dsp 0x4d 299#define bfd_mach_sh5 0x50 300 bfd_arch_alpha, /* Dec Alpha. */ 301#define bfd_mach_alpha_ev4 0x10 302#define bfd_mach_alpha_ev5 0x20 303#define bfd_mach_alpha_ev6 0x30 304 bfd_arch_arm, /* Advanced Risc Machines ARM. */ 305#define bfd_mach_arm_unknown 0 306#define bfd_mach_arm_2 1 307#define bfd_mach_arm_2a 2 308#define bfd_mach_arm_3 3 309#define bfd_mach_arm_3M 4 310#define bfd_mach_arm_4 5 311#define bfd_mach_arm_4T 6 312#define bfd_mach_arm_5 7 313#define bfd_mach_arm_5T 8 314#define bfd_mach_arm_5TE 9 315#define bfd_mach_arm_XScale 10 316#define bfd_mach_arm_ep9312 11 317#define bfd_mach_arm_iWMMXt 12 318#define bfd_mach_arm_iWMMXt2 13 319 bfd_arch_nds32, /* Andes NDS32. */ 320#define bfd_mach_n1 1 321#define bfd_mach_n1h 2 322#define bfd_mach_n1h_v2 3 323#define bfd_mach_n1h_v3 4 324#define bfd_mach_n1h_v3m 5 325 bfd_arch_ns32k, /* National Semiconductors ns32000. */ 326 bfd_arch_w65, /* WDC 65816. */ 327 bfd_arch_tic30, /* Texas Instruments TMS320C30. */ 328 bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X. */ 329#define bfd_mach_tic3x 30 330#define bfd_mach_tic4x 40 331 bfd_arch_tic54x, /* Texas Instruments TMS320C54X. */ 332 bfd_arch_tic6x, /* Texas Instruments TMS320C6X. */ 333 bfd_arch_tic80, /* TI TMS320c80 (MVP). */ 334 bfd_arch_v850, /* NEC V850. */ 335 bfd_arch_v850_rh850,/* NEC V850 (using RH850 ABI). */ 336#define bfd_mach_v850 1 337#define bfd_mach_v850e 'E' 338#define bfd_mach_v850e1 '1' 339#define bfd_mach_v850e2 0x4532 340#define bfd_mach_v850e2v3 0x45325633 341#define bfd_mach_v850e3v5 0x45335635 /* ('E'|'3'|'V'|'5'). */ 342 bfd_arch_arc, /* ARC Cores. */ 343#define bfd_mach_arc_a4 0 344#define bfd_mach_arc_a5 1 345#define bfd_mach_arc_arc600 2 346#define bfd_mach_arc_arc601 4 347#define bfd_mach_arc_arc700 3 348#define bfd_mach_arc_arcv2 5 349 bfd_arch_m32c, /* Renesas M16C/M32C. */ 350#define bfd_mach_m16c 0x75 351#define bfd_mach_m32c 0x78 352 bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D). */ 353#define bfd_mach_m32r 1 /* For backwards compatibility. */ 354#define bfd_mach_m32rx 'x' 355#define bfd_mach_m32r2 '2' 356 bfd_arch_mn10200, /* Matsushita MN10200. */ 357 bfd_arch_mn10300, /* Matsushita MN10300. */ 358#define bfd_mach_mn10300 300 359#define bfd_mach_am33 330 360#define bfd_mach_am33_2 332 361 bfd_arch_fr30, 362#define bfd_mach_fr30 0x46523330 363 bfd_arch_frv, 364#define bfd_mach_frv 1 365#define bfd_mach_frvsimple 2 366#define bfd_mach_fr300 300 367#define bfd_mach_fr400 400 368#define bfd_mach_fr450 450 369#define bfd_mach_frvtomcat 499 /* fr500 prototype. */ 370#define bfd_mach_fr500 500 371#define bfd_mach_fr550 550 372 bfd_arch_moxie, /* The moxie processor. */ 373#define bfd_mach_moxie 1 374 bfd_arch_ft32, /* The ft32 processor. */ 375#define bfd_mach_ft32 1 376#define bfd_mach_ft32b 2 377 bfd_arch_mcore, 378 bfd_arch_mep, 379#define bfd_mach_mep 1 380#define bfd_mach_mep_h1 0x6831 381#define bfd_mach_mep_c5 0x6335 382 bfd_arch_metag, 383#define bfd_mach_metag 1 384 bfd_arch_ia64, /* HP/Intel ia64. */ 385#define bfd_mach_ia64_elf64 64 386#define bfd_mach_ia64_elf32 32 387 bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ 388#define bfd_mach_ip2022 1 389#define bfd_mach_ip2022ext 2 390 bfd_arch_iq2000, /* Vitesse IQ2000. */ 391#define bfd_mach_iq2000 1 392#define bfd_mach_iq10 2 393 bfd_arch_epiphany, /* Adapteva EPIPHANY. */ 394#define bfd_mach_epiphany16 1 395#define bfd_mach_epiphany32 2 396 bfd_arch_mt, 397#define bfd_mach_ms1 1 398#define bfd_mach_mrisc2 2 399#define bfd_mach_ms2 3 400 bfd_arch_pj, 401 bfd_arch_avr, /* Atmel AVR microcontrollers. */ 402#define bfd_mach_avr1 1 403#define bfd_mach_avr2 2 404#define bfd_mach_avr25 25 405#define bfd_mach_avr3 3 406#define bfd_mach_avr31 31 407#define bfd_mach_avr35 35 408#define bfd_mach_avr4 4 409#define bfd_mach_avr5 5 410#define bfd_mach_avr51 51 411#define bfd_mach_avr6 6 412#define bfd_mach_avrtiny 100 413#define bfd_mach_avrxmega1 101 414#define bfd_mach_avrxmega2 102 415#define bfd_mach_avrxmega3 103 416#define bfd_mach_avrxmega4 104 417#define bfd_mach_avrxmega5 105 418#define bfd_mach_avrxmega6 106 419#define bfd_mach_avrxmega7 107 420 bfd_arch_bfin, /* ADI Blackfin. */ 421#define bfd_mach_bfin 1 422 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ 423#define bfd_mach_cr16 1 424 bfd_arch_cr16c, /* National Semiconductor CompactRISC. */ 425#define bfd_mach_cr16c 1 426 bfd_arch_crx, /* National Semiconductor CRX. */ 427#define bfd_mach_crx 1 428 bfd_arch_cris, /* Axis CRIS. */ 429#define bfd_mach_cris_v0_v10 255 430#define bfd_mach_cris_v32 32 431#define bfd_mach_cris_v10_v32 1032 432 bfd_arch_riscv, 433#define bfd_mach_riscv32 132 434#define bfd_mach_riscv64 164 435 bfd_arch_rl78, 436#define bfd_mach_rl78 0x75 437 bfd_arch_rx, /* Renesas RX. */ 438#define bfd_mach_rx 0x75 439 bfd_arch_s390, /* IBM s390. */ 440#define bfd_mach_s390_31 31 441#define bfd_mach_s390_64 64 442 bfd_arch_score, /* Sunplus score. */ 443#define bfd_mach_score3 3 444#define bfd_mach_score7 7 445 bfd_arch_mmix, /* Donald Knuth's educational processor. */ 446 bfd_arch_xstormy16, 447#define bfd_mach_xstormy16 1 448 bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ 449#define bfd_mach_msp11 11 450#define bfd_mach_msp110 110 451#define bfd_mach_msp12 12 452#define bfd_mach_msp13 13 453#define bfd_mach_msp14 14 454#define bfd_mach_msp15 15 455#define bfd_mach_msp16 16 456#define bfd_mach_msp20 20 457#define bfd_mach_msp21 21 458#define bfd_mach_msp22 22 459#define bfd_mach_msp23 23 460#define bfd_mach_msp24 24 461#define bfd_mach_msp26 26 462#define bfd_mach_msp31 31 463#define bfd_mach_msp32 32 464#define bfd_mach_msp33 33 465#define bfd_mach_msp41 41 466#define bfd_mach_msp42 42 467#define bfd_mach_msp43 43 468#define bfd_mach_msp44 44 469#define bfd_mach_msp430x 45 470#define bfd_mach_msp46 46 471#define bfd_mach_msp47 47 472#define bfd_mach_msp54 54 473 bfd_arch_xc16x, /* Infineon's XC16X Series. */ 474#define bfd_mach_xc16x 1 475#define bfd_mach_xc16xl 2 476#define bfd_mach_xc16xs 3 477 bfd_arch_xgate, /* Freescale XGATE. */ 478#define bfd_mach_xgate 1 479 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ 480#define bfd_mach_xtensa 1 481 bfd_arch_z80, 482#define bfd_mach_z80strict 1 /* No undocumented opcodes. */ 483#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ 484#define bfd_mach_z80full 7 /* All undocumented instructions. */ 485#define bfd_mach_r800 11 /* R800: successor with multiplication. */ 486 bfd_arch_lm32, /* Lattice Mico32. */ 487#define bfd_mach_lm32 1 488 bfd_arch_microblaze,/* Xilinx MicroBlaze. */ 489 bfd_arch_tilepro, /* Tilera TILEPro. */ 490 bfd_arch_tilegx, /* Tilera TILE-Gx. */ 491#define bfd_mach_tilepro 1 492#define bfd_mach_tilegx 1 493#define bfd_mach_tilegx32 2 494 bfd_arch_aarch64, /* AArch64. */ 495#define bfd_mach_aarch64 0 496#define bfd_mach_aarch64_ilp32 32 497 bfd_arch_nios2, /* Nios II. */ 498#define bfd_mach_nios2 0 499#define bfd_mach_nios2r1 1 500#define bfd_mach_nios2r2 2 501 bfd_arch_visium, /* Visium. */ 502#define bfd_mach_visium 1 503 bfd_arch_wasm32, /* WebAssembly. */ 504#define bfd_mach_wasm32 1 505 bfd_arch_pru, /* PRU. */ 506#define bfd_mach_pru 0 507 bfd_arch_last 508 @}; 509@end example 510 511@subsection bfd_arch_info 512 513 514@strong{Description}@* 515This structure contains information on architectures for use 516within BFD. 517@example 518 519typedef struct bfd_arch_info 520@{ 521 int bits_per_word; 522 int bits_per_address; 523 int bits_per_byte; 524 enum bfd_architecture arch; 525 unsigned long mach; 526 const char *arch_name; 527 const char *printable_name; 528 unsigned int section_align_power; 529 /* TRUE if this is the default machine for the architecture. 530 The default arch should be the first entry for an arch so that 531 all the entries for that arch can be accessed via @code{next}. */ 532 bfd_boolean the_default; 533 const struct bfd_arch_info * (*compatible) (const struct bfd_arch_info *, 534 const struct bfd_arch_info *); 535 536 bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); 537 538 /* Allocate via bfd_malloc and return a fill buffer of size COUNT. If 539 IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is 540 TRUE, the buffer contains code. */ 541 void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian, 542 bfd_boolean code); 543 544 const struct bfd_arch_info *next; 545@} 546bfd_arch_info_type; 547 548@end example 549 550@findex bfd_printable_name 551@subsubsection @code{bfd_printable_name} 552@strong{Synopsis} 553@example 554const char *bfd_printable_name (bfd *abfd); 555@end example 556@strong{Description}@* 557Return a printable string representing the architecture and machine 558from the pointer to the architecture info structure. 559 560@findex bfd_scan_arch 561@subsubsection @code{bfd_scan_arch} 562@strong{Synopsis} 563@example 564const bfd_arch_info_type *bfd_scan_arch (const char *string); 565@end example 566@strong{Description}@* 567Figure out if BFD supports any cpu which could be described with 568the name @var{string}. Return a pointer to an @code{arch_info} 569structure if a machine is found, otherwise NULL. 570 571@findex bfd_arch_list 572@subsubsection @code{bfd_arch_list} 573@strong{Synopsis} 574@example 575const char **bfd_arch_list (void); 576@end example 577@strong{Description}@* 578Return a freshly malloced NULL-terminated vector of the names 579of all the valid BFD architectures. Do not modify the names. 580 581@findex bfd_arch_get_compatible 582@subsubsection @code{bfd_arch_get_compatible} 583@strong{Synopsis} 584@example 585const bfd_arch_info_type *bfd_arch_get_compatible 586 (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns); 587@end example 588@strong{Description}@* 589Determine whether two BFDs' architectures and machine types 590are compatible. Calculates the lowest common denominator 591between the two architectures and machine types implied by 592the BFDs and returns a pointer to an @code{arch_info} structure 593describing the compatible machine. 594 595@findex bfd_default_arch_struct 596@subsubsection @code{bfd_default_arch_struct} 597@strong{Description}@* 598The @code{bfd_default_arch_struct} is an item of 599@code{bfd_arch_info_type} which has been initialized to a fairly 600generic state. A BFD starts life by pointing to this 601structure, until the correct back end has determined the real 602architecture of the file. 603@example 604extern const bfd_arch_info_type bfd_default_arch_struct; 605@end example 606 607@findex bfd_set_arch_info 608@subsubsection @code{bfd_set_arch_info} 609@strong{Synopsis} 610@example 611void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); 612@end example 613@strong{Description}@* 614Set the architecture info of @var{abfd} to @var{arg}. 615 616@findex bfd_default_set_arch_mach 617@subsubsection @code{bfd_default_set_arch_mach} 618@strong{Synopsis} 619@example 620bfd_boolean bfd_default_set_arch_mach 621 (bfd *abfd, enum bfd_architecture arch, unsigned long mach); 622@end example 623@strong{Description}@* 624Set the architecture and machine type in BFD @var{abfd} 625to @var{arch} and @var{mach}. Find the correct 626pointer to a structure and insert it into the @code{arch_info} 627pointer. 628 629@findex bfd_get_arch 630@subsubsection @code{bfd_get_arch} 631@strong{Synopsis} 632@example 633enum bfd_architecture bfd_get_arch (bfd *abfd); 634@end example 635@strong{Description}@* 636Return the enumerated type which describes the BFD @var{abfd}'s 637architecture. 638 639@findex bfd_get_mach 640@subsubsection @code{bfd_get_mach} 641@strong{Synopsis} 642@example 643unsigned long bfd_get_mach (bfd *abfd); 644@end example 645@strong{Description}@* 646Return the long type which describes the BFD @var{abfd}'s 647machine. 648 649@findex bfd_arch_bits_per_byte 650@subsubsection @code{bfd_arch_bits_per_byte} 651@strong{Synopsis} 652@example 653unsigned int bfd_arch_bits_per_byte (bfd *abfd); 654@end example 655@strong{Description}@* 656Return the number of bits in one of the BFD @var{abfd}'s 657architecture's bytes. 658 659@findex bfd_arch_bits_per_address 660@subsubsection @code{bfd_arch_bits_per_address} 661@strong{Synopsis} 662@example 663unsigned int bfd_arch_bits_per_address (bfd *abfd); 664@end example 665@strong{Description}@* 666Return the number of bits in one of the BFD @var{abfd}'s 667architecture's addresses. 668 669@findex bfd_default_compatible 670@subsubsection @code{bfd_default_compatible} 671@strong{Synopsis} 672@example 673const bfd_arch_info_type *bfd_default_compatible 674 (const bfd_arch_info_type *a, const bfd_arch_info_type *b); 675@end example 676@strong{Description}@* 677The default function for testing for compatibility. 678 679@findex bfd_default_scan 680@subsubsection @code{bfd_default_scan} 681@strong{Synopsis} 682@example 683bfd_boolean bfd_default_scan 684 (const struct bfd_arch_info *info, const char *string); 685@end example 686@strong{Description}@* 687The default function for working out whether this is an 688architecture hit and a machine hit. 689 690@findex bfd_get_arch_info 691@subsubsection @code{bfd_get_arch_info} 692@strong{Synopsis} 693@example 694const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); 695@end example 696@strong{Description}@* 697Return the architecture info struct in @var{abfd}. 698 699@findex bfd_lookup_arch 700@subsubsection @code{bfd_lookup_arch} 701@strong{Synopsis} 702@example 703const bfd_arch_info_type *bfd_lookup_arch 704 (enum bfd_architecture arch, unsigned long machine); 705@end example 706@strong{Description}@* 707Look for the architecture info structure which matches the 708arguments @var{arch} and @var{machine}. A machine of 0 matches the 709machine/architecture structure which marks itself as the 710default. 711 712@findex bfd_printable_arch_mach 713@subsubsection @code{bfd_printable_arch_mach} 714@strong{Synopsis} 715@example 716const char *bfd_printable_arch_mach 717 (enum bfd_architecture arch, unsigned long machine); 718@end example 719@strong{Description}@* 720Return a printable string representing the architecture and 721machine type. 722 723This routine is depreciated. 724 725@findex bfd_octets_per_byte 726@subsubsection @code{bfd_octets_per_byte} 727@strong{Synopsis} 728@example 729unsigned int bfd_octets_per_byte (bfd *abfd); 730@end example 731@strong{Description}@* 732Return the number of octets (8-bit quantities) per target byte 733(minimum addressable unit). In most cases, this will be one, but some 734DSP targets have 16, 32, or even 48 bits per byte. 735 736@findex bfd_arch_mach_octets_per_byte 737@subsubsection @code{bfd_arch_mach_octets_per_byte} 738@strong{Synopsis} 739@example 740unsigned int bfd_arch_mach_octets_per_byte 741 (enum bfd_architecture arch, unsigned long machine); 742@end example 743@strong{Description}@* 744See bfd_octets_per_byte. 745 746This routine is provided for those cases where a bfd * is not 747available 748 749@findex bfd_arch_default_fill 750@subsubsection @code{bfd_arch_default_fill} 751@strong{Synopsis} 752@example 753void *bfd_arch_default_fill (bfd_size_type count, 754 bfd_boolean is_bigendian, 755 bfd_boolean code); 756@end example 757@strong{Description}@* 758Allocate via bfd_malloc and return a fill buffer of size COUNT. 759If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If 760CODE is TRUE, the buffer contains code. 761 762