archures.texi revision 1.1.1.4
1@section Architectures 2BFD keeps one atom in a BFD describing the 3architecture of the data attached to the BFD: a pointer to a 4@code{bfd_arch_info_type}. 5 6Pointers to structures can be requested independently of a BFD 7so that an architecture's information can be interrogated 8without access to an open BFD. 9 10The architecture information is provided by each architecture package. 11The set of default architectures is selected by the macro 12@code{SELECT_ARCHITECTURES}. This is normally set up in the 13@file{config/@var{target}.mt} file of your choice. If the name is not 14defined, then all the architectures supported are included. 15 16When BFD starts up, all the architectures are called with an 17initialize method. It is up to the architecture back end to 18insert as many items into the list of architectures as it wants to; 19generally this would be one for each machine and one for the 20default case (an item with a machine field of 0). 21 22BFD's idea of an architecture is implemented in @file{archures.c}. 23 24@subsection bfd_architecture 25 26 27@strong{Description}@* 28This enum gives the object file's CPU architecture, in a 29global sense---i.e., what processor family does it belong to? 30Another field indicates which processor within 31the family is in use. The machine gives a number which 32distinguishes different versions of the architecture, 33containing, for example, 2 and 3 for Intel i960 KA and i960 KB, 34and 68020 and 68030 for Motorola 68020 and 68030. 35@example 36enum bfd_architecture 37@{ 38 bfd_arch_unknown, /* File arch not known. */ 39 bfd_arch_obscure, /* Arch known, not one of these. */ 40 bfd_arch_m68k, /* Motorola 68xxx */ 41#define bfd_mach_m68000 1 42#define bfd_mach_m68008 2 43#define bfd_mach_m68010 3 44#define bfd_mach_m68020 4 45#define bfd_mach_m68030 5 46#define bfd_mach_m68040 6 47#define bfd_mach_m68060 7 48#define bfd_mach_cpu32 8 49#define bfd_mach_fido 9 50#define bfd_mach_mcf_isa_a_nodiv 10 51#define bfd_mach_mcf_isa_a 11 52#define bfd_mach_mcf_isa_a_mac 12 53#define bfd_mach_mcf_isa_a_emac 13 54#define bfd_mach_mcf_isa_aplus 14 55#define bfd_mach_mcf_isa_aplus_mac 15 56#define bfd_mach_mcf_isa_aplus_emac 16 57#define bfd_mach_mcf_isa_b_nousp 17 58#define bfd_mach_mcf_isa_b_nousp_mac 18 59#define bfd_mach_mcf_isa_b_nousp_emac 19 60#define bfd_mach_mcf_isa_b 20 61#define bfd_mach_mcf_isa_b_mac 21 62#define bfd_mach_mcf_isa_b_emac 22 63#define bfd_mach_mcf_isa_b_float 23 64#define bfd_mach_mcf_isa_b_float_mac 24 65#define bfd_mach_mcf_isa_b_float_emac 25 66#define bfd_mach_mcf_isa_c 26 67#define bfd_mach_mcf_isa_c_mac 27 68#define bfd_mach_mcf_isa_c_emac 28 69#define bfd_mach_mcf_isa_c_nodiv 29 70#define bfd_mach_mcf_isa_c_nodiv_mac 30 71#define bfd_mach_mcf_isa_c_nodiv_emac 31 72 bfd_arch_vax, /* DEC Vax */ 73 bfd_arch_i960, /* Intel 960 */ 74 /* The order of the following is important. 75 lower number indicates a machine type that 76 only accepts a subset of the instructions 77 available to machines with higher numbers. 78 The exception is the "ca", which is 79 incompatible with all other machines except 80 "core". */ 81 82#define bfd_mach_i960_core 1 83#define bfd_mach_i960_ka_sa 2 84#define bfd_mach_i960_kb_sb 3 85#define bfd_mach_i960_mc 4 86#define bfd_mach_i960_xa 5 87#define bfd_mach_i960_ca 6 88#define bfd_mach_i960_jx 7 89#define bfd_mach_i960_hx 8 90 91 bfd_arch_or1k, /* OpenRISC 1000 */ 92#define bfd_mach_or1k 1 93#define bfd_mach_or1knd 2 94 95 bfd_arch_sparc, /* SPARC */ 96#define bfd_mach_sparc 1 97/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ 98#define bfd_mach_sparc_sparclet 2 99#define bfd_mach_sparc_sparclite 3 100#define bfd_mach_sparc_v8plus 4 101#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ 102#define bfd_mach_sparc_sparclite_le 6 103#define bfd_mach_sparc_v9 7 104#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ 105#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ 106#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ 107/* Nonzero if MACH has the v9 instruction set. */ 108#define bfd_mach_sparc_v9_p(mach) \ 109 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ 110 && (mach) != bfd_mach_sparc_sparclite_le) 111/* Nonzero if MACH is a 64 bit sparc architecture. */ 112#define bfd_mach_sparc_64bit_p(mach) \ 113 ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb) 114 bfd_arch_spu, /* PowerPC SPU */ 115#define bfd_mach_spu 256 116 bfd_arch_mips, /* MIPS Rxxxx */ 117#define bfd_mach_mips3000 3000 118#define bfd_mach_mips3900 3900 119#define bfd_mach_mips4000 4000 120#define bfd_mach_mips4010 4010 121#define bfd_mach_mips4100 4100 122#define bfd_mach_mips4111 4111 123#define bfd_mach_mips4120 4120 124#define bfd_mach_mips4300 4300 125#define bfd_mach_mips4400 4400 126#define bfd_mach_mips4600 4600 127#define bfd_mach_mips4650 4650 128#define bfd_mach_mips5000 5000 129#define bfd_mach_mips5400 5400 130#define bfd_mach_mips5500 5500 131#define bfd_mach_mips5900 5900 132#define bfd_mach_mips6000 6000 133#define bfd_mach_mips7000 7000 134#define bfd_mach_mips8000 8000 135#define bfd_mach_mips9000 9000 136#define bfd_mach_mips10000 10000 137#define bfd_mach_mips12000 12000 138#define bfd_mach_mips14000 14000 139#define bfd_mach_mips16000 16000 140#define bfd_mach_mips16 16 141#define bfd_mach_mips5 5 142#define bfd_mach_mips_loongson_2e 3001 143#define bfd_mach_mips_loongson_2f 3002 144#define bfd_mach_mips_loongson_3a 3003 145#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ 146#define bfd_mach_mips_octeon 6501 147#define bfd_mach_mips_octeonp 6601 148#define bfd_mach_mips_octeon2 6502 149#define bfd_mach_mips_octeon3 6503 150#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */ 151#define bfd_mach_mipsisa32 32 152#define bfd_mach_mipsisa32r2 33 153#define bfd_mach_mipsisa32r3 34 154#define bfd_mach_mipsisa32r5 36 155#define bfd_mach_mipsisa32r6 37 156#define bfd_mach_mipsisa64 64 157#define bfd_mach_mipsisa64r2 65 158#define bfd_mach_mipsisa64r3 66 159#define bfd_mach_mipsisa64r5 68 160#define bfd_mach_mipsisa64r6 69 161#define bfd_mach_mips_micromips 96 162 bfd_arch_i386, /* Intel 386 */ 163#define bfd_mach_i386_intel_syntax (1 << 0) 164#define bfd_mach_i386_i8086 (1 << 1) 165#define bfd_mach_i386_i386 (1 << 2) 166#define bfd_mach_x86_64 (1 << 3) 167#define bfd_mach_x64_32 (1 << 4) 168#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) 169#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) 170#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) 171 bfd_arch_l1om, /* Intel L1OM */ 172#define bfd_mach_l1om (1 << 5) 173#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) 174 bfd_arch_k1om, /* Intel K1OM */ 175#define bfd_mach_k1om (1 << 6) 176#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) 177#define bfd_mach_i386_nacl (1 << 7) 178#define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl) 179#define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl) 180#define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl) 181 bfd_arch_iamcu, /* Intel MCU */ 182#define bfd_mach_iamcu (1 << 8) 183#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu) 184#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax) 185 bfd_arch_we32k, /* AT&T WE32xxx */ 186 bfd_arch_tahoe, /* CCI/Harris Tahoe */ 187 bfd_arch_i860, /* Intel 860 */ 188 bfd_arch_i370, /* IBM 360/370 Mainframes */ 189 bfd_arch_romp, /* IBM ROMP PC/RT */ 190 bfd_arch_convex, /* Convex */ 191 bfd_arch_m88k, /* Motorola 88xxx */ 192 bfd_arch_m98k, /* Motorola 98xxx */ 193 bfd_arch_pyramid, /* Pyramid Technology */ 194 bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */ 195#define bfd_mach_h8300 1 196#define bfd_mach_h8300h 2 197#define bfd_mach_h8300s 3 198#define bfd_mach_h8300hn 4 199#define bfd_mach_h8300sn 5 200#define bfd_mach_h8300sx 6 201#define bfd_mach_h8300sxn 7 202 bfd_arch_pdp11, /* DEC PDP-11 */ 203 bfd_arch_plugin, 204 bfd_arch_powerpc, /* PowerPC */ 205#define bfd_mach_ppc 32 206#define bfd_mach_ppc64 64 207#define bfd_mach_ppc_403 403 208#define bfd_mach_ppc_403gc 4030 209#define bfd_mach_ppc_405 405 210#define bfd_mach_ppc_505 505 211#define bfd_mach_ppc_601 601 212#define bfd_mach_ppc_602 602 213#define bfd_mach_ppc_603 603 214#define bfd_mach_ppc_ec603e 6031 215#define bfd_mach_ppc_604 604 216#define bfd_mach_ppc_620 620 217#define bfd_mach_ppc_630 630 218#define bfd_mach_ppc_750 750 219#define bfd_mach_ppc_860 860 220#define bfd_mach_ppc_a35 35 221#define bfd_mach_ppc_rs64ii 642 222#define bfd_mach_ppc_rs64iii 643 223#define bfd_mach_ppc_7400 7400 224#define bfd_mach_ppc_e500 500 225#define bfd_mach_ppc_e500mc 5001 226#define bfd_mach_ppc_e500mc64 5005 227#define bfd_mach_ppc_e5500 5006 228#define bfd_mach_ppc_e6500 5007 229#define bfd_mach_ppc_titan 83 230#define bfd_mach_ppc_vle 84 231 bfd_arch_rs6000, /* IBM RS/6000 */ 232#define bfd_mach_rs6k 6000 233#define bfd_mach_rs6k_rs1 6001 234#define bfd_mach_rs6k_rsc 6003 235#define bfd_mach_rs6k_rs2 6002 236 bfd_arch_hppa, /* HP PA RISC */ 237#define bfd_mach_hppa10 10 238#define bfd_mach_hppa11 11 239#define bfd_mach_hppa20 20 240#define bfd_mach_hppa20w 25 241 bfd_arch_d10v, /* Mitsubishi D10V */ 242#define bfd_mach_d10v 1 243#define bfd_mach_d10v_ts2 2 244#define bfd_mach_d10v_ts3 3 245 bfd_arch_d30v, /* Mitsubishi D30V */ 246 bfd_arch_dlx, /* DLX */ 247 bfd_arch_m68hc11, /* Motorola 68HC11 */ 248 bfd_arch_m68hc12, /* Motorola 68HC12 */ 249#define bfd_mach_m6812_default 0 250#define bfd_mach_m6812 1 251#define bfd_mach_m6812s 2 252 bfd_arch_m9s12x, /* Freescale S12X */ 253 bfd_arch_m9s12xg, /* Freescale XGATE */ 254 bfd_arch_z8k, /* Zilog Z8000 */ 255#define bfd_mach_z8001 1 256#define bfd_mach_z8002 2 257 bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */ 258 bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */ 259#define bfd_mach_sh 1 260#define bfd_mach_sh2 0x20 261#define bfd_mach_sh_dsp 0x2d 262#define bfd_mach_sh2a 0x2a 263#define bfd_mach_sh2a_nofpu 0x2b 264#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 265#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 266#define bfd_mach_sh2a_or_sh4 0x2a3 267#define bfd_mach_sh2a_or_sh3e 0x2a4 268#define bfd_mach_sh2e 0x2e 269#define bfd_mach_sh3 0x30 270#define bfd_mach_sh3_nommu 0x31 271#define bfd_mach_sh3_dsp 0x3d 272#define bfd_mach_sh3e 0x3e 273#define bfd_mach_sh4 0x40 274#define bfd_mach_sh4_nofpu 0x41 275#define bfd_mach_sh4_nommu_nofpu 0x42 276#define bfd_mach_sh4a 0x4a 277#define bfd_mach_sh4a_nofpu 0x4b 278#define bfd_mach_sh4al_dsp 0x4d 279#define bfd_mach_sh5 0x50 280 bfd_arch_alpha, /* Dec Alpha */ 281#define bfd_mach_alpha_ev4 0x10 282#define bfd_mach_alpha_ev5 0x20 283#define bfd_mach_alpha_ev6 0x30 284 bfd_arch_arm, /* Advanced Risc Machines ARM. */ 285#define bfd_mach_arm_unknown 0 286#define bfd_mach_arm_2 1 287#define bfd_mach_arm_2a 2 288#define bfd_mach_arm_3 3 289#define bfd_mach_arm_3M 4 290#define bfd_mach_arm_4 5 291#define bfd_mach_arm_4T 6 292#define bfd_mach_arm_5 7 293#define bfd_mach_arm_5T 8 294#define bfd_mach_arm_5TE 9 295#define bfd_mach_arm_XScale 10 296#define bfd_mach_arm_ep9312 11 297#define bfd_mach_arm_iWMMXt 12 298#define bfd_mach_arm_iWMMXt2 13 299 bfd_arch_nds32, /* Andes NDS32 */ 300#define bfd_mach_n1 1 301#define bfd_mach_n1h 2 302#define bfd_mach_n1h_v2 3 303#define bfd_mach_n1h_v3 4 304#define bfd_mach_n1h_v3m 5 305 bfd_arch_ns32k, /* National Semiconductors ns32000 */ 306 bfd_arch_w65, /* WDC 65816 */ 307 bfd_arch_tic30, /* Texas Instruments TMS320C30 */ 308 bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */ 309#define bfd_mach_tic3x 30 310#define bfd_mach_tic4x 40 311 bfd_arch_tic54x, /* Texas Instruments TMS320C54X */ 312 bfd_arch_tic6x, /* Texas Instruments TMS320C6X */ 313 bfd_arch_tic80, /* TI TMS320c80 (MVP) */ 314 bfd_arch_v850, /* NEC V850 */ 315 bfd_arch_v850_rh850,/* NEC V850 (using RH850 ABI) */ 316#define bfd_mach_v850 1 317#define bfd_mach_v850e 'E' 318#define bfd_mach_v850e1 '1' 319#define bfd_mach_v850e2 0x4532 320#define bfd_mach_v850e2v3 0x45325633 321#define bfd_mach_v850e3v5 0x45335635 /* ('E'|'3'|'V'|'5') */ 322 bfd_arch_arc, /* ARC Cores */ 323#define bfd_mach_arc_a4 0 324#define bfd_mach_arc_a5 1 325#define bfd_mach_arc_arc600 2 326#define bfd_mach_arc_arc601 4 327#define bfd_mach_arc_arc700 3 328#define bfd_mach_arc_arcv2 5 329 bfd_arch_m32c, /* Renesas M16C/M32C. */ 330#define bfd_mach_m16c 0x75 331#define bfd_mach_m32c 0x78 332 bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */ 333#define bfd_mach_m32r 1 /* For backwards compatibility. */ 334#define bfd_mach_m32rx 'x' 335#define bfd_mach_m32r2 '2' 336 bfd_arch_mn10200, /* Matsushita MN10200 */ 337 bfd_arch_mn10300, /* Matsushita MN10300 */ 338#define bfd_mach_mn10300 300 339#define bfd_mach_am33 330 340#define bfd_mach_am33_2 332 341 bfd_arch_fr30, 342#define bfd_mach_fr30 0x46523330 343 bfd_arch_frv, 344#define bfd_mach_frv 1 345#define bfd_mach_frvsimple 2 346#define bfd_mach_fr300 300 347#define bfd_mach_fr400 400 348#define bfd_mach_fr450 450 349#define bfd_mach_frvtomcat 499 /* fr500 prototype */ 350#define bfd_mach_fr500 500 351#define bfd_mach_fr550 550 352 bfd_arch_moxie, /* The moxie processor */ 353#define bfd_mach_moxie 1 354 bfd_arch_ft32, /* The ft32 processor */ 355#define bfd_mach_ft32 1 356 bfd_arch_mcore, 357 bfd_arch_mep, 358#define bfd_mach_mep 1 359#define bfd_mach_mep_h1 0x6831 360#define bfd_mach_mep_c5 0x6335 361 bfd_arch_metag, 362#define bfd_mach_metag 1 363 bfd_arch_ia64, /* HP/Intel ia64 */ 364#define bfd_mach_ia64_elf64 64 365#define bfd_mach_ia64_elf32 32 366 bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ 367#define bfd_mach_ip2022 1 368#define bfd_mach_ip2022ext 2 369 bfd_arch_iq2000, /* Vitesse IQ2000. */ 370#define bfd_mach_iq2000 1 371#define bfd_mach_iq10 2 372 bfd_arch_epiphany, /* Adapteva EPIPHANY */ 373#define bfd_mach_epiphany16 1 374#define bfd_mach_epiphany32 2 375 bfd_arch_mt, 376#define bfd_mach_ms1 1 377#define bfd_mach_mrisc2 2 378#define bfd_mach_ms2 3 379 bfd_arch_pj, 380 bfd_arch_avr, /* Atmel AVR microcontrollers. */ 381#define bfd_mach_avr1 1 382#define bfd_mach_avr2 2 383#define bfd_mach_avr25 25 384#define bfd_mach_avr3 3 385#define bfd_mach_avr31 31 386#define bfd_mach_avr35 35 387#define bfd_mach_avr4 4 388#define bfd_mach_avr5 5 389#define bfd_mach_avr51 51 390#define bfd_mach_avr6 6 391#define bfd_mach_avrtiny 100 392#define bfd_mach_avrxmega1 101 393#define bfd_mach_avrxmega2 102 394#define bfd_mach_avrxmega3 103 395#define bfd_mach_avrxmega4 104 396#define bfd_mach_avrxmega5 105 397#define bfd_mach_avrxmega6 106 398#define bfd_mach_avrxmega7 107 399 bfd_arch_bfin, /* ADI Blackfin */ 400#define bfd_mach_bfin 1 401 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ 402#define bfd_mach_cr16 1 403 bfd_arch_cr16c, /* National Semiconductor CompactRISC. */ 404#define bfd_mach_cr16c 1 405 bfd_arch_crx, /* National Semiconductor CRX. */ 406#define bfd_mach_crx 1 407 bfd_arch_cris, /* Axis CRIS */ 408#define bfd_mach_cris_v0_v10 255 409#define bfd_mach_cris_v32 32 410#define bfd_mach_cris_v10_v32 1032 411 bfd_arch_rl78, 412#define bfd_mach_rl78 0x75 413 bfd_arch_rx, /* Renesas RX. */ 414#define bfd_mach_rx 0x75 415 bfd_arch_s390, /* IBM s390 */ 416#define bfd_mach_s390_31 31 417#define bfd_mach_s390_64 64 418 bfd_arch_score, /* Sunplus score */ 419#define bfd_mach_score3 3 420#define bfd_mach_score7 7 421 bfd_arch_mmix, /* Donald Knuth's educational processor. */ 422 bfd_arch_xstormy16, 423#define bfd_mach_xstormy16 1 424 bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ 425#define bfd_mach_msp11 11 426#define bfd_mach_msp110 110 427#define bfd_mach_msp12 12 428#define bfd_mach_msp13 13 429#define bfd_mach_msp14 14 430#define bfd_mach_msp15 15 431#define bfd_mach_msp16 16 432#define bfd_mach_msp20 20 433#define bfd_mach_msp21 21 434#define bfd_mach_msp22 22 435#define bfd_mach_msp23 23 436#define bfd_mach_msp24 24 437#define bfd_mach_msp26 26 438#define bfd_mach_msp31 31 439#define bfd_mach_msp32 32 440#define bfd_mach_msp33 33 441#define bfd_mach_msp41 41 442#define bfd_mach_msp42 42 443#define bfd_mach_msp43 43 444#define bfd_mach_msp44 44 445#define bfd_mach_msp430x 45 446#define bfd_mach_msp46 46 447#define bfd_mach_msp47 47 448#define bfd_mach_msp54 54 449 bfd_arch_xc16x, /* Infineon's XC16X Series. */ 450#define bfd_mach_xc16x 1 451#define bfd_mach_xc16xl 2 452#define bfd_mach_xc16xs 3 453 bfd_arch_xgate, /* Freescale XGATE */ 454#define bfd_mach_xgate 1 455 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ 456#define bfd_mach_xtensa 1 457 bfd_arch_z80, 458#define bfd_mach_z80strict 1 /* No undocumented opcodes. */ 459#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ 460#define bfd_mach_z80full 7 /* All undocumented instructions. */ 461#define bfd_mach_r800 11 /* R800: successor with multiplication. */ 462 bfd_arch_lm32, /* Lattice Mico32 */ 463#define bfd_mach_lm32 1 464 bfd_arch_microblaze,/* Xilinx MicroBlaze. */ 465 bfd_arch_tilepro, /* Tilera TILEPro */ 466 bfd_arch_tilegx, /* Tilera TILE-Gx */ 467#define bfd_mach_tilepro 1 468#define bfd_mach_tilegx 1 469#define bfd_mach_tilegx32 2 470 bfd_arch_aarch64, /* AArch64 */ 471#define bfd_mach_aarch64 0 472#define bfd_mach_aarch64_ilp32 32 473 bfd_arch_nios2, /* Nios II */ 474#define bfd_mach_nios2 0 475#define bfd_mach_nios2r1 1 476#define bfd_mach_nios2r2 2 477 bfd_arch_visium, /* Visium */ 478#define bfd_mach_visium 1 479 bfd_arch_last 480 @}; 481@end example 482 483@subsection bfd_arch_info 484 485 486@strong{Description}@* 487This structure contains information on architectures for use 488within BFD. 489@example 490 491typedef struct bfd_arch_info 492@{ 493 int bits_per_word; 494 int bits_per_address; 495 int bits_per_byte; 496 enum bfd_architecture arch; 497 unsigned long mach; 498 const char *arch_name; 499 const char *printable_name; 500 unsigned int section_align_power; 501 /* TRUE if this is the default machine for the architecture. 502 The default arch should be the first entry for an arch so that 503 all the entries for that arch can be accessed via @code{next}. */ 504 bfd_boolean the_default; 505 const struct bfd_arch_info * (*compatible) 506 (const struct bfd_arch_info *a, const struct bfd_arch_info *b); 507 508 bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); 509 510 /* Allocate via bfd_malloc and return a fill buffer of size COUNT. If 511 IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is 512 TRUE, the buffer contains code. */ 513 void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian, 514 bfd_boolean code); 515 516 const struct bfd_arch_info *next; 517@} 518bfd_arch_info_type; 519 520@end example 521 522@findex bfd_printable_name 523@subsubsection @code{bfd_printable_name} 524@strong{Synopsis} 525@example 526const char *bfd_printable_name (bfd *abfd); 527@end example 528@strong{Description}@* 529Return a printable string representing the architecture and machine 530from the pointer to the architecture info structure. 531 532@findex bfd_scan_arch 533@subsubsection @code{bfd_scan_arch} 534@strong{Synopsis} 535@example 536const bfd_arch_info_type *bfd_scan_arch (const char *string); 537@end example 538@strong{Description}@* 539Figure out if BFD supports any cpu which could be described with 540the name @var{string}. Return a pointer to an @code{arch_info} 541structure if a machine is found, otherwise NULL. 542 543@findex bfd_arch_list 544@subsubsection @code{bfd_arch_list} 545@strong{Synopsis} 546@example 547const char **bfd_arch_list (void); 548@end example 549@strong{Description}@* 550Return a freshly malloced NULL-terminated vector of the names 551of all the valid BFD architectures. Do not modify the names. 552 553@findex bfd_arch_get_compatible 554@subsubsection @code{bfd_arch_get_compatible} 555@strong{Synopsis} 556@example 557const bfd_arch_info_type *bfd_arch_get_compatible 558 (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns); 559@end example 560@strong{Description}@* 561Determine whether two BFDs' architectures and machine types 562are compatible. Calculates the lowest common denominator 563between the two architectures and machine types implied by 564the BFDs and returns a pointer to an @code{arch_info} structure 565describing the compatible machine. 566 567@findex bfd_default_arch_struct 568@subsubsection @code{bfd_default_arch_struct} 569@strong{Description}@* 570The @code{bfd_default_arch_struct} is an item of 571@code{bfd_arch_info_type} which has been initialized to a fairly 572generic state. A BFD starts life by pointing to this 573structure, until the correct back end has determined the real 574architecture of the file. 575@example 576extern const bfd_arch_info_type bfd_default_arch_struct; 577@end example 578 579@findex bfd_set_arch_info 580@subsubsection @code{bfd_set_arch_info} 581@strong{Synopsis} 582@example 583void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); 584@end example 585@strong{Description}@* 586Set the architecture info of @var{abfd} to @var{arg}. 587 588@findex bfd_default_set_arch_mach 589@subsubsection @code{bfd_default_set_arch_mach} 590@strong{Synopsis} 591@example 592bfd_boolean bfd_default_set_arch_mach 593 (bfd *abfd, enum bfd_architecture arch, unsigned long mach); 594@end example 595@strong{Description}@* 596Set the architecture and machine type in BFD @var{abfd} 597to @var{arch} and @var{mach}. Find the correct 598pointer to a structure and insert it into the @code{arch_info} 599pointer. 600 601@findex bfd_get_arch 602@subsubsection @code{bfd_get_arch} 603@strong{Synopsis} 604@example 605enum bfd_architecture bfd_get_arch (bfd *abfd); 606@end example 607@strong{Description}@* 608Return the enumerated type which describes the BFD @var{abfd}'s 609architecture. 610 611@findex bfd_get_mach 612@subsubsection @code{bfd_get_mach} 613@strong{Synopsis} 614@example 615unsigned long bfd_get_mach (bfd *abfd); 616@end example 617@strong{Description}@* 618Return the long type which describes the BFD @var{abfd}'s 619machine. 620 621@findex bfd_arch_bits_per_byte 622@subsubsection @code{bfd_arch_bits_per_byte} 623@strong{Synopsis} 624@example 625unsigned int bfd_arch_bits_per_byte (bfd *abfd); 626@end example 627@strong{Description}@* 628Return the number of bits in one of the BFD @var{abfd}'s 629architecture's bytes. 630 631@findex bfd_arch_bits_per_address 632@subsubsection @code{bfd_arch_bits_per_address} 633@strong{Synopsis} 634@example 635unsigned int bfd_arch_bits_per_address (bfd *abfd); 636@end example 637@strong{Description}@* 638Return the number of bits in one of the BFD @var{abfd}'s 639architecture's addresses. 640 641@findex bfd_default_compatible 642@subsubsection @code{bfd_default_compatible} 643@strong{Synopsis} 644@example 645const bfd_arch_info_type *bfd_default_compatible 646 (const bfd_arch_info_type *a, const bfd_arch_info_type *b); 647@end example 648@strong{Description}@* 649The default function for testing for compatibility. 650 651@findex bfd_default_scan 652@subsubsection @code{bfd_default_scan} 653@strong{Synopsis} 654@example 655bfd_boolean bfd_default_scan 656 (const struct bfd_arch_info *info, const char *string); 657@end example 658@strong{Description}@* 659The default function for working out whether this is an 660architecture hit and a machine hit. 661 662@findex bfd_get_arch_info 663@subsubsection @code{bfd_get_arch_info} 664@strong{Synopsis} 665@example 666const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); 667@end example 668@strong{Description}@* 669Return the architecture info struct in @var{abfd}. 670 671@findex bfd_lookup_arch 672@subsubsection @code{bfd_lookup_arch} 673@strong{Synopsis} 674@example 675const bfd_arch_info_type *bfd_lookup_arch 676 (enum bfd_architecture arch, unsigned long machine); 677@end example 678@strong{Description}@* 679Look for the architecture info structure which matches the 680arguments @var{arch} and @var{machine}. A machine of 0 matches the 681machine/architecture structure which marks itself as the 682default. 683 684@findex bfd_printable_arch_mach 685@subsubsection @code{bfd_printable_arch_mach} 686@strong{Synopsis} 687@example 688const char *bfd_printable_arch_mach 689 (enum bfd_architecture arch, unsigned long machine); 690@end example 691@strong{Description}@* 692Return a printable string representing the architecture and 693machine type. 694 695This routine is depreciated. 696 697@findex bfd_octets_per_byte 698@subsubsection @code{bfd_octets_per_byte} 699@strong{Synopsis} 700@example 701unsigned int bfd_octets_per_byte (bfd *abfd); 702@end example 703@strong{Description}@* 704Return the number of octets (8-bit quantities) per target byte 705(minimum addressable unit). In most cases, this will be one, but some 706DSP targets have 16, 32, or even 48 bits per byte. 707 708@findex bfd_arch_mach_octets_per_byte 709@subsubsection @code{bfd_arch_mach_octets_per_byte} 710@strong{Synopsis} 711@example 712unsigned int bfd_arch_mach_octets_per_byte 713 (enum bfd_architecture arch, unsigned long machine); 714@end example 715@strong{Description}@* 716See bfd_octets_per_byte. 717 718This routine is provided for those cases where a bfd * is not 719available 720 721@findex bfd_arch_default_fill 722@subsubsection @code{bfd_arch_default_fill} 723@strong{Synopsis} 724@example 725void *bfd_arch_default_fill (bfd_size_type count, 726 bfd_boolean is_bigendian, 727 bfd_boolean code); 728@end example 729@strong{Description}@* 730Allocate via bfd_malloc and return a fill buffer of size COUNT. 731If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If 732CODE is TRUE, the buffer contains code. 733 734