193885Sphantom/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ 293885Sphantom/* Instruction opcode table for or1k. 393885Sphantom 493885SphantomTHIS FILE IS MACHINE GENERATED WITH CGEN. 593885Sphantom 693885SphantomCopyright (C) 1996-2020 Free Software Foundation, Inc. 793885Sphantom 893885SphantomThis file is part of the GNU Binutils and/or GDB, the GNU debugger. 993885Sphantom 1093885Sphantom This file is free software; you can redistribute it and/or modify 1193885Sphantom it under the terms of the GNU General Public License as published by 1293885Sphantom the Free Software Foundation; either version 3, or (at your option) 1393885Sphantom any later version. 1493885Sphantom 1593885Sphantom It is distributed in the hope that it will be useful, but WITHOUT 1693885Sphantom ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 1793885Sphantom or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 1893885Sphantom License for more details. 1993885Sphantom 2093885Sphantom You should have received a copy of the GNU General Public License along 2193885Sphantom with this program; if not, write to the Free Software Foundation, Inc., 2293885Sphantom 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 2393885Sphantom 2493885Sphantom*/ 2593885Sphantom 2693885Sphantom#include "sysdep.h" 2793885Sphantom#include "ansidecl.h" 2893885Sphantom#include "bfd.h" 2993885Sphantom#include "symcat.h" 3093885Sphantom#include "or1k-desc.h" 3193885Sphantom#include "or1k-opc.h" 3293885Sphantom#include "libiberty.h" 3393885Sphantom 3493885Sphantom/* -- opc.c */ 3593885Sphantom 3693885Sphantom/* Special check to ensure that instruction exists for given machine. */ 37 38int 39or1k_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) 40{ 41 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); 42 43 /* No mach attribute? Assume it's supported for all machs. */ 44 if (machs == 0) 45 return 1; 46 47 return ((machs & cd->machs) != 0); 48} 49 50/* -- */ 51/* The hash functions are recorded here to help keep assembler code out of 52 the disassembler and vice versa. */ 53 54static int asm_hash_insn_p (const CGEN_INSN *); 55static unsigned int asm_hash_insn (const char *); 56static int dis_hash_insn_p (const CGEN_INSN *); 57static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); 58 59/* Instruction formats. */ 60 61#define F(f) & or1k_cgen_ifld_table[OR1K_##f] 62static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = { 63 0, 0, 0x0, { { 0 } } 64}; 65 66static const CGEN_IFMT ifmt_l_j ATTRIBUTE_UNUSED = { 67 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_DISP26) }, { 0 } } 68}; 69 70static const CGEN_IFMT ifmt_l_adrp ATTRIBUTE_UNUSED = { 71 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_DISP21) }, { 0 } } 72}; 73 74static const CGEN_IFMT ifmt_l_jr ATTRIBUTE_UNUSED = { 75 32, 32, 0xffff07ff, { { F (F_OPCODE) }, { F (F_RESV_25_10) }, { F (F_R3) }, { F (F_RESV_10_11) }, { 0 } } 76}; 77 78static const CGEN_IFMT ifmt_l_trap ATTRIBUTE_UNUSED = { 79 32, 32, 0xffff0000, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_RESV_20_5) }, { F (F_UIMM16) }, { 0 } } 80}; 81 82static const CGEN_IFMT ifmt_l_msync ATTRIBUTE_UNUSED = { 83 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_RESV_20_21) }, { 0 } } 84}; 85 86static const CGEN_IFMT ifmt_l_rfe ATTRIBUTE_UNUSED = { 87 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_RESV_25_26) }, { 0 } } 88}; 89 90static const CGEN_IFMT ifmt_l_nop_imm ATTRIBUTE_UNUSED = { 91 32, 32, 0xffff0000, { { F (F_OPCODE) }, { F (F_OP_25_2) }, { F (F_RESV_23_8) }, { F (F_UIMM16) }, { 0 } } 92}; 93 94static const CGEN_IFMT ifmt_l_movhi ATTRIBUTE_UNUSED = { 95 32, 32, 0xfc1f0000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_RESV_20_4) }, { F (F_OP_16_1) }, { F (F_UIMM16) }, { 0 } } 96}; 97 98static const CGEN_IFMT ifmt_l_macrc ATTRIBUTE_UNUSED = { 99 32, 32, 0xfc1fffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_RESV_20_4) }, { F (F_OP_16_1) }, { F (F_UIMM16) }, { 0 } } 100}; 101 102static const CGEN_IFMT ifmt_l_mfspr ATTRIBUTE_UNUSED = { 103 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } } 104}; 105 106static const CGEN_IFMT ifmt_l_mtspr ATTRIBUTE_UNUSED = { 107 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_UIMM16_SPLIT) }, { 0 } } 108}; 109 110static const CGEN_IFMT ifmt_l_lwz ATTRIBUTE_UNUSED = { 111 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } } 112}; 113 114static const CGEN_IFMT ifmt_l_sw ATTRIBUTE_UNUSED = { 115 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_SIMM16_SPLIT) }, { 0 } } 116}; 117 118static const CGEN_IFMT ifmt_l_swa ATTRIBUTE_UNUSED = { 119 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_SIMM16) }, { 0 } } 120}; 121 122static const CGEN_IFMT ifmt_l_sll ATTRIBUTE_UNUSED = { 123 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_2) }, { F (F_RESV_5_2) }, { F (F_OP_3_4) }, { 0 } } 124}; 125 126static const CGEN_IFMT ifmt_l_slli ATTRIBUTE_UNUSED = { 127 32, 32, 0xfc00ffc0, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV_15_8) }, { F (F_OP_7_2) }, { F (F_UIMM6) }, { 0 } } 128}; 129 130static const CGEN_IFMT ifmt_l_and ATTRIBUTE_UNUSED = { 131 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_7) }, { F (F_OP_3_4) }, { 0 } } 132}; 133 134static const CGEN_IFMT ifmt_l_muld ATTRIBUTE_UNUSED = { 135 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_7) }, { F (F_OP_3_4) }, { 0 } } 136}; 137 138static const CGEN_IFMT ifmt_l_exths ATTRIBUTE_UNUSED = { 139 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV_15_6) }, { F (F_OP_9_4) }, { F (F_RESV_5_2) }, { F (F_OP_3_4) }, { 0 } } 140}; 141 142static const CGEN_IFMT ifmt_l_cmov ATTRIBUTE_UNUSED = { 143 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_1) }, { F (F_OP_9_2) }, { F (F_RESV_7_4) }, { F (F_OP_3_4) }, { 0 } } 144}; 145 146static const CGEN_IFMT ifmt_l_sfgts ATTRIBUTE_UNUSED = { 147 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_11) }, { 0 } } 148}; 149 150static const CGEN_IFMT ifmt_l_sfgtsi ATTRIBUTE_UNUSED = { 151 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } } 152}; 153 154static const CGEN_IFMT ifmt_l_mac ATTRIBUTE_UNUSED = { 155 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_7) }, { F (F_OP_3_4) }, { 0 } } 156}; 157 158static const CGEN_IFMT ifmt_l_maci ATTRIBUTE_UNUSED = { 159 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } } 160}; 161 162static const CGEN_IFMT ifmt_lf_add_s ATTRIBUTE_UNUSED = { 163 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 164}; 165 166static const CGEN_IFMT ifmt_lf_add_d ATTRIBUTE_UNUSED = { 167 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 168}; 169 170static const CGEN_IFMT ifmt_lf_add_d32 ATTRIBUTE_UNUSED = { 171 32, 32, 0xfc0000ff, { { F (F_OPCODE) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } } 172}; 173 174static const CGEN_IFMT ifmt_lf_itof_s ATTRIBUTE_UNUSED = { 175 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 176}; 177 178static const CGEN_IFMT ifmt_lf_itof_d ATTRIBUTE_UNUSED = { 179 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 180}; 181 182static const CGEN_IFMT ifmt_lf_itof_d32 ATTRIBUTE_UNUSED = { 183 32, 32, 0xfc00f9ff, { { F (F_OPCODE) }, { F (F_R3) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RESV_8_1) }, { F (F_OP_7_8) }, { 0 } } 184}; 185 186static const CGEN_IFMT ifmt_lf_ftoi_s ATTRIBUTE_UNUSED = { 187 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 188}; 189 190static const CGEN_IFMT ifmt_lf_ftoi_d ATTRIBUTE_UNUSED = { 191 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 192}; 193 194static const CGEN_IFMT ifmt_lf_ftoi_d32 ATTRIBUTE_UNUSED = { 195 32, 32, 0xfc00f9ff, { { F (F_OPCODE) }, { F (F_R3) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RESV_8_1) }, { F (F_OP_7_8) }, { 0 } } 196}; 197 198static const CGEN_IFMT ifmt_lf_sfeq_s ATTRIBUTE_UNUSED = { 199 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 200}; 201 202static const CGEN_IFMT ifmt_lf_sfeq_d ATTRIBUTE_UNUSED = { 203 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 204}; 205 206static const CGEN_IFMT ifmt_lf_sfeq_d32 ATTRIBUTE_UNUSED = { 207 32, 32, 0xffe004ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_RESV_10_1) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } } 208}; 209 210static const CGEN_IFMT ifmt_lf_cust1_s ATTRIBUTE_UNUSED = { 211 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 212}; 213 214static const CGEN_IFMT ifmt_lf_cust1_d ATTRIBUTE_UNUSED = { 215 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } } 216}; 217 218static const CGEN_IFMT ifmt_lf_cust1_d32 ATTRIBUTE_UNUSED = { 219 32, 32, 0xffe004ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_RESV_10_1) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } } 220}; 221 222#undef F 223 224#define A(a) (1 << CGEN_INSN_##a) 225#define OPERAND(op) OR1K_OPERAND_##op 226#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ 227#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) 228 229/* The instruction table. */ 230 231static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] = 232{ 233 /* Special null first entry. 234 A `num' value of zero is thus invalid. 235 Also, the special `invalid' insn resides here. */ 236 { { 0, 0, 0, 0 }, {{0}}, 0, {0}}, 237/* l.j ${disp26} */ 238 { 239 { 0, 0, 0, 0 }, 240 { { MNEM, ' ', OP (DISP26), 0 } }, 241 & ifmt_l_j, { 0x0 } 242 }, 243/* l.adrp $rD,${disp21} */ 244 { 245 { 0, 0, 0, 0 }, 246 { { MNEM, ' ', OP (RD), ',', OP (DISP21), 0 } }, 247 & ifmt_l_adrp, { 0x8000000 } 248 }, 249/* l.jal ${disp26} */ 250 { 251 { 0, 0, 0, 0 }, 252 { { MNEM, ' ', OP (DISP26), 0 } }, 253 & ifmt_l_j, { 0x4000000 } 254 }, 255/* l.jr $rB */ 256 { 257 { 0, 0, 0, 0 }, 258 { { MNEM, ' ', OP (RB), 0 } }, 259 & ifmt_l_jr, { 0x44000000 } 260 }, 261/* l.jalr $rB */ 262 { 263 { 0, 0, 0, 0 }, 264 { { MNEM, ' ', OP (RB), 0 } }, 265 & ifmt_l_jr, { 0x48000000 } 266 }, 267/* l.bnf ${disp26} */ 268 { 269 { 0, 0, 0, 0 }, 270 { { MNEM, ' ', OP (DISP26), 0 } }, 271 & ifmt_l_j, { 0xc000000 } 272 }, 273/* l.bf ${disp26} */ 274 { 275 { 0, 0, 0, 0 }, 276 { { MNEM, ' ', OP (DISP26), 0 } }, 277 & ifmt_l_j, { 0x10000000 } 278 }, 279/* l.trap ${uimm16} */ 280 { 281 { 0, 0, 0, 0 }, 282 { { MNEM, ' ', OP (UIMM16), 0 } }, 283 & ifmt_l_trap, { 0x21000000 } 284 }, 285/* l.sys ${uimm16} */ 286 { 287 { 0, 0, 0, 0 }, 288 { { MNEM, ' ', OP (UIMM16), 0 } }, 289 & ifmt_l_trap, { 0x20000000 } 290 }, 291/* l.msync */ 292 { 293 { 0, 0, 0, 0 }, 294 { { MNEM, 0 } }, 295 & ifmt_l_msync, { 0x22000000 } 296 }, 297/* l.psync */ 298 { 299 { 0, 0, 0, 0 }, 300 { { MNEM, 0 } }, 301 & ifmt_l_msync, { 0x22800000 } 302 }, 303/* l.csync */ 304 { 305 { 0, 0, 0, 0 }, 306 { { MNEM, 0 } }, 307 & ifmt_l_msync, { 0x23000000 } 308 }, 309/* l.rfe */ 310 { 311 { 0, 0, 0, 0 }, 312 { { MNEM, 0 } }, 313 & ifmt_l_rfe, { 0x24000000 } 314 }, 315/* l.nop ${uimm16} */ 316 { 317 { 0, 0, 0, 0 }, 318 { { MNEM, ' ', OP (UIMM16), 0 } }, 319 & ifmt_l_nop_imm, { 0x15000000 } 320 }, 321/* l.nop */ 322 { 323 { 0, 0, 0, 0 }, 324 { { MNEM, 0 } }, 325 & ifmt_l_nop_imm, { 0x15000000 } 326 }, 327/* l.movhi $rD,$uimm16 */ 328 { 329 { 0, 0, 0, 0 }, 330 { { MNEM, ' ', OP (RD), ',', OP (UIMM16), 0 } }, 331 & ifmt_l_movhi, { 0x18000000 } 332 }, 333/* l.macrc $rD */ 334 { 335 { 0, 0, 0, 0 }, 336 { { MNEM, ' ', OP (RD), 0 } }, 337 & ifmt_l_macrc, { 0x18010000 } 338 }, 339/* l.mfspr $rD,$rA,${uimm16} */ 340 { 341 { 0, 0, 0, 0 }, 342 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM16), 0 } }, 343 & ifmt_l_mfspr, { 0xb4000000 } 344 }, 345/* l.mtspr $rA,$rB,${uimm16-split} */ 346 { 347 { 0, 0, 0, 0 }, 348 { { MNEM, ' ', OP (RA), ',', OP (RB), ',', OP (UIMM16_SPLIT), 0 } }, 349 & ifmt_l_mtspr, { 0xc0000000 } 350 }, 351/* l.lwz $rD,${simm16}($rA) */ 352 { 353 { 0, 0, 0, 0 }, 354 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } }, 355 & ifmt_l_lwz, { 0x84000000 } 356 }, 357/* l.lws $rD,${simm16}($rA) */ 358 { 359 { 0, 0, 0, 0 }, 360 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } }, 361 & ifmt_l_lwz, { 0x88000000 } 362 }, 363/* l.lwa $rD,${simm16}($rA) */ 364 { 365 { 0, 0, 0, 0 }, 366 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } }, 367 & ifmt_l_lwz, { 0x6c000000 } 368 }, 369/* l.lbz $rD,${simm16}($rA) */ 370 { 371 { 0, 0, 0, 0 }, 372 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } }, 373 & ifmt_l_lwz, { 0x8c000000 } 374 }, 375/* l.lbs $rD,${simm16}($rA) */ 376 { 377 { 0, 0, 0, 0 }, 378 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } }, 379 & ifmt_l_lwz, { 0x90000000 } 380 }, 381/* l.lhz $rD,${simm16}($rA) */ 382 { 383 { 0, 0, 0, 0 }, 384 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } }, 385 & ifmt_l_lwz, { 0x94000000 } 386 }, 387/* l.lhs $rD,${simm16}($rA) */ 388 { 389 { 0, 0, 0, 0 }, 390 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } }, 391 & ifmt_l_lwz, { 0x98000000 } 392 }, 393/* l.sw ${simm16-split}($rA),$rB */ 394 { 395 { 0, 0, 0, 0 }, 396 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } }, 397 & ifmt_l_sw, { 0xd4000000 } 398 }, 399/* l.sb ${simm16-split}($rA),$rB */ 400 { 401 { 0, 0, 0, 0 }, 402 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } }, 403 & ifmt_l_sw, { 0xd8000000 } 404 }, 405/* l.sh ${simm16-split}($rA),$rB */ 406 { 407 { 0, 0, 0, 0 }, 408 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } }, 409 & ifmt_l_sw, { 0xdc000000 } 410 }, 411/* l.swa ${simm16-split}($rA),$rB */ 412 { 413 { 0, 0, 0, 0 }, 414 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } }, 415 & ifmt_l_swa, { 0xcc000000 } 416 }, 417/* l.sll $rD,$rA,$rB */ 418 { 419 { 0, 0, 0, 0 }, 420 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 421 & ifmt_l_sll, { 0xe0000008 } 422 }, 423/* l.slli $rD,$rA,${uimm6} */ 424 { 425 { 0, 0, 0, 0 }, 426 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } }, 427 & ifmt_l_slli, { 0xb8000000 } 428 }, 429/* l.srl $rD,$rA,$rB */ 430 { 431 { 0, 0, 0, 0 }, 432 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 433 & ifmt_l_sll, { 0xe0000048 } 434 }, 435/* l.srli $rD,$rA,${uimm6} */ 436 { 437 { 0, 0, 0, 0 }, 438 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } }, 439 & ifmt_l_slli, { 0xb8000040 } 440 }, 441/* l.sra $rD,$rA,$rB */ 442 { 443 { 0, 0, 0, 0 }, 444 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 445 & ifmt_l_sll, { 0xe0000088 } 446 }, 447/* l.srai $rD,$rA,${uimm6} */ 448 { 449 { 0, 0, 0, 0 }, 450 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } }, 451 & ifmt_l_slli, { 0xb8000080 } 452 }, 453/* l.ror $rD,$rA,$rB */ 454 { 455 { 0, 0, 0, 0 }, 456 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 457 & ifmt_l_sll, { 0xe00000c8 } 458 }, 459/* l.rori $rD,$rA,${uimm6} */ 460 { 461 { 0, 0, 0, 0 }, 462 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } }, 463 & ifmt_l_slli, { 0xb80000c0 } 464 }, 465/* l.and $rD,$rA,$rB */ 466 { 467 { 0, 0, 0, 0 }, 468 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 469 & ifmt_l_and, { 0xe0000003 } 470 }, 471/* l.or $rD,$rA,$rB */ 472 { 473 { 0, 0, 0, 0 }, 474 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 475 & ifmt_l_and, { 0xe0000004 } 476 }, 477/* l.xor $rD,$rA,$rB */ 478 { 479 { 0, 0, 0, 0 }, 480 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 481 & ifmt_l_and, { 0xe0000005 } 482 }, 483/* l.add $rD,$rA,$rB */ 484 { 485 { 0, 0, 0, 0 }, 486 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 487 & ifmt_l_and, { 0xe0000000 } 488 }, 489/* l.sub $rD,$rA,$rB */ 490 { 491 { 0, 0, 0, 0 }, 492 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 493 & ifmt_l_and, { 0xe0000002 } 494 }, 495/* l.addc $rD,$rA,$rB */ 496 { 497 { 0, 0, 0, 0 }, 498 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 499 & ifmt_l_and, { 0xe0000001 } 500 }, 501/* l.mul $rD,$rA,$rB */ 502 { 503 { 0, 0, 0, 0 }, 504 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 505 & ifmt_l_and, { 0xe0000306 } 506 }, 507/* l.muld $rA,$rB */ 508 { 509 { 0, 0, 0, 0 }, 510 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 511 & ifmt_l_muld, { 0xe0000307 } 512 }, 513/* l.mulu $rD,$rA,$rB */ 514 { 515 { 0, 0, 0, 0 }, 516 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 517 & ifmt_l_and, { 0xe000030b } 518 }, 519/* l.muldu $rA,$rB */ 520 { 521 { 0, 0, 0, 0 }, 522 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 523 & ifmt_l_muld, { 0xe000030d } 524 }, 525/* l.div $rD,$rA,$rB */ 526 { 527 { 0, 0, 0, 0 }, 528 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 529 & ifmt_l_and, { 0xe0000309 } 530 }, 531/* l.divu $rD,$rA,$rB */ 532 { 533 { 0, 0, 0, 0 }, 534 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 535 & ifmt_l_and, { 0xe000030a } 536 }, 537/* l.ff1 $rD,$rA */ 538 { 539 { 0, 0, 0, 0 }, 540 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 541 & ifmt_l_and, { 0xe000000f } 542 }, 543/* l.fl1 $rD,$rA */ 544 { 545 { 0, 0, 0, 0 }, 546 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 547 & ifmt_l_and, { 0xe000010f } 548 }, 549/* l.andi $rD,$rA,$uimm16 */ 550 { 551 { 0, 0, 0, 0 }, 552 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM16), 0 } }, 553 & ifmt_l_mfspr, { 0xa4000000 } 554 }, 555/* l.ori $rD,$rA,$uimm16 */ 556 { 557 { 0, 0, 0, 0 }, 558 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM16), 0 } }, 559 & ifmt_l_mfspr, { 0xa8000000 } 560 }, 561/* l.xori $rD,$rA,$simm16 */ 562 { 563 { 0, 0, 0, 0 }, 564 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } }, 565 & ifmt_l_lwz, { 0xac000000 } 566 }, 567/* l.addi $rD,$rA,$simm16 */ 568 { 569 { 0, 0, 0, 0 }, 570 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } }, 571 & ifmt_l_lwz, { 0x9c000000 } 572 }, 573/* l.addic $rD,$rA,$simm16 */ 574 { 575 { 0, 0, 0, 0 }, 576 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } }, 577 & ifmt_l_lwz, { 0xa0000000 } 578 }, 579/* l.muli $rD,$rA,$simm16 */ 580 { 581 { 0, 0, 0, 0 }, 582 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } }, 583 & ifmt_l_lwz, { 0xb0000000 } 584 }, 585/* l.exths $rD,$rA */ 586 { 587 { 0, 0, 0, 0 }, 588 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 589 & ifmt_l_exths, { 0xe000000c } 590 }, 591/* l.extbs $rD,$rA */ 592 { 593 { 0, 0, 0, 0 }, 594 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 595 & ifmt_l_exths, { 0xe000004c } 596 }, 597/* l.exthz $rD,$rA */ 598 { 599 { 0, 0, 0, 0 }, 600 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 601 & ifmt_l_exths, { 0xe000008c } 602 }, 603/* l.extbz $rD,$rA */ 604 { 605 { 0, 0, 0, 0 }, 606 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 607 & ifmt_l_exths, { 0xe00000cc } 608 }, 609/* l.extws $rD,$rA */ 610 { 611 { 0, 0, 0, 0 }, 612 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 613 & ifmt_l_exths, { 0xe000000d } 614 }, 615/* l.extwz $rD,$rA */ 616 { 617 { 0, 0, 0, 0 }, 618 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } }, 619 & ifmt_l_exths, { 0xe000004d } 620 }, 621/* l.cmov $rD,$rA,$rB */ 622 { 623 { 0, 0, 0, 0 }, 624 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } }, 625 & ifmt_l_cmov, { 0xe000000e } 626 }, 627/* l.sfgts $rA,$rB */ 628 { 629 { 0, 0, 0, 0 }, 630 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 631 & ifmt_l_sfgts, { 0xe5400000 } 632 }, 633/* l.sfgtsi $rA,$simm16 */ 634 { 635 { 0, 0, 0, 0 }, 636 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 637 & ifmt_l_sfgtsi, { 0xbd400000 } 638 }, 639/* l.sfgtu $rA,$rB */ 640 { 641 { 0, 0, 0, 0 }, 642 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 643 & ifmt_l_sfgts, { 0xe4400000 } 644 }, 645/* l.sfgtui $rA,$simm16 */ 646 { 647 { 0, 0, 0, 0 }, 648 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 649 & ifmt_l_sfgtsi, { 0xbc400000 } 650 }, 651/* l.sfges $rA,$rB */ 652 { 653 { 0, 0, 0, 0 }, 654 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 655 & ifmt_l_sfgts, { 0xe5600000 } 656 }, 657/* l.sfgesi $rA,$simm16 */ 658 { 659 { 0, 0, 0, 0 }, 660 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 661 & ifmt_l_sfgtsi, { 0xbd600000 } 662 }, 663/* l.sfgeu $rA,$rB */ 664 { 665 { 0, 0, 0, 0 }, 666 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 667 & ifmt_l_sfgts, { 0xe4600000 } 668 }, 669/* l.sfgeui $rA,$simm16 */ 670 { 671 { 0, 0, 0, 0 }, 672 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 673 & ifmt_l_sfgtsi, { 0xbc600000 } 674 }, 675/* l.sflts $rA,$rB */ 676 { 677 { 0, 0, 0, 0 }, 678 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 679 & ifmt_l_sfgts, { 0xe5800000 } 680 }, 681/* l.sfltsi $rA,$simm16 */ 682 { 683 { 0, 0, 0, 0 }, 684 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 685 & ifmt_l_sfgtsi, { 0xbd800000 } 686 }, 687/* l.sfltu $rA,$rB */ 688 { 689 { 0, 0, 0, 0 }, 690 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 691 & ifmt_l_sfgts, { 0xe4800000 } 692 }, 693/* l.sfltui $rA,$simm16 */ 694 { 695 { 0, 0, 0, 0 }, 696 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 697 & ifmt_l_sfgtsi, { 0xbc800000 } 698 }, 699/* l.sfles $rA,$rB */ 700 { 701 { 0, 0, 0, 0 }, 702 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 703 & ifmt_l_sfgts, { 0xe5a00000 } 704 }, 705/* l.sflesi $rA,$simm16 */ 706 { 707 { 0, 0, 0, 0 }, 708 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 709 & ifmt_l_sfgtsi, { 0xbda00000 } 710 }, 711/* l.sfleu $rA,$rB */ 712 { 713 { 0, 0, 0, 0 }, 714 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 715 & ifmt_l_sfgts, { 0xe4a00000 } 716 }, 717/* l.sfleui $rA,$simm16 */ 718 { 719 { 0, 0, 0, 0 }, 720 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 721 & ifmt_l_sfgtsi, { 0xbca00000 } 722 }, 723/* l.sfeq $rA,$rB */ 724 { 725 { 0, 0, 0, 0 }, 726 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 727 & ifmt_l_sfgts, { 0xe4000000 } 728 }, 729/* l.sfeqi $rA,$simm16 */ 730 { 731 { 0, 0, 0, 0 }, 732 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 733 & ifmt_l_sfgtsi, { 0xbc000000 } 734 }, 735/* l.sfne $rA,$rB */ 736 { 737 { 0, 0, 0, 0 }, 738 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 739 & ifmt_l_sfgts, { 0xe4200000 } 740 }, 741/* l.sfnei $rA,$simm16 */ 742 { 743 { 0, 0, 0, 0 }, 744 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 745 & ifmt_l_sfgtsi, { 0xbc200000 } 746 }, 747/* l.mac $rA,$rB */ 748 { 749 { 0, 0, 0, 0 }, 750 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 751 & ifmt_l_mac, { 0xc4000001 } 752 }, 753/* l.maci $rA,${simm16} */ 754 { 755 { 0, 0, 0, 0 }, 756 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } }, 757 & ifmt_l_maci, { 0x4c000000 } 758 }, 759/* l.macu $rA,$rB */ 760 { 761 { 0, 0, 0, 0 }, 762 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 763 & ifmt_l_mac, { 0xc4000003 } 764 }, 765/* l.msb $rA,$rB */ 766 { 767 { 0, 0, 0, 0 }, 768 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 769 & ifmt_l_mac, { 0xc4000002 } 770 }, 771/* l.msbu $rA,$rB */ 772 { 773 { 0, 0, 0, 0 }, 774 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } }, 775 & ifmt_l_mac, { 0xc4000004 } 776 }, 777/* l.cust1 */ 778 { 779 { 0, 0, 0, 0 }, 780 { { MNEM, 0 } }, 781 & ifmt_l_rfe, { 0x70000000 } 782 }, 783/* l.cust2 */ 784 { 785 { 0, 0, 0, 0 }, 786 { { MNEM, 0 } }, 787 & ifmt_l_rfe, { 0x74000000 } 788 }, 789/* l.cust3 */ 790 { 791 { 0, 0, 0, 0 }, 792 { { MNEM, 0 } }, 793 & ifmt_l_rfe, { 0x78000000 } 794 }, 795/* l.cust4 */ 796 { 797 { 0, 0, 0, 0 }, 798 { { MNEM, 0 } }, 799 & ifmt_l_rfe, { 0x7c000000 } 800 }, 801/* l.cust5 */ 802 { 803 { 0, 0, 0, 0 }, 804 { { MNEM, 0 } }, 805 & ifmt_l_rfe, { 0xf0000000 } 806 }, 807/* l.cust6 */ 808 { 809 { 0, 0, 0, 0 }, 810 { { MNEM, 0 } }, 811 & ifmt_l_rfe, { 0xf4000000 } 812 }, 813/* l.cust7 */ 814 { 815 { 0, 0, 0, 0 }, 816 { { MNEM, 0 } }, 817 & ifmt_l_rfe, { 0xf8000000 } 818 }, 819/* l.cust8 */ 820 { 821 { 0, 0, 0, 0 }, 822 { { MNEM, 0 } }, 823 & ifmt_l_rfe, { 0xfc000000 } 824 }, 825/* lf.add.s $rDSF,$rASF,$rBSF */ 826 { 827 { 0, 0, 0, 0 }, 828 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } }, 829 & ifmt_lf_add_s, { 0xc8000000 } 830 }, 831/* lf.add.d $rDDF,$rADF,$rBDF */ 832 { 833 { 0, 0, 0, 0 }, 834 { { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } }, 835 & ifmt_lf_add_d, { 0xc8000010 } 836 }, 837/* lf.add.d $rDD32F,$rAD32F,$rBD32F */ 838 { 839 { 0, 0, 0, 0 }, 840 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } }, 841 & ifmt_lf_add_d32, { 0xc8000010 } 842 }, 843/* lf.sub.s $rDSF,$rASF,$rBSF */ 844 { 845 { 0, 0, 0, 0 }, 846 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } }, 847 & ifmt_lf_add_s, { 0xc8000001 } 848 }, 849/* lf.sub.d $rDDF,$rADF,$rBDF */ 850 { 851 { 0, 0, 0, 0 }, 852 { { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } }, 853 & ifmt_lf_add_d, { 0xc8000011 } 854 }, 855/* lf.sub.d $rDD32F,$rAD32F,$rBD32F */ 856 { 857 { 0, 0, 0, 0 }, 858 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } }, 859 & ifmt_lf_add_d32, { 0xc8000011 } 860 }, 861/* lf.mul.s $rDSF,$rASF,$rBSF */ 862 { 863 { 0, 0, 0, 0 }, 864 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } }, 865 & ifmt_lf_add_s, { 0xc8000002 } 866 }, 867/* lf.mul.d $rDDF,$rADF,$rBDF */ 868 { 869 { 0, 0, 0, 0 }, 870 { { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } }, 871 & ifmt_lf_add_d, { 0xc8000012 } 872 }, 873/* lf.mul.d $rDD32F,$rAD32F,$rBD32F */ 874 { 875 { 0, 0, 0, 0 }, 876 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } }, 877 & ifmt_lf_add_d32, { 0xc8000012 } 878 }, 879/* lf.div.s $rDSF,$rASF,$rBSF */ 880 { 881 { 0, 0, 0, 0 }, 882 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } }, 883 & ifmt_lf_add_s, { 0xc8000003 } 884 }, 885/* lf.div.d $rDDF,$rADF,$rBDF */ 886 { 887 { 0, 0, 0, 0 }, 888 { { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } }, 889 & ifmt_lf_add_d, { 0xc8000013 } 890 }, 891/* lf.div.d $rDD32F,$rAD32F,$rBD32F */ 892 { 893 { 0, 0, 0, 0 }, 894 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } }, 895 & ifmt_lf_add_d32, { 0xc8000013 } 896 }, 897/* lf.rem.s $rDSF,$rASF,$rBSF */ 898 { 899 { 0, 0, 0, 0 }, 900 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } }, 901 & ifmt_lf_add_s, { 0xc8000006 } 902 }, 903/* lf.rem.d $rDDF,$rADF,$rBDF */ 904 { 905 { 0, 0, 0, 0 }, 906 { { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } }, 907 & ifmt_lf_add_d, { 0xc8000016 } 908 }, 909/* lf.rem.d $rDD32F,$rAD32F,$rBD32F */ 910 { 911 { 0, 0, 0, 0 }, 912 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } }, 913 & ifmt_lf_add_d32, { 0xc8000016 } 914 }, 915/* lf.itof.s $rDSF,$rA */ 916 { 917 { 0, 0, 0, 0 }, 918 { { MNEM, ' ', OP (RDSF), ',', OP (RA), 0 } }, 919 & ifmt_lf_itof_s, { 0xc8000004 } 920 }, 921/* lf.itof.d $rDDF,$rA */ 922 { 923 { 0, 0, 0, 0 }, 924 { { MNEM, ' ', OP (RDDF), ',', OP (RA), 0 } }, 925 & ifmt_lf_itof_d, { 0xc8000014 } 926 }, 927/* lf.itof.d $rDD32F,$rADI */ 928 { 929 { 0, 0, 0, 0 }, 930 { { MNEM, ' ', OP (RDD32F), ',', OP (RADI), 0 } }, 931 & ifmt_lf_itof_d32, { 0xc8000014 } 932 }, 933/* lf.ftoi.s $rD,$rASF */ 934 { 935 { 0, 0, 0, 0 }, 936 { { MNEM, ' ', OP (RD), ',', OP (RASF), 0 } }, 937 & ifmt_lf_ftoi_s, { 0xc8000005 } 938 }, 939/* lf.ftoi.d $rD,$rADF */ 940 { 941 { 0, 0, 0, 0 }, 942 { { MNEM, ' ', OP (RD), ',', OP (RADF), 0 } }, 943 & ifmt_lf_ftoi_d, { 0xc8000015 } 944 }, 945/* lf.ftoi.d $rDDI,$rAD32F */ 946 { 947 { 0, 0, 0, 0 }, 948 { { MNEM, ' ', OP (RDDI), ',', OP (RAD32F), 0 } }, 949 & ifmt_lf_ftoi_d32, { 0xc8000015 } 950 }, 951/* lf.sfeq.s $rASF,$rBSF */ 952 { 953 { 0, 0, 0, 0 }, 954 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 955 & ifmt_lf_sfeq_s, { 0xc8000008 } 956 }, 957/* lf.sfeq.d $rADF,$rBDF */ 958 { 959 { 0, 0, 0, 0 }, 960 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 961 & ifmt_lf_sfeq_d, { 0xc8000018 } 962 }, 963/* lf.sfeq.d $rAD32F,$rBD32F */ 964 { 965 { 0, 0, 0, 0 }, 966 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 967 & ifmt_lf_sfeq_d32, { 0xc8000018 } 968 }, 969/* lf.sfne.s $rASF,$rBSF */ 970 { 971 { 0, 0, 0, 0 }, 972 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 973 & ifmt_lf_sfeq_s, { 0xc8000009 } 974 }, 975/* lf.sfne.d $rADF,$rBDF */ 976 { 977 { 0, 0, 0, 0 }, 978 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 979 & ifmt_lf_sfeq_d, { 0xc8000019 } 980 }, 981/* lf.sfne.d $rAD32F,$rBD32F */ 982 { 983 { 0, 0, 0, 0 }, 984 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 985 & ifmt_lf_sfeq_d32, { 0xc8000019 } 986 }, 987/* lf.sfge.s $rASF,$rBSF */ 988 { 989 { 0, 0, 0, 0 }, 990 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 991 & ifmt_lf_sfeq_s, { 0xc800000b } 992 }, 993/* lf.sfge.d $rADF,$rBDF */ 994 { 995 { 0, 0, 0, 0 }, 996 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 997 & ifmt_lf_sfeq_d, { 0xc800001b } 998 }, 999/* lf.sfge.d $rAD32F,$rBD32F */ 1000 { 1001 { 0, 0, 0, 0 }, 1002 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1003 & ifmt_lf_sfeq_d32, { 0xc800001b } 1004 }, 1005/* lf.sfgt.s $rASF,$rBSF */ 1006 { 1007 { 0, 0, 0, 0 }, 1008 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1009 & ifmt_lf_sfeq_s, { 0xc800000a } 1010 }, 1011/* lf.sfgt.d $rADF,$rBDF */ 1012 { 1013 { 0, 0, 0, 0 }, 1014 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1015 & ifmt_lf_sfeq_d, { 0xc800001a } 1016 }, 1017/* lf.sfgt.d $rAD32F,$rBD32F */ 1018 { 1019 { 0, 0, 0, 0 }, 1020 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1021 & ifmt_lf_sfeq_d32, { 0xc800001a } 1022 }, 1023/* lf.sflt.s $rASF,$rBSF */ 1024 { 1025 { 0, 0, 0, 0 }, 1026 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1027 & ifmt_lf_sfeq_s, { 0xc800000c } 1028 }, 1029/* lf.sflt.d $rADF,$rBDF */ 1030 { 1031 { 0, 0, 0, 0 }, 1032 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1033 & ifmt_lf_sfeq_d, { 0xc800001c } 1034 }, 1035/* lf.sflt.d $rAD32F,$rBD32F */ 1036 { 1037 { 0, 0, 0, 0 }, 1038 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1039 & ifmt_lf_sfeq_d32, { 0xc800001c } 1040 }, 1041/* lf.sfle.s $rASF,$rBSF */ 1042 { 1043 { 0, 0, 0, 0 }, 1044 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1045 & ifmt_lf_sfeq_s, { 0xc800000d } 1046 }, 1047/* lf.sfle.d $rADF,$rBDF */ 1048 { 1049 { 0, 0, 0, 0 }, 1050 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1051 & ifmt_lf_sfeq_d, { 0xc800001d } 1052 }, 1053/* lf.sfle.d $rAD32F,$rBD32F */ 1054 { 1055 { 0, 0, 0, 0 }, 1056 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1057 & ifmt_lf_sfeq_d32, { 0xc800001d } 1058 }, 1059/* lf.sfueq.s $rASF,$rBSF */ 1060 { 1061 { 0, 0, 0, 0 }, 1062 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1063 & ifmt_lf_sfeq_s, { 0xc8000028 } 1064 }, 1065/* lf.sfueq.d $rADF,$rBDF */ 1066 { 1067 { 0, 0, 0, 0 }, 1068 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1069 & ifmt_lf_sfeq_d, { 0xc8000038 } 1070 }, 1071/* lf.sfueq.d $rAD32F,$rBD32F */ 1072 { 1073 { 0, 0, 0, 0 }, 1074 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1075 & ifmt_lf_sfeq_d32, { 0xc8000038 } 1076 }, 1077/* lf.sfune.s $rASF,$rBSF */ 1078 { 1079 { 0, 0, 0, 0 }, 1080 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1081 & ifmt_lf_sfeq_s, { 0xc8000029 } 1082 }, 1083/* lf.sfune.d $rADF,$rBDF */ 1084 { 1085 { 0, 0, 0, 0 }, 1086 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1087 & ifmt_lf_sfeq_d, { 0xc8000039 } 1088 }, 1089/* lf.sfune.d $rAD32F,$rBD32F */ 1090 { 1091 { 0, 0, 0, 0 }, 1092 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1093 & ifmt_lf_sfeq_d32, { 0xc8000039 } 1094 }, 1095/* lf.sfugt.s $rASF,$rBSF */ 1096 { 1097 { 0, 0, 0, 0 }, 1098 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1099 & ifmt_lf_sfeq_s, { 0xc800002a } 1100 }, 1101/* lf.sfugt.d $rADF,$rBDF */ 1102 { 1103 { 0, 0, 0, 0 }, 1104 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1105 & ifmt_lf_sfeq_d, { 0xc800003a } 1106 }, 1107/* lf.sfugt.d $rAD32F,$rBD32F */ 1108 { 1109 { 0, 0, 0, 0 }, 1110 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1111 & ifmt_lf_sfeq_d32, { 0xc800003a } 1112 }, 1113/* lf.sfuge.s $rASF,$rBSF */ 1114 { 1115 { 0, 0, 0, 0 }, 1116 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1117 & ifmt_lf_sfeq_s, { 0xc800002b } 1118 }, 1119/* lf.sfuge.d $rADF,$rBDF */ 1120 { 1121 { 0, 0, 0, 0 }, 1122 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1123 & ifmt_lf_sfeq_d, { 0xc800003b } 1124 }, 1125/* lf.sfuge.d $rAD32F,$rBD32F */ 1126 { 1127 { 0, 0, 0, 0 }, 1128 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1129 & ifmt_lf_sfeq_d32, { 0xc800003b } 1130 }, 1131/* lf.sfult.s $rASF,$rBSF */ 1132 { 1133 { 0, 0, 0, 0 }, 1134 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1135 & ifmt_lf_sfeq_s, { 0xc800002c } 1136 }, 1137/* lf.sfult.d $rADF,$rBDF */ 1138 { 1139 { 0, 0, 0, 0 }, 1140 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1141 & ifmt_lf_sfeq_d, { 0xc800003c } 1142 }, 1143/* lf.sfult.d $rAD32F,$rBD32F */ 1144 { 1145 { 0, 0, 0, 0 }, 1146 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1147 & ifmt_lf_sfeq_d32, { 0xc800003c } 1148 }, 1149/* lf.sfule.s $rASF,$rBSF */ 1150 { 1151 { 0, 0, 0, 0 }, 1152 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1153 & ifmt_lf_sfeq_s, { 0xc800002d } 1154 }, 1155/* lf.sfule.d $rADF,$rBDF */ 1156 { 1157 { 0, 0, 0, 0 }, 1158 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1159 & ifmt_lf_sfeq_d, { 0xc800003d } 1160 }, 1161/* lf.sfule.d $rAD32F,$rBD32F */ 1162 { 1163 { 0, 0, 0, 0 }, 1164 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1165 & ifmt_lf_sfeq_d32, { 0xc800003d } 1166 }, 1167/* lf.sfun.s $rASF,$rBSF */ 1168 { 1169 { 0, 0, 0, 0 }, 1170 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1171 & ifmt_lf_sfeq_s, { 0xc800002e } 1172 }, 1173/* lf.sfun.d $rADF,$rBDF */ 1174 { 1175 { 0, 0, 0, 0 }, 1176 { { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } }, 1177 & ifmt_lf_sfeq_d, { 0xc800003e } 1178 }, 1179/* lf.sfun.d $rAD32F,$rBD32F */ 1180 { 1181 { 0, 0, 0, 0 }, 1182 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1183 & ifmt_lf_sfeq_d32, { 0xc800003e } 1184 }, 1185/* lf.madd.s $rDSF,$rASF,$rBSF */ 1186 { 1187 { 0, 0, 0, 0 }, 1188 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } }, 1189 & ifmt_lf_add_s, { 0xc8000007 } 1190 }, 1191/* lf.madd.d $rDDF,$rADF,$rBDF */ 1192 { 1193 { 0, 0, 0, 0 }, 1194 { { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } }, 1195 & ifmt_lf_add_d, { 0xc8000017 } 1196 }, 1197/* lf.madd.d $rDD32F,$rAD32F,$rBD32F */ 1198 { 1199 { 0, 0, 0, 0 }, 1200 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } }, 1201 & ifmt_lf_add_d32, { 0xc8000017 } 1202 }, 1203/* lf.cust1.s $rASF,$rBSF */ 1204 { 1205 { 0, 0, 0, 0 }, 1206 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } }, 1207 & ifmt_lf_cust1_s, { 0xc80000d0 } 1208 }, 1209/* lf.cust1.d */ 1210 { 1211 { 0, 0, 0, 0 }, 1212 { { MNEM, 0 } }, 1213 & ifmt_lf_cust1_d, { 0xc80000e0 } 1214 }, 1215/* lf.cust1.d */ 1216 { 1217 { 0, 0, 0, 0 }, 1218 { { MNEM, 0 } }, 1219 & ifmt_lf_cust1_d32, { 0xc80000e0 } 1220 }, 1221}; 1222 1223#undef A 1224#undef OPERAND 1225#undef MNEM 1226#undef OP 1227 1228/* Formats for ALIAS macro-insns. */ 1229 1230#define F(f) & or1k_cgen_ifld_table[OR1K_##f] 1231#undef F 1232 1233/* Each non-simple macro entry points to an array of expansion possibilities. */ 1234 1235#define A(a) (1 << CGEN_INSN_##a) 1236#define OPERAND(op) OR1K_OPERAND_##op 1237#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ 1238#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) 1239 1240/* The macro instruction table. */ 1241 1242static const CGEN_IBASE or1k_cgen_macro_insn_table[] = 1243{ 1244}; 1245 1246/* The macro instruction opcode table. */ 1247 1248static const CGEN_OPCODE or1k_cgen_macro_insn_opcode_table[] = 1249{ 1250}; 1251 1252#undef A 1253#undef OPERAND 1254#undef MNEM 1255#undef OP 1256 1257#ifndef CGEN_ASM_HASH_P 1258#define CGEN_ASM_HASH_P(insn) 1 1259#endif 1260 1261#ifndef CGEN_DIS_HASH_P 1262#define CGEN_DIS_HASH_P(insn) 1 1263#endif 1264 1265/* Return non-zero if INSN is to be added to the hash table. 1266 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */ 1267 1268static int 1269asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED) 1270{ 1271 return CGEN_ASM_HASH_P (insn); 1272} 1273 1274static int 1275dis_hash_insn_p (const CGEN_INSN *insn) 1276{ 1277 /* If building the hash table and the NO-DIS attribute is present, 1278 ignore. */ 1279 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS)) 1280 return 0; 1281 return CGEN_DIS_HASH_P (insn); 1282} 1283 1284#ifndef CGEN_ASM_HASH 1285#define CGEN_ASM_HASH_SIZE 127 1286#ifdef CGEN_MNEMONIC_OPERANDS 1287#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) 1288#else 1289#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/ 1290#endif 1291#endif 1292 1293/* It doesn't make much sense to provide a default here, 1294 but while this is under development we do. 1295 BUFFER is a pointer to the bytes of the insn, target order. 1296 VALUE is the first base_insn_bitsize bits as an int in host order. */ 1297 1298#ifndef CGEN_DIS_HASH 1299#define CGEN_DIS_HASH_SIZE 256 1300#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf)) 1301#endif 1302 1303/* The result is the hash value of the insn. 1304 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */ 1305 1306static unsigned int 1307asm_hash_insn (const char *mnem) 1308{ 1309 return CGEN_ASM_HASH (mnem); 1310} 1311 1312/* BUF is a pointer to the bytes of the insn, target order. 1313 VALUE is the first base_insn_bitsize bits as an int in host order. */ 1314 1315static unsigned int 1316dis_hash_insn (const char *buf ATTRIBUTE_UNUSED, 1317 CGEN_INSN_INT value ATTRIBUTE_UNUSED) 1318{ 1319 return CGEN_DIS_HASH (buf, value); 1320} 1321 1322/* Set the recorded length of the insn in the CGEN_FIELDS struct. */ 1323 1324static void 1325set_fields_bitsize (CGEN_FIELDS *fields, int size) 1326{ 1327 CGEN_FIELDS_BITSIZE (fields) = size; 1328} 1329 1330/* Function to call before using the operand instance table. 1331 This plugs the opcode entries and macro instructions into the cpu table. */ 1332 1333void 1334or1k_cgen_init_opcode_table (CGEN_CPU_DESC cd) 1335{ 1336 int i; 1337 int num_macros = (sizeof (or1k_cgen_macro_insn_table) / 1338 sizeof (or1k_cgen_macro_insn_table[0])); 1339 const CGEN_IBASE *ib = & or1k_cgen_macro_insn_table[0]; 1340 const CGEN_OPCODE *oc = & or1k_cgen_macro_insn_opcode_table[0]; 1341 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN)); 1342 1343 /* This test has been added to avoid a warning generated 1344 if memset is called with a third argument of value zero. */ 1345 if (num_macros >= 1) 1346 memset (insns, 0, num_macros * sizeof (CGEN_INSN)); 1347 for (i = 0; i < num_macros; ++i) 1348 { 1349 insns[i].base = &ib[i]; 1350 insns[i].opcode = &oc[i]; 1351 or1k_cgen_build_insn_regex (& insns[i]); 1352 } 1353 cd->macro_insn_table.init_entries = insns; 1354 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE); 1355 cd->macro_insn_table.num_init_entries = num_macros; 1356 1357 oc = & or1k_cgen_insn_opcode_table[0]; 1358 insns = (CGEN_INSN *) cd->insn_table.init_entries; 1359 for (i = 0; i < MAX_INSNS; ++i) 1360 { 1361 insns[i].opcode = &oc[i]; 1362 or1k_cgen_build_insn_regex (& insns[i]); 1363 } 1364 1365 cd->sizeof_fields = sizeof (CGEN_FIELDS); 1366 cd->set_fields_bitsize = set_fields_bitsize; 1367 1368 cd->asm_hash_p = asm_hash_insn_p; 1369 cd->asm_hash = asm_hash_insn; 1370 cd->asm_hash_size = CGEN_ASM_HASH_SIZE; 1371 1372 cd->dis_hash_p = dis_hash_insn_p; 1373 cd->dis_hash = dis_hash_insn; 1374 cd->dis_hash_size = CGEN_DIS_HASH_SIZE; 1375} 1376