1#ifndef S12Z_H
2#define S12Z_H
3
4/* This byte is used to prefix instructions in "page 2" of the opcode
5   space.  */
6#define PAGE2_PREBYTE (0x1b)
7
8struct reg
9{
10  char      *name;   /* The canonical name of the register.  */
11  int       bytes;   /* its size, in bytes.  */
12};
13
14
15/* How many registers do we have.  Actually there are only 13,
16   because CCL and CCH are the low and high bytes of CCW.  But
17   for assemnbly / disassembly purposes they are considered
18   distinct registers.  */
19#define S12Z_N_REGISTERS 15
20
21extern const struct reg registers[S12Z_N_REGISTERS];
22
23/* Solaris defines REG_Y in sys/regset.h; undef it here to avoid
24   breaking compilation when this target is enabled.  */
25#undef REG_Y
26
27enum
28  {
29    REG_D2 = 0,
30    REG_D3,
31    REG_D4,
32    REG_D5,
33    REG_D0,
34    REG_D1,
35    REG_D6,
36    REG_D7,
37    REG_X,
38    REG_Y,
39    REG_S,
40    REG_P,
41    REG_CCH,
42    REG_CCL,
43    REG_CCW
44  };
45
46/* Any of the registers d0, d1, ... d7.  */
47#define REG_BIT_Dn \
48((0x1U << REG_D2) | \
49 (0x1U << REG_D3) | \
50 (0x1U << REG_D4) | \
51 (0x1U << REG_D5) | \
52 (0x1U << REG_D6) | \
53 (0x1U << REG_D7) | \
54 (0x1U << REG_D0) | \
55 (0x1U << REG_D1))
56
57/* Any of the registers x, y or z.  */
58#define REG_BIT_XYS \
59((0x1U << REG_X) | \
60 (0x1U << REG_Y) | \
61 (0x1U << REG_S))
62
63/* Any of the registers x, y, z or p.  */
64#define REG_BIT_XYSP \
65((0x1U << REG_X)  | \
66 (0x1U << REG_Y)  | \
67 (0x1U << REG_S)  | \
68 (0x1U << REG_P))
69
70/* The x register or the y register.  */
71#define REG_BIT_XY \
72((0x1U << REG_X) | \
73 (0x1U << REG_Y))
74
75#endif
76