1/* Renesas RX specific support for 32-bit ELF. 2 Copyright (C) 2008-2022 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21#include "sysdep.h" 22#include "bfd.h" 23#include "libbfd.h" 24#include "elf-bfd.h" 25#include "elf/rx.h" 26#include "libiberty.h" 27#include "elf32-rx.h" 28 29#define RX_OPCODE_BIG_ENDIAN 0 30 31/* This is a meta-target that's used only with objcopy, to avoid the 32 endian-swap we would otherwise get. We check for this in 33 rx_elf_object_p(). */ 34const bfd_target rx_elf32_be_ns_vec; 35const bfd_target rx_elf32_be_vec; 36 37#ifdef DEBUG 38char * rx_get_reloc (long); 39void rx_dump_symtab (bfd *, void *, void *); 40#endif 41 42#define RXREL(n,sz,bit,shift,complain,pcrel) \ 43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 44 bfd_elf_generic_reloc, "R_RX_" #n, false, 0, ~0, false) 45 46/* Note that the relocations around 0x7f are internal to this file; 47 feel free to move them as needed to avoid conflicts with published 48 relocation numbers. */ 49 50static reloc_howto_type rx_elf_howto_table [] = 51{ 52 RXREL (NONE, 0, 0, 0, dont, false), 53 RXREL (DIR32, 4, 32, 0, signed, false), 54 RXREL (DIR24S, 4, 24, 0, signed, false), 55 RXREL (DIR16, 2, 16, 0, dont, false), 56 RXREL (DIR16U, 2, 16, 0, unsigned, false), 57 RXREL (DIR16S, 2, 16, 0, signed, false), 58 RXREL (DIR8, 1, 8, 0, dont, false), 59 RXREL (DIR8U, 1, 8, 0, unsigned, false), 60 RXREL (DIR8S, 1, 8, 0, signed, false), 61 RXREL (DIR24S_PCREL, 4, 24, 0, signed, true), 62 RXREL (DIR16S_PCREL, 2, 16, 0, signed, true), 63 RXREL (DIR8S_PCREL, 1, 8, 0, signed, true), 64 RXREL (DIR16UL, 2, 16, 2, unsigned, false), 65 RXREL (DIR16UW, 2, 16, 1, unsigned, false), 66 RXREL (DIR8UL, 1, 8, 2, unsigned, false), 67 RXREL (DIR8UW, 1, 8, 1, unsigned, false), 68 RXREL (DIR32_REV, 2, 16, 0, dont, false), 69 RXREL (DIR16_REV, 2, 16, 0, dont, false), 70 RXREL (DIR3U_PCREL, 1, 3, 0, dont, true), 71 72 EMPTY_HOWTO (0x13), 73 EMPTY_HOWTO (0x14), 74 EMPTY_HOWTO (0x15), 75 EMPTY_HOWTO (0x16), 76 EMPTY_HOWTO (0x17), 77 EMPTY_HOWTO (0x18), 78 EMPTY_HOWTO (0x19), 79 EMPTY_HOWTO (0x1a), 80 EMPTY_HOWTO (0x1b), 81 EMPTY_HOWTO (0x1c), 82 EMPTY_HOWTO (0x1d), 83 EMPTY_HOWTO (0x1e), 84 EMPTY_HOWTO (0x1f), 85 86 RXREL (RH_3_PCREL, 1, 3, 0, signed, true), 87 RXREL (RH_16_OP, 2, 16, 0, signed, false), 88 RXREL (RH_24_OP, 4, 24, 0, signed, false), 89 RXREL (RH_32_OP, 4, 32, 0, signed, false), 90 RXREL (RH_24_UNS, 4, 24, 0, unsigned, false), 91 RXREL (RH_8_NEG, 1, 8, 0, signed, false), 92 RXREL (RH_16_NEG, 2, 16, 0, signed, false), 93 RXREL (RH_24_NEG, 4, 24, 0, signed, false), 94 RXREL (RH_32_NEG, 4, 32, 0, signed, false), 95 RXREL (RH_DIFF, 4, 32, 0, signed, false), 96 RXREL (RH_GPRELB, 2, 16, 0, unsigned, false), 97 RXREL (RH_GPRELW, 2, 16, 0, unsigned, false), 98 RXREL (RH_GPRELL, 2, 16, 0, unsigned, false), 99 RXREL (RH_RELAX, 0, 0, 0, dont, false), 100 101 EMPTY_HOWTO (0x2e), 102 EMPTY_HOWTO (0x2f), 103 EMPTY_HOWTO (0x30), 104 EMPTY_HOWTO (0x31), 105 EMPTY_HOWTO (0x32), 106 EMPTY_HOWTO (0x33), 107 EMPTY_HOWTO (0x34), 108 EMPTY_HOWTO (0x35), 109 EMPTY_HOWTO (0x36), 110 EMPTY_HOWTO (0x37), 111 EMPTY_HOWTO (0x38), 112 EMPTY_HOWTO (0x39), 113 EMPTY_HOWTO (0x3a), 114 EMPTY_HOWTO (0x3b), 115 EMPTY_HOWTO (0x3c), 116 EMPTY_HOWTO (0x3d), 117 EMPTY_HOWTO (0x3e), 118 EMPTY_HOWTO (0x3f), 119 EMPTY_HOWTO (0x40), 120 121 RXREL (ABS32, 4, 32, 0, dont, false), 122 RXREL (ABS24S, 4, 24, 0, signed, false), 123 RXREL (ABS16, 2, 16, 0, dont, false), 124 RXREL (ABS16U, 2, 16, 0, unsigned, false), 125 RXREL (ABS16S, 2, 16, 0, signed, false), 126 RXREL (ABS8, 1, 8, 0, dont, false), 127 RXREL (ABS8U, 1, 8, 0, unsigned, false), 128 RXREL (ABS8S, 1, 8, 0, signed, false), 129 RXREL (ABS24S_PCREL, 4, 24, 0, signed, true), 130 RXREL (ABS16S_PCREL, 2, 16, 0, signed, true), 131 RXREL (ABS8S_PCREL, 1, 8, 0, signed, true), 132 RXREL (ABS16UL, 2, 16, 0, unsigned, false), 133 RXREL (ABS16UW, 2, 16, 0, unsigned, false), 134 RXREL (ABS8UL, 1, 8, 0, unsigned, false), 135 RXREL (ABS8UW, 1, 8, 0, unsigned, false), 136 RXREL (ABS32_REV, 4, 32, 0, dont, false), 137 RXREL (ABS16_REV, 2, 16, 0, dont, false), 138 139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32) 140 141 EMPTY_HOWTO (0x52), 142 EMPTY_HOWTO (0x53), 143 EMPTY_HOWTO (0x54), 144 EMPTY_HOWTO (0x55), 145 EMPTY_HOWTO (0x56), 146 EMPTY_HOWTO (0x57), 147 EMPTY_HOWTO (0x58), 148 EMPTY_HOWTO (0x59), 149 EMPTY_HOWTO (0x5a), 150 EMPTY_HOWTO (0x5b), 151 EMPTY_HOWTO (0x5c), 152 EMPTY_HOWTO (0x5d), 153 EMPTY_HOWTO (0x5e), 154 EMPTY_HOWTO (0x5f), 155 EMPTY_HOWTO (0x60), 156 EMPTY_HOWTO (0x61), 157 EMPTY_HOWTO (0x62), 158 EMPTY_HOWTO (0x63), 159 EMPTY_HOWTO (0x64), 160 EMPTY_HOWTO (0x65), 161 EMPTY_HOWTO (0x66), 162 EMPTY_HOWTO (0x67), 163 EMPTY_HOWTO (0x68), 164 EMPTY_HOWTO (0x69), 165 EMPTY_HOWTO (0x6a), 166 EMPTY_HOWTO (0x6b), 167 EMPTY_HOWTO (0x6c), 168 EMPTY_HOWTO (0x6d), 169 EMPTY_HOWTO (0x6e), 170 EMPTY_HOWTO (0x6f), 171 EMPTY_HOWTO (0x70), 172 EMPTY_HOWTO (0x71), 173 EMPTY_HOWTO (0x72), 174 EMPTY_HOWTO (0x73), 175 EMPTY_HOWTO (0x74), 176 EMPTY_HOWTO (0x75), 177 EMPTY_HOWTO (0x76), 178 EMPTY_HOWTO (0x77), 179 180 /* These are internal. */ 181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */ 182 /* ---- ---- 4--- 3210. */ 183#define R_RX_RH_ABS5p8B 0x78 184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, false), 185#define R_RX_RH_ABS5p8W 0x79 186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, false), 187#define R_RX_RH_ABS5p8L 0x7a 188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, false), 189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */ 190 /* ---- -432 1--- 0---. */ 191#define R_RX_RH_ABS5p5B 0x7b 192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, false), 193#define R_RX_RH_ABS5p5W 0x7c 194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, false), 195#define R_RX_RH_ABS5p5L 0x7d 196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, false), 197 /* A 4-bit unsigned immediate at bit position 8. */ 198#define R_RX_RH_UIMM4p8 0x7e 199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, false), 200 /* A 4-bit negative unsigned immediate at bit position 8. */ 201#define R_RX_RH_UNEG4p8 0x7f 202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, false), 203 /* End of internal relocs. */ 204 205 RXREL (SYM, 4, 32, 0, dont, false), 206 RXREL (OPneg, 4, 32, 0, dont, false), 207 RXREL (OPadd, 4, 32, 0, dont, false), 208 RXREL (OPsub, 4, 32, 0, dont, false), 209 RXREL (OPmul, 4, 32, 0, dont, false), 210 RXREL (OPdiv, 4, 32, 0, dont, false), 211 RXREL (OPshla, 4, 32, 0, dont, false), 212 RXREL (OPshra, 4, 32, 0, dont, false), 213 RXREL (OPsctsize, 4, 32, 0, dont, false), 214 215 EMPTY_HOWTO (0x89), 216 EMPTY_HOWTO (0x8a), 217 EMPTY_HOWTO (0x8b), 218 EMPTY_HOWTO (0x8c), 219 220 RXREL (OPscttop, 4, 32, 0, dont, false), 221 222 EMPTY_HOWTO (0x8e), 223 EMPTY_HOWTO (0x8f), 224 225 RXREL (OPand, 4, 32, 0, dont, false), 226 RXREL (OPor, 4, 32, 0, dont, false), 227 RXREL (OPxor, 4, 32, 0, dont, false), 228 RXREL (OPnot, 4, 32, 0, dont, false), 229 RXREL (OPmod, 4, 32, 0, dont, false), 230 RXREL (OPromtop, 4, 32, 0, dont, false), 231 RXREL (OPramtop, 4, 32, 0, dont, false) 232}; 233 234/* Map BFD reloc types to RX ELF reloc types. */ 235 236struct rx_reloc_map 237{ 238 bfd_reloc_code_real_type bfd_reloc_val; 239 unsigned int rx_reloc_val; 240}; 241 242static const struct rx_reloc_map rx_reloc_map [] = 243{ 244 { BFD_RELOC_NONE, R_RX_NONE }, 245 { BFD_RELOC_8, R_RX_DIR8S }, 246 { BFD_RELOC_16, R_RX_DIR16S }, 247 { BFD_RELOC_24, R_RX_DIR24S }, 248 { BFD_RELOC_32, R_RX_DIR32 }, 249 { BFD_RELOC_RX_16_OP, R_RX_DIR16 }, 250 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL }, 251 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL }, 252 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL }, 253 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL }, 254 { BFD_RELOC_RX_8U, R_RX_DIR8U }, 255 { BFD_RELOC_RX_16U, R_RX_DIR16U }, 256 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS }, 257 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG }, 258 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG }, 259 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG }, 260 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG }, 261 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF }, 262 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB }, 263 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW }, 264 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL }, 265 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX }, 266 { BFD_RELOC_RX_SYM, R_RX_SYM }, 267 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub }, 268 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg }, 269 { BFD_RELOC_RX_ABS8, R_RX_ABS8 }, 270 { BFD_RELOC_RX_ABS16, R_RX_ABS16 }, 271 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV }, 272 { BFD_RELOC_RX_ABS32, R_RX_ABS32 }, 273 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV }, 274 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL }, 275 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW }, 276 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U } 277}; 278 279#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG) 280 281static reloc_howto_type * 282rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 283 bfd_reloc_code_real_type code) 284{ 285 unsigned int i; 286 287 if (code == BFD_RELOC_RX_32_OP) 288 return rx_elf_howto_table + R_RX_DIR32; 289 290 for (i = ARRAY_SIZE (rx_reloc_map); i--;) 291 if (rx_reloc_map [i].bfd_reloc_val == code) 292 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val; 293 294 return NULL; 295} 296 297static reloc_howto_type * 298rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 299{ 300 unsigned int i; 301 302 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++) 303 if (rx_elf_howto_table[i].name != NULL 304 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0) 305 return rx_elf_howto_table + i; 306 307 return NULL; 308} 309 310/* Set the howto pointer for an RX ELF reloc. */ 311 312static bool 313rx_info_to_howto_rela (bfd * abfd, 314 arelent * cache_ptr, 315 Elf_Internal_Rela * dst) 316{ 317 unsigned int r_type; 318 319 r_type = ELF32_R_TYPE (dst->r_info); 320 BFD_ASSERT (R_RX_max == ARRAY_SIZE (rx_elf_howto_table)); 321 if (r_type >= ARRAY_SIZE (rx_elf_howto_table)) 322 { 323 /* xgettext:c-format */ 324 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 325 abfd, r_type); 326 bfd_set_error (bfd_error_bad_value); 327 return false; 328 } 329 cache_ptr->howto = rx_elf_howto_table + r_type; 330 if (cache_ptr->howto->name == NULL) 331 { 332 /* xgettext:c-format */ 333 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 334 abfd, r_type); 335 bfd_set_error (bfd_error_bad_value); 336 return false; 337 } 338 return true; 339} 340 341static bfd_vma 342get_symbol_value (const char * name, 343 struct bfd_link_info * info, 344 bfd * input_bfd, 345 asection * input_section, 346 int offset) 347{ 348 bfd_vma value = 0; 349 struct bfd_link_hash_entry * h; 350 351 h = bfd_link_hash_lookup (info->hash, name, false, false, true); 352 353 if (h == NULL 354 || (h->type != bfd_link_hash_defined 355 && h->type != bfd_link_hash_defweak)) 356 (*info->callbacks->undefined_symbol) 357 (info, name, input_bfd, input_section, offset, true); 358 else 359 value = (h->u.def.value 360 + h->u.def.section->output_section->vma 361 + h->u.def.section->output_offset); 362 363 return value; 364} 365 366static bfd_vma 367get_symbol_value_maybe (const char * name, 368 struct bfd_link_info * info) 369{ 370 bfd_vma value = 0; 371 struct bfd_link_hash_entry * h; 372 373 h = bfd_link_hash_lookup (info->hash, name, false, false, true); 374 375 if (h == NULL 376 || (h->type != bfd_link_hash_defined 377 && h->type != bfd_link_hash_defweak)) 378 return 0; 379 else 380 value = (h->u.def.value 381 + h->u.def.section->output_section->vma 382 + h->u.def.section->output_offset); 383 384 return value; 385} 386 387static bfd_vma 388get_gp (struct bfd_link_info * info, 389 bfd * abfd, 390 asection * sec, 391 int offset) 392{ 393 static bool cached = false; 394 static bfd_vma cached_value = 0; 395 396 if (!cached) 397 { 398 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset); 399 cached = true; 400 } 401 return cached_value; 402} 403 404static bfd_vma 405get_romstart (struct bfd_link_info * info, 406 bfd * abfd, 407 asection * sec, 408 int offset) 409{ 410 static bool cached = false; 411 static bfd_vma cached_value = 0; 412 413 if (!cached) 414 { 415 cached_value = get_symbol_value ("_start", info, abfd, sec, offset); 416 cached = true; 417 } 418 return cached_value; 419} 420 421static bfd_vma 422get_ramstart (struct bfd_link_info * info, 423 bfd * abfd, 424 asection * sec, 425 int offset) 426{ 427 static bool cached = false; 428 static bfd_vma cached_value = 0; 429 430 if (!cached) 431 { 432 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); 433 cached = true; 434 } 435 return cached_value; 436} 437 438#define NUM_STACK_ENTRIES 16 439static int32_t rx_stack [ NUM_STACK_ENTRIES ]; 440static unsigned int rx_stack_top; 441 442#define RX_STACK_PUSH(val) \ 443 do \ 444 { \ 445 if (rx_stack_top < NUM_STACK_ENTRIES) \ 446 rx_stack [rx_stack_top ++] = (val); \ 447 else \ 448 r = bfd_reloc_dangerous; \ 449 } \ 450 while (0) 451 452#define RX_STACK_POP(dest) \ 453 do \ 454 { \ 455 if (rx_stack_top > 0) \ 456 (dest) = rx_stack [-- rx_stack_top]; \ 457 else \ 458 (dest) = 0, r = bfd_reloc_dangerous; \ 459 } \ 460 while (0) 461 462/* Relocate an RX ELF section. 463 There is some attempt to make this function usable for many architectures, 464 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 465 if only to serve as a learning tool. 466 467 The RELOCATE_SECTION function is called by the new ELF backend linker 468 to handle the relocations for a section. 469 470 The relocs are always passed as Rela structures; if the section 471 actually uses Rel structures, the r_addend field will always be 472 zero. 473 474 This function is responsible for adjusting the section contents as 475 necessary, and (if using Rela relocs and generating a relocatable 476 output file) adjusting the reloc addend as necessary. 477 478 This function does not have to worry about setting the reloc 479 address or the reloc symbol index. 480 481 LOCAL_SYMS is a pointer to the swapped in local symbols. 482 483 LOCAL_SECTIONS is an array giving the section in the input file 484 corresponding to the st_shndx field of each local symbol. 485 486 The global hash table entry for the global symbols can be found 487 via elf_sym_hashes (input_bfd). 488 489 When generating relocatable output, this function must handle 490 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 491 going to be the section symbol corresponding to the output 492 section, which means that the addend must be adjusted 493 accordingly. */ 494 495static int 496rx_elf_relocate_section 497 (bfd * output_bfd, 498 struct bfd_link_info * info, 499 bfd * input_bfd, 500 asection * input_section, 501 bfd_byte * contents, 502 Elf_Internal_Rela * relocs, 503 Elf_Internal_Sym * local_syms, 504 asection ** local_sections) 505{ 506 Elf_Internal_Shdr *symtab_hdr; 507 struct elf_link_hash_entry **sym_hashes; 508 Elf_Internal_Rela *rel; 509 Elf_Internal_Rela *relend; 510 bool pid_mode; 511 bool saw_subtract = false; 512 const char *table_default_cache = NULL; 513 bfd_vma table_start_cache = 0; 514 bfd_vma table_end_cache = 0; 515 516 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID) 517 pid_mode = true; 518 else 519 pid_mode = false; 520 521 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 522 sym_hashes = elf_sym_hashes (input_bfd); 523 relend = relocs + input_section->reloc_count; 524 for (rel = relocs; rel < relend; rel ++) 525 { 526 reloc_howto_type *howto; 527 unsigned long r_symndx; 528 Elf_Internal_Sym *sym; 529 asection *sec; 530 struct elf_link_hash_entry *h; 531 bfd_vma relocation; 532 bfd_reloc_status_type r; 533 const char * name = NULL; 534 bool unresolved_reloc = true; 535 int r_type; 536 537 r_type = ELF32_R_TYPE (rel->r_info); 538 r_symndx = ELF32_R_SYM (rel->r_info); 539 540 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info); 541 h = NULL; 542 sym = NULL; 543 sec = NULL; 544 relocation = 0; 545 546 if (rx_stack_top == 0) 547 saw_subtract = false; 548 549 if (r_symndx < symtab_hdr->sh_info) 550 { 551 sym = local_syms + r_symndx; 552 sec = local_sections [r_symndx]; 553 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 554 555 name = bfd_elf_string_from_elf_section 556 (input_bfd, symtab_hdr->sh_link, sym->st_name); 557 name = sym->st_name == 0 ? bfd_section_name (sec) : name; 558 } 559 else 560 { 561 bool warned, ignored; 562 563 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 564 r_symndx, symtab_hdr, sym_hashes, h, 565 sec, relocation, unresolved_reloc, 566 warned, ignored); 567 568 name = h->root.root.string; 569 } 570 571 if (startswith (name, "$tableentry$default$")) 572 { 573 bfd_vma entry_vma; 574 int idx; 575 char *buf; 576 577 if (table_default_cache != name) 578 { 579 580 /* All relocs for a given table should be to the same 581 (weak) default symbol) so we can use it to detect a 582 cache miss. We use the offset into the table to find 583 the "real" symbol. Calculate and store the table's 584 offset here. */ 585 586 table_default_cache = name; 587 588 /* We have already done error checking in rx_table_find(). */ 589 590 buf = (char *) bfd_malloc (13 + strlen (name + 20)); 591 if (buf == NULL) 592 return false; 593 594 sprintf (buf, "$tablestart$%s", name + 20); 595 table_start_cache = get_symbol_value (buf, 596 info, 597 input_bfd, 598 input_section, 599 rel->r_offset); 600 601 sprintf (buf, "$tableend$%s", name + 20); 602 table_end_cache = get_symbol_value (buf, 603 info, 604 input_bfd, 605 input_section, 606 rel->r_offset); 607 608 free (buf); 609 } 610 611 entry_vma = (input_section->output_section->vma 612 + input_section->output_offset 613 + rel->r_offset); 614 615 if (table_end_cache <= entry_vma || entry_vma < table_start_cache) 616 { 617 /* xgettext:c-format */ 618 _bfd_error_handler (_("%pB:%pA: table entry %s outside table"), 619 input_bfd, input_section, 620 name); 621 } 622 else if ((int) (entry_vma - table_start_cache) % 4) 623 { 624 /* xgettext:c-format */ 625 _bfd_error_handler (_("%pB:%pA: table entry %s not word-aligned within table"), 626 input_bfd, input_section, 627 name); 628 } 629 else 630 { 631 idx = (int) (entry_vma - table_start_cache) / 4; 632 633 /* This will look like $tableentry$<N>$<name> */ 634 buf = (char *) bfd_malloc (12 + 20 + strlen (name + 20)); 635 if (buf == NULL) 636 return false; 637 638 sprintf (buf, "$tableentry$%d$%s", idx, name + 20); 639 640 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, false, false, true); 641 642 if (h) 643 { 644 relocation = (h->root.u.def.value 645 + h->root.u.def.section->output_section->vma 646 + h->root.u.def.section->output_offset);; 647 } 648 649 free (buf); 650 } 651 } 652 653 if (sec != NULL && discarded_section (sec)) 654 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 655 rel, 1, relend, howto, 0, contents); 656 657 if (bfd_link_relocatable (info)) 658 { 659 /* This is a relocatable link. We don't have to change 660 anything, unless the reloc is against a section symbol, 661 in which case we have to adjust according to where the 662 section symbol winds up in the output section. */ 663 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 664 rel->r_addend += sec->output_offset; 665 continue; 666 } 667 668 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 669 /* If the symbol is undefined and weak 670 then the relocation resolves to zero. */ 671 relocation = 0; 672 else 673 { 674 if (howto->pc_relative) 675 { 676 relocation -= (input_section->output_section->vma 677 + input_section->output_offset 678 + rel->r_offset); 679 if (r_type != R_RX_RH_3_PCREL 680 && r_type != R_RX_DIR3U_PCREL) 681 relocation ++; 682 } 683 684 relocation += rel->r_addend; 685 } 686 687 r = bfd_reloc_ok; 688 689#define RANGE(a,b) \ 690 if (a > (long) relocation || (long) relocation > b) \ 691 r = bfd_reloc_overflow 692#define ALIGN(m) \ 693 if (relocation & m) \ 694 r = bfd_reloc_other 695#define OP(i) \ 696 (contents[rel->r_offset + (i)]) 697#define WARN_REDHAT(type) \ 698 /* xgettext:c-format */ \ 699 _bfd_error_handler \ 700 (_("%pB:%pA: warning: deprecated Red Hat reloc " \ 701 "%s detected against: %s"), \ 702 input_bfd, input_section, #type, name) 703 704 /* Check for unsafe relocs in PID mode. These are any relocs where 705 an absolute address is being computed. There are special cases 706 for relocs against symbols that are known to be referenced in 707 crt0.o before the PID base address register has been initialised. */ 708#define UNSAFE_FOR_PID \ 709 do \ 710 { \ 711 if (pid_mode \ 712 && sec != NULL \ 713 && sec->flags & SEC_READONLY \ 714 && !(input_section->flags & SEC_DEBUGGING) \ 715 && strcmp (name, "__pid_base") != 0 \ 716 && strcmp (name, "__gp") != 0 \ 717 && strcmp (name, "__romdatastart") != 0 \ 718 && !saw_subtract) \ 719 /* xgettext:c-format */ \ 720 _bfd_error_handler (_("%pB(%pA): unsafe PID relocation %s " \ 721 "at %#" PRIx64 " (against %s in %s)"), \ 722 input_bfd, input_section, howto->name, \ 723 (uint64_t) (input_section->output_section->vma \ 724 + input_section->output_offset \ 725 + rel->r_offset), \ 726 name, sec->name); \ 727 } \ 728 while (0) 729 730 /* Opcode relocs are always big endian. Data relocs are bi-endian. */ 731 switch (r_type) 732 { 733 case R_RX_NONE: 734 break; 735 736 case R_RX_RH_RELAX: 737 break; 738 739 case R_RX_RH_3_PCREL: 740 WARN_REDHAT ("RX_RH_3_PCREL"); 741 RANGE (3, 10); 742 OP (0) &= 0xf8; 743 OP (0) |= relocation & 0x07; 744 break; 745 746 case R_RX_RH_8_NEG: 747 WARN_REDHAT ("RX_RH_8_NEG"); 748 relocation = - relocation; 749 /* Fall through. */ 750 case R_RX_DIR8S_PCREL: 751 UNSAFE_FOR_PID; 752 RANGE (-128, 127); 753 OP (0) = relocation; 754 break; 755 756 case R_RX_DIR8S: 757 UNSAFE_FOR_PID; 758 RANGE (-128, 255); 759 OP (0) = relocation; 760 break; 761 762 case R_RX_DIR8U: 763 UNSAFE_FOR_PID; 764 RANGE (0, 255); 765 OP (0) = relocation; 766 break; 767 768 case R_RX_RH_16_NEG: 769 WARN_REDHAT ("RX_RH_16_NEG"); 770 relocation = - relocation; 771 /* Fall through. */ 772 case R_RX_DIR16S_PCREL: 773 UNSAFE_FOR_PID; 774 RANGE (-32768, 32767); 775#if RX_OPCODE_BIG_ENDIAN 776#else 777 OP (0) = relocation; 778 OP (1) = relocation >> 8; 779#endif 780 break; 781 782 case R_RX_RH_16_OP: 783 WARN_REDHAT ("RX_RH_16_OP"); 784 UNSAFE_FOR_PID; 785 RANGE (-32768, 32767); 786#if RX_OPCODE_BIG_ENDIAN 787 OP (1) = relocation; 788 OP (0) = relocation >> 8; 789#else 790 OP (0) = relocation; 791 OP (1) = relocation >> 8; 792#endif 793 break; 794 795 case R_RX_DIR16S: 796 UNSAFE_FOR_PID; 797 RANGE (-32768, 65535); 798 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 799 { 800 OP (1) = relocation; 801 OP (0) = relocation >> 8; 802 } 803 else 804 { 805 OP (0) = relocation; 806 OP (1) = relocation >> 8; 807 } 808 break; 809 810 case R_RX_DIR16U: 811 UNSAFE_FOR_PID; 812 RANGE (0, 65536); 813#if RX_OPCODE_BIG_ENDIAN 814 OP (1) = relocation; 815 OP (0) = relocation >> 8; 816#else 817 OP (0) = relocation; 818 OP (1) = relocation >> 8; 819#endif 820 break; 821 822 case R_RX_DIR16: 823 UNSAFE_FOR_PID; 824 RANGE (-32768, 65536); 825#if RX_OPCODE_BIG_ENDIAN 826 OP (1) = relocation; 827 OP (0) = relocation >> 8; 828#else 829 OP (0) = relocation; 830 OP (1) = relocation >> 8; 831#endif 832 break; 833 834 case R_RX_DIR16_REV: 835 UNSAFE_FOR_PID; 836 RANGE (-32768, 65536); 837#if RX_OPCODE_BIG_ENDIAN 838 OP (0) = relocation; 839 OP (1) = relocation >> 8; 840#else 841 OP (1) = relocation; 842 OP (0) = relocation >> 8; 843#endif 844 break; 845 846 case R_RX_DIR3U_PCREL: 847 RANGE (3, 10); 848 OP (0) &= 0xf8; 849 OP (0) |= relocation & 0x07; 850 break; 851 852 case R_RX_RH_24_NEG: 853 UNSAFE_FOR_PID; 854 WARN_REDHAT ("RX_RH_24_NEG"); 855 relocation = - relocation; 856 /* Fall through. */ 857 case R_RX_DIR24S_PCREL: 858 RANGE (-0x800000, 0x7fffff); 859#if RX_OPCODE_BIG_ENDIAN 860 OP (2) = relocation; 861 OP (1) = relocation >> 8; 862 OP (0) = relocation >> 16; 863#else 864 OP (0) = relocation; 865 OP (1) = relocation >> 8; 866 OP (2) = relocation >> 16; 867#endif 868 break; 869 870 case R_RX_RH_24_OP: 871 UNSAFE_FOR_PID; 872 WARN_REDHAT ("RX_RH_24_OP"); 873 RANGE (-0x800000, 0x7fffff); 874#if RX_OPCODE_BIG_ENDIAN 875 OP (2) = relocation; 876 OP (1) = relocation >> 8; 877 OP (0) = relocation >> 16; 878#else 879 OP (0) = relocation; 880 OP (1) = relocation >> 8; 881 OP (2) = relocation >> 16; 882#endif 883 break; 884 885 case R_RX_DIR24S: 886 UNSAFE_FOR_PID; 887 RANGE (-0x800000, 0x7fffff); 888 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 889 { 890 OP (2) = relocation; 891 OP (1) = relocation >> 8; 892 OP (0) = relocation >> 16; 893 } 894 else 895 { 896 OP (0) = relocation; 897 OP (1) = relocation >> 8; 898 OP (2) = relocation >> 16; 899 } 900 break; 901 902 case R_RX_RH_24_UNS: 903 UNSAFE_FOR_PID; 904 WARN_REDHAT ("RX_RH_24_UNS"); 905 RANGE (0, 0xffffff); 906#if RX_OPCODE_BIG_ENDIAN 907 OP (2) = relocation; 908 OP (1) = relocation >> 8; 909 OP (0) = relocation >> 16; 910#else 911 OP (0) = relocation; 912 OP (1) = relocation >> 8; 913 OP (2) = relocation >> 16; 914#endif 915 break; 916 917 case R_RX_RH_32_NEG: 918 UNSAFE_FOR_PID; 919 WARN_REDHAT ("RX_RH_32_NEG"); 920 relocation = - relocation; 921#if RX_OPCODE_BIG_ENDIAN 922 OP (3) = relocation; 923 OP (2) = relocation >> 8; 924 OP (1) = relocation >> 16; 925 OP (0) = relocation >> 24; 926#else 927 OP (0) = relocation; 928 OP (1) = relocation >> 8; 929 OP (2) = relocation >> 16; 930 OP (3) = relocation >> 24; 931#endif 932 break; 933 934 case R_RX_RH_32_OP: 935 UNSAFE_FOR_PID; 936 WARN_REDHAT ("RX_RH_32_OP"); 937#if RX_OPCODE_BIG_ENDIAN 938 OP (3) = relocation; 939 OP (2) = relocation >> 8; 940 OP (1) = relocation >> 16; 941 OP (0) = relocation >> 24; 942#else 943 OP (0) = relocation; 944 OP (1) = relocation >> 8; 945 OP (2) = relocation >> 16; 946 OP (3) = relocation >> 24; 947#endif 948 break; 949 950 case R_RX_DIR32: 951 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 952 { 953 OP (3) = relocation; 954 OP (2) = relocation >> 8; 955 OP (1) = relocation >> 16; 956 OP (0) = relocation >> 24; 957 } 958 else 959 { 960 OP (0) = relocation; 961 OP (1) = relocation >> 8; 962 OP (2) = relocation >> 16; 963 OP (3) = relocation >> 24; 964 } 965 break; 966 967 case R_RX_DIR32_REV: 968 if (BIGE (output_bfd)) 969 { 970 OP (0) = relocation; 971 OP (1) = relocation >> 8; 972 OP (2) = relocation >> 16; 973 OP (3) = relocation >> 24; 974 } 975 else 976 { 977 OP (3) = relocation; 978 OP (2) = relocation >> 8; 979 OP (1) = relocation >> 16; 980 OP (0) = relocation >> 24; 981 } 982 break; 983 984 case R_RX_RH_DIFF: 985 { 986 bfd_vma val; 987 WARN_REDHAT ("RX_RH_DIFF"); 988 val = bfd_get_32 (output_bfd, & OP (0)); 989 val -= relocation; 990 bfd_put_32 (output_bfd, val, & OP (0)); 991 } 992 break; 993 994 case R_RX_RH_GPRELB: 995 WARN_REDHAT ("RX_RH_GPRELB"); 996 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset); 997 RANGE (0, 65535); 998#if RX_OPCODE_BIG_ENDIAN 999 OP (1) = relocation; 1000 OP (0) = relocation >> 8; 1001#else 1002 OP (0) = relocation; 1003 OP (1) = relocation >> 8; 1004#endif 1005 break; 1006 1007 case R_RX_RH_GPRELW: 1008 WARN_REDHAT ("RX_RH_GPRELW"); 1009 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset); 1010 ALIGN (1); 1011 relocation >>= 1; 1012 RANGE (0, 65535); 1013#if RX_OPCODE_BIG_ENDIAN 1014 OP (1) = relocation; 1015 OP (0) = relocation >> 8; 1016#else 1017 OP (0) = relocation; 1018 OP (1) = relocation >> 8; 1019#endif 1020 break; 1021 1022 case R_RX_RH_GPRELL: 1023 WARN_REDHAT ("RX_RH_GPRELL"); 1024 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset); 1025 ALIGN (3); 1026 relocation >>= 2; 1027 RANGE (0, 65535); 1028#if RX_OPCODE_BIG_ENDIAN 1029 OP (1) = relocation; 1030 OP (0) = relocation >> 8; 1031#else 1032 OP (0) = relocation; 1033 OP (1) = relocation >> 8; 1034#endif 1035 break; 1036 1037 /* Internal relocations just for relaxation: */ 1038 case R_RX_RH_ABS5p5B: 1039 RX_STACK_POP (relocation); 1040 RANGE (0, 31); 1041 OP (0) &= 0xf8; 1042 OP (0) |= relocation >> 2; 1043 OP (1) &= 0x77; 1044 OP (1) |= (relocation << 6) & 0x80; 1045 OP (1) |= (relocation << 3) & 0x08; 1046 break; 1047 1048 case R_RX_RH_ABS5p5W: 1049 RX_STACK_POP (relocation); 1050 RANGE (0, 62); 1051 ALIGN (1); 1052 relocation >>= 1; 1053 OP (0) &= 0xf8; 1054 OP (0) |= relocation >> 2; 1055 OP (1) &= 0x77; 1056 OP (1) |= (relocation << 6) & 0x80; 1057 OP (1) |= (relocation << 3) & 0x08; 1058 break; 1059 1060 case R_RX_RH_ABS5p5L: 1061 RX_STACK_POP (relocation); 1062 RANGE (0, 124); 1063 ALIGN (3); 1064 relocation >>= 2; 1065 OP (0) &= 0xf8; 1066 OP (0) |= relocation >> 2; 1067 OP (1) &= 0x77; 1068 OP (1) |= (relocation << 6) & 0x80; 1069 OP (1) |= (relocation << 3) & 0x08; 1070 break; 1071 1072 case R_RX_RH_ABS5p8B: 1073 RX_STACK_POP (relocation); 1074 RANGE (0, 31); 1075 OP (0) &= 0x70; 1076 OP (0) |= (relocation << 3) & 0x80; 1077 OP (0) |= relocation & 0x0f; 1078 break; 1079 1080 case R_RX_RH_ABS5p8W: 1081 RX_STACK_POP (relocation); 1082 RANGE (0, 62); 1083 ALIGN (1); 1084 relocation >>= 1; 1085 OP (0) &= 0x70; 1086 OP (0) |= (relocation << 3) & 0x80; 1087 OP (0) |= relocation & 0x0f; 1088 break; 1089 1090 case R_RX_RH_ABS5p8L: 1091 RX_STACK_POP (relocation); 1092 RANGE (0, 124); 1093 ALIGN (3); 1094 relocation >>= 2; 1095 OP (0) &= 0x70; 1096 OP (0) |= (relocation << 3) & 0x80; 1097 OP (0) |= relocation & 0x0f; 1098 break; 1099 1100 case R_RX_RH_UIMM4p8: 1101 RANGE (0, 15); 1102 OP (0) &= 0x0f; 1103 OP (0) |= relocation << 4; 1104 break; 1105 1106 case R_RX_RH_UNEG4p8: 1107 RANGE (-15, 0); 1108 OP (0) &= 0x0f; 1109 OP (0) |= (-relocation) << 4; 1110 break; 1111 1112 /* Complex reloc handling: */ 1113 1114 case R_RX_ABS32: 1115 UNSAFE_FOR_PID; 1116 RX_STACK_POP (relocation); 1117#if RX_OPCODE_BIG_ENDIAN 1118 OP (3) = relocation; 1119 OP (2) = relocation >> 8; 1120 OP (1) = relocation >> 16; 1121 OP (0) = relocation >> 24; 1122#else 1123 OP (0) = relocation; 1124 OP (1) = relocation >> 8; 1125 OP (2) = relocation >> 16; 1126 OP (3) = relocation >> 24; 1127#endif 1128 break; 1129 1130 case R_RX_ABS32_REV: 1131 UNSAFE_FOR_PID; 1132 RX_STACK_POP (relocation); 1133#if RX_OPCODE_BIG_ENDIAN 1134 OP (0) = relocation; 1135 OP (1) = relocation >> 8; 1136 OP (2) = relocation >> 16; 1137 OP (3) = relocation >> 24; 1138#else 1139 OP (3) = relocation; 1140 OP (2) = relocation >> 8; 1141 OP (1) = relocation >> 16; 1142 OP (0) = relocation >> 24; 1143#endif 1144 break; 1145 1146 case R_RX_ABS24S_PCREL: 1147 case R_RX_ABS24S: 1148 UNSAFE_FOR_PID; 1149 RX_STACK_POP (relocation); 1150 RANGE (-0x800000, 0x7fffff); 1151 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 1152 { 1153 OP (2) = relocation; 1154 OP (1) = relocation >> 8; 1155 OP (0) = relocation >> 16; 1156 } 1157 else 1158 { 1159 OP (0) = relocation; 1160 OP (1) = relocation >> 8; 1161 OP (2) = relocation >> 16; 1162 } 1163 break; 1164 1165 case R_RX_ABS16: 1166 UNSAFE_FOR_PID; 1167 RX_STACK_POP (relocation); 1168 RANGE (-32768, 65535); 1169#if RX_OPCODE_BIG_ENDIAN 1170 OP (1) = relocation; 1171 OP (0) = relocation >> 8; 1172#else 1173 OP (0) = relocation; 1174 OP (1) = relocation >> 8; 1175#endif 1176 break; 1177 1178 case R_RX_ABS16_REV: 1179 UNSAFE_FOR_PID; 1180 RX_STACK_POP (relocation); 1181 RANGE (-32768, 65535); 1182#if RX_OPCODE_BIG_ENDIAN 1183 OP (0) = relocation; 1184 OP (1) = relocation >> 8; 1185#else 1186 OP (1) = relocation; 1187 OP (0) = relocation >> 8; 1188#endif 1189 break; 1190 1191 case R_RX_ABS16S_PCREL: 1192 case R_RX_ABS16S: 1193 RX_STACK_POP (relocation); 1194 RANGE (-32768, 32767); 1195 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 1196 { 1197 OP (1) = relocation; 1198 OP (0) = relocation >> 8; 1199 } 1200 else 1201 { 1202 OP (0) = relocation; 1203 OP (1) = relocation >> 8; 1204 } 1205 break; 1206 1207 case R_RX_ABS16U: 1208 UNSAFE_FOR_PID; 1209 RX_STACK_POP (relocation); 1210 RANGE (0, 65536); 1211#if RX_OPCODE_BIG_ENDIAN 1212 OP (1) = relocation; 1213 OP (0) = relocation >> 8; 1214#else 1215 OP (0) = relocation; 1216 OP (1) = relocation >> 8; 1217#endif 1218 break; 1219 1220 case R_RX_ABS16UL: 1221 UNSAFE_FOR_PID; 1222 RX_STACK_POP (relocation); 1223 relocation >>= 2; 1224 RANGE (0, 65536); 1225#if RX_OPCODE_BIG_ENDIAN 1226 OP (1) = relocation; 1227 OP (0) = relocation >> 8; 1228#else 1229 OP (0) = relocation; 1230 OP (1) = relocation >> 8; 1231#endif 1232 break; 1233 1234 case R_RX_ABS16UW: 1235 UNSAFE_FOR_PID; 1236 RX_STACK_POP (relocation); 1237 relocation >>= 1; 1238 RANGE (0, 65536); 1239#if RX_OPCODE_BIG_ENDIAN 1240 OP (1) = relocation; 1241 OP (0) = relocation >> 8; 1242#else 1243 OP (0) = relocation; 1244 OP (1) = relocation >> 8; 1245#endif 1246 break; 1247 1248 case R_RX_ABS8: 1249 UNSAFE_FOR_PID; 1250 RX_STACK_POP (relocation); 1251 RANGE (-128, 255); 1252 OP (0) = relocation; 1253 break; 1254 1255 case R_RX_ABS8U: 1256 UNSAFE_FOR_PID; 1257 RX_STACK_POP (relocation); 1258 RANGE (0, 255); 1259 OP (0) = relocation; 1260 break; 1261 1262 case R_RX_ABS8UL: 1263 UNSAFE_FOR_PID; 1264 RX_STACK_POP (relocation); 1265 relocation >>= 2; 1266 RANGE (0, 255); 1267 OP (0) = relocation; 1268 break; 1269 1270 case R_RX_ABS8UW: 1271 UNSAFE_FOR_PID; 1272 RX_STACK_POP (relocation); 1273 relocation >>= 1; 1274 RANGE (0, 255); 1275 OP (0) = relocation; 1276 break; 1277 1278 case R_RX_ABS8S: 1279 UNSAFE_FOR_PID; 1280 /* Fall through. */ 1281 case R_RX_ABS8S_PCREL: 1282 RX_STACK_POP (relocation); 1283 RANGE (-128, 127); 1284 OP (0) = relocation; 1285 break; 1286 1287 case R_RX_SYM: 1288 if (r_symndx < symtab_hdr->sh_info) 1289 RX_STACK_PUSH (sec->output_section->vma 1290 + sec->output_offset 1291 + sym->st_value 1292 + rel->r_addend); 1293 else 1294 { 1295 if (h != NULL 1296 && (h->root.type == bfd_link_hash_defined 1297 || h->root.type == bfd_link_hash_defweak)) 1298 RX_STACK_PUSH (h->root.u.def.value 1299 + sec->output_section->vma 1300 + sec->output_offset 1301 + rel->r_addend); 1302 else 1303 _bfd_error_handler 1304 (_("warning: RX_SYM reloc with an unknown symbol")); 1305 } 1306 break; 1307 1308 case R_RX_OPneg: 1309 { 1310 int32_t tmp; 1311 1312 saw_subtract = true; 1313 RX_STACK_POP (tmp); 1314 tmp = - tmp; 1315 RX_STACK_PUSH (tmp); 1316 } 1317 break; 1318 1319 case R_RX_OPadd: 1320 { 1321 int32_t tmp1, tmp2; 1322 1323 RX_STACK_POP (tmp1); 1324 RX_STACK_POP (tmp2); 1325 tmp1 += tmp2; 1326 RX_STACK_PUSH (tmp1); 1327 } 1328 break; 1329 1330 case R_RX_OPsub: 1331 { 1332 int32_t tmp1, tmp2; 1333 1334 saw_subtract = true; 1335 RX_STACK_POP (tmp1); 1336 RX_STACK_POP (tmp2); 1337 tmp2 -= tmp1; 1338 RX_STACK_PUSH (tmp2); 1339 } 1340 break; 1341 1342 case R_RX_OPmul: 1343 { 1344 int32_t tmp1, tmp2; 1345 1346 RX_STACK_POP (tmp1); 1347 RX_STACK_POP (tmp2); 1348 tmp1 *= tmp2; 1349 RX_STACK_PUSH (tmp1); 1350 } 1351 break; 1352 1353 case R_RX_OPdiv: 1354 { 1355 int32_t tmp1, tmp2; 1356 1357 RX_STACK_POP (tmp1); 1358 RX_STACK_POP (tmp2); 1359 tmp1 /= tmp2; 1360 RX_STACK_PUSH (tmp1); 1361 } 1362 break; 1363 1364 case R_RX_OPshla: 1365 { 1366 int32_t tmp1, tmp2; 1367 1368 RX_STACK_POP (tmp1); 1369 RX_STACK_POP (tmp2); 1370 tmp1 <<= tmp2; 1371 RX_STACK_PUSH (tmp1); 1372 } 1373 break; 1374 1375 case R_RX_OPshra: 1376 { 1377 int32_t tmp1, tmp2; 1378 1379 RX_STACK_POP (tmp1); 1380 RX_STACK_POP (tmp2); 1381 tmp1 >>= tmp2; 1382 RX_STACK_PUSH (tmp1); 1383 } 1384 break; 1385 1386 case R_RX_OPsctsize: 1387 RX_STACK_PUSH (input_section->size); 1388 break; 1389 1390 case R_RX_OPscttop: 1391 RX_STACK_PUSH (input_section->output_section->vma); 1392 break; 1393 1394 case R_RX_OPand: 1395 { 1396 int32_t tmp1, tmp2; 1397 1398 RX_STACK_POP (tmp1); 1399 RX_STACK_POP (tmp2); 1400 tmp1 &= tmp2; 1401 RX_STACK_PUSH (tmp1); 1402 } 1403 break; 1404 1405 case R_RX_OPor: 1406 { 1407 int32_t tmp1, tmp2; 1408 1409 RX_STACK_POP (tmp1); 1410 RX_STACK_POP (tmp2); 1411 tmp1 |= tmp2; 1412 RX_STACK_PUSH (tmp1); 1413 } 1414 break; 1415 1416 case R_RX_OPxor: 1417 { 1418 int32_t tmp1, tmp2; 1419 1420 RX_STACK_POP (tmp1); 1421 RX_STACK_POP (tmp2); 1422 tmp1 ^= tmp2; 1423 RX_STACK_PUSH (tmp1); 1424 } 1425 break; 1426 1427 case R_RX_OPnot: 1428 { 1429 int32_t tmp; 1430 1431 RX_STACK_POP (tmp); 1432 tmp = ~ tmp; 1433 RX_STACK_PUSH (tmp); 1434 } 1435 break; 1436 1437 case R_RX_OPmod: 1438 { 1439 int32_t tmp1, tmp2; 1440 1441 RX_STACK_POP (tmp1); 1442 RX_STACK_POP (tmp2); 1443 tmp1 %= tmp2; 1444 RX_STACK_PUSH (tmp1); 1445 } 1446 break; 1447 1448 case R_RX_OPromtop: 1449 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset)); 1450 break; 1451 1452 case R_RX_OPramtop: 1453 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset)); 1454 break; 1455 1456 default: 1457 r = bfd_reloc_notsupported; 1458 break; 1459 } 1460 1461 if (r != bfd_reloc_ok) 1462 { 1463 const char * msg = NULL; 1464 1465 switch (r) 1466 { 1467 case bfd_reloc_overflow: 1468 /* Catch the case of a missing function declaration 1469 and emit a more helpful error message. */ 1470 if (r_type == R_RX_DIR24S_PCREL) 1471 /* xgettext:c-format */ 1472 msg = _("%pB(%pA): error: call to undefined function '%s'"); 1473 else 1474 (*info->callbacks->reloc_overflow) 1475 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 1476 input_bfd, input_section, rel->r_offset); 1477 break; 1478 1479 case bfd_reloc_undefined: 1480 (*info->callbacks->undefined_symbol) 1481 (info, name, input_bfd, input_section, rel->r_offset, true); 1482 break; 1483 1484 case bfd_reloc_other: 1485 /* xgettext:c-format */ 1486 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area"); 1487 break; 1488 1489 case bfd_reloc_outofrange: 1490 /* xgettext:c-format */ 1491 msg = _("%pB(%pA): internal error: out of range error"); 1492 break; 1493 1494 case bfd_reloc_notsupported: 1495 /* xgettext:c-format */ 1496 msg = _("%pB(%pA): internal error: unsupported relocation error"); 1497 break; 1498 1499 case bfd_reloc_dangerous: 1500 /* xgettext:c-format */ 1501 msg = _("%pB(%pA): internal error: dangerous relocation"); 1502 break; 1503 1504 default: 1505 /* xgettext:c-format */ 1506 msg = _("%pB(%pA): internal error: unknown error"); 1507 break; 1508 } 1509 1510 if (msg) 1511 _bfd_error_handler (msg, input_bfd, input_section, name); 1512 } 1513 } 1514 1515 return true; 1516} 1517 1518/* Relaxation Support. */ 1519 1520/* Progression of relocations from largest operand size to smallest 1521 operand size. */ 1522 1523static int 1524next_smaller_reloc (int r) 1525{ 1526 switch (r) 1527 { 1528 case R_RX_DIR32: return R_RX_DIR24S; 1529 case R_RX_DIR24S: return R_RX_DIR16S; 1530 case R_RX_DIR16S: return R_RX_DIR8S; 1531 case R_RX_DIR8S: return R_RX_NONE; 1532 1533 case R_RX_DIR16: return R_RX_DIR8; 1534 case R_RX_DIR8: return R_RX_NONE; 1535 1536 case R_RX_DIR16U: return R_RX_DIR8U; 1537 case R_RX_DIR8U: return R_RX_NONE; 1538 1539 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL; 1540 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL; 1541 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL; 1542 1543 case R_RX_DIR16UL: return R_RX_DIR8UL; 1544 case R_RX_DIR8UL: return R_RX_NONE; 1545 case R_RX_DIR16UW: return R_RX_DIR8UW; 1546 case R_RX_DIR8UW: return R_RX_NONE; 1547 1548 case R_RX_RH_32_OP: return R_RX_RH_24_OP; 1549 case R_RX_RH_24_OP: return R_RX_RH_16_OP; 1550 case R_RX_RH_16_OP: return R_RX_DIR8; 1551 1552 case R_RX_ABS32: return R_RX_ABS24S; 1553 case R_RX_ABS24S: return R_RX_ABS16S; 1554 case R_RX_ABS16: return R_RX_ABS8; 1555 case R_RX_ABS16U: return R_RX_ABS8U; 1556 case R_RX_ABS16S: return R_RX_ABS8S; 1557 case R_RX_ABS8: return R_RX_NONE; 1558 case R_RX_ABS8U: return R_RX_NONE; 1559 case R_RX_ABS8S: return R_RX_NONE; 1560 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL; 1561 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL; 1562 case R_RX_ABS8S_PCREL: return R_RX_NONE; 1563 case R_RX_ABS16UL: return R_RX_ABS8UL; 1564 case R_RX_ABS16UW: return R_RX_ABS8UW; 1565 case R_RX_ABS8UL: return R_RX_NONE; 1566 case R_RX_ABS8UW: return R_RX_NONE; 1567 } 1568 return r; 1569}; 1570 1571/* Delete some bytes from a section while relaxing. */ 1572 1573static bool 1574elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1575 Elf_Internal_Rela *alignment_rel, int force_snip, 1576 Elf_Internal_Rela *irelstart) 1577{ 1578 Elf_Internal_Shdr * symtab_hdr; 1579 unsigned int sec_shndx; 1580 bfd_byte * contents; 1581 Elf_Internal_Rela * irel; 1582 Elf_Internal_Rela * irelend; 1583 Elf_Internal_Sym * isym; 1584 Elf_Internal_Sym * isymend; 1585 bfd_vma toaddr; 1586 unsigned int symcount; 1587 struct elf_link_hash_entry ** sym_hashes; 1588 struct elf_link_hash_entry ** end_hashes; 1589 1590 if (!alignment_rel) 1591 force_snip = 1; 1592 1593 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1594 1595 contents = elf_section_data (sec)->this_hdr.contents; 1596 1597 /* The deletion must stop at the next alignment boundary, if 1598 ALIGNMENT_REL is non-NULL. */ 1599 toaddr = sec->size; 1600 if (alignment_rel) 1601 toaddr = alignment_rel->r_offset; 1602 1603 BFD_ASSERT (toaddr > addr); 1604 1605 /* Actually delete the bytes. */ 1606 memmove (contents + addr, contents + addr + count, 1607 (size_t) (toaddr - addr - count)); 1608 1609 /* If we don't have an alignment marker to worry about, we can just 1610 shrink the section. Otherwise, we have to fill in the newly 1611 created gap with NOP insns (0x03). */ 1612 if (force_snip) 1613 sec->size -= count; 1614 else 1615 memset (contents + toaddr - count, 0x03, count); 1616 1617 irel = irelstart; 1618 BFD_ASSERT (irel != NULL || sec->reloc_count == 0); 1619 irelend = irel + sec->reloc_count; 1620 1621 /* Adjust all the relocs. */ 1622 for (; irel < irelend; irel++) 1623 { 1624 /* Get the new reloc address. */ 1625 if (irel->r_offset > addr 1626 && (irel->r_offset < toaddr 1627 || (force_snip && irel->r_offset == toaddr))) 1628 irel->r_offset -= count; 1629 1630 /* If we see an ALIGN marker at the end of the gap, we move it 1631 to the beginning of the gap, since marking these gaps is what 1632 they're for. */ 1633 if (irel->r_offset == toaddr 1634 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX 1635 && irel->r_addend & RX_RELAXA_ALIGN) 1636 irel->r_offset -= count; 1637 } 1638 1639 /* Adjust the local symbols defined in this section. */ 1640 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1641 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1642 isymend = isym + symtab_hdr->sh_info; 1643 1644 for (; isym < isymend; isym++) 1645 { 1646 /* If the symbol is in the range of memory we just moved, we 1647 have to adjust its value. */ 1648 if (isym->st_shndx == sec_shndx 1649 && isym->st_value > addr 1650 && isym->st_value < toaddr) 1651 isym->st_value -= count; 1652 1653 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1654 *end* is in the moved bytes but it's *start* isn't), then we 1655 must adjust its size. */ 1656 if (isym->st_shndx == sec_shndx 1657 && isym->st_value < addr 1658 && isym->st_value + isym->st_size > addr 1659 && isym->st_value + isym->st_size < toaddr) 1660 isym->st_size -= count; 1661 } 1662 1663 /* Now adjust the global symbols defined in this section. */ 1664 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1665 - symtab_hdr->sh_info); 1666 sym_hashes = elf_sym_hashes (abfd); 1667 end_hashes = sym_hashes + symcount; 1668 1669 for (; sym_hashes < end_hashes; sym_hashes++) 1670 { 1671 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1672 1673 if ((sym_hash->root.type == bfd_link_hash_defined 1674 || sym_hash->root.type == bfd_link_hash_defweak) 1675 && sym_hash->root.u.def.section == sec) 1676 { 1677 /* As above, adjust the value if needed. */ 1678 if (sym_hash->root.u.def.value > addr 1679 && sym_hash->root.u.def.value < toaddr) 1680 sym_hash->root.u.def.value -= count; 1681 1682 /* As above, adjust the size if needed. */ 1683 if (sym_hash->root.u.def.value < addr 1684 && sym_hash->root.u.def.value + sym_hash->size > addr 1685 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1686 sym_hash->size -= count; 1687 } 1688 } 1689 1690 return true; 1691} 1692 1693/* Used to sort relocs by address. If relocs have the same address, 1694 we maintain their relative order, except that R_RX_RH_RELAX 1695 alignment relocs must be the first reloc for any given address. */ 1696 1697static void 1698reloc_bubblesort (Elf_Internal_Rela * r, int count) 1699{ 1700 int i; 1701 bool again; 1702 bool swappit; 1703 1704 /* This is almost a classic bubblesort. It's the slowest sort, but 1705 we're taking advantage of the fact that the relocations are 1706 mostly in order already (the assembler emits them that way) and 1707 we need relocs with the same address to remain in the same 1708 relative order. */ 1709 again = true; 1710 while (again) 1711 { 1712 again = false; 1713 for (i = 0; i < count - 1; i ++) 1714 { 1715 if (r[i].r_offset > r[i + 1].r_offset) 1716 swappit = true; 1717 else if (r[i].r_offset < r[i + 1].r_offset) 1718 swappit = false; 1719 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX 1720 && (r[i + 1].r_addend & RX_RELAXA_ALIGN)) 1721 swappit = true; 1722 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX 1723 && (r[i + 1].r_addend & RX_RELAXA_ELIGN) 1724 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX 1725 && (r[i].r_addend & RX_RELAXA_ALIGN))) 1726 swappit = true; 1727 else 1728 swappit = false; 1729 1730 if (swappit) 1731 { 1732 Elf_Internal_Rela tmp; 1733 1734 tmp = r[i]; 1735 r[i] = r[i + 1]; 1736 r[i + 1] = tmp; 1737 /* If we do move a reloc back, re-scan to see if it 1738 needs to be moved even further back. This avoids 1739 most of the O(n^2) behavior for our cases. */ 1740 if (i > 0) 1741 i -= 2; 1742 again = true; 1743 } 1744 } 1745 } 1746} 1747 1748 1749#define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1750 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1751 lrel, abfd, sec, link_info, scale) 1752 1753static bfd_vma 1754rx_offset_for_reloc (bfd * abfd, 1755 Elf_Internal_Rela * rel, 1756 Elf_Internal_Shdr * symtab_hdr, 1757 bfd_byte * shndx_buf ATTRIBUTE_UNUSED, 1758 Elf_Internal_Sym * intsyms, 1759 Elf_Internal_Rela ** lrel, 1760 bfd * input_bfd, 1761 asection * input_section, 1762 struct bfd_link_info * info, 1763 int * scale) 1764{ 1765 bfd_vma symval; 1766 bfd_reloc_status_type r; 1767 1768 *scale = 1; 1769 1770 /* REL is the first of 1..N relocations. We compute the symbol 1771 value for each relocation, then combine them if needed. LREL 1772 gets a pointer to the last relocation used. */ 1773 while (1) 1774 { 1775 int32_t tmp1, tmp2; 1776 1777 /* Get the value of the symbol referred to by the reloc. */ 1778 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1779 { 1780 /* A local symbol. */ 1781 Elf_Internal_Sym *isym; 1782 asection *ssec; 1783 1784 isym = intsyms + ELF32_R_SYM (rel->r_info); 1785 1786 if (isym->st_shndx == SHN_UNDEF) 1787 ssec = bfd_und_section_ptr; 1788 else if (isym->st_shndx == SHN_ABS) 1789 ssec = bfd_abs_section_ptr; 1790 else if (isym->st_shndx == SHN_COMMON) 1791 ssec = bfd_com_section_ptr; 1792 else 1793 ssec = bfd_section_from_elf_index (abfd, 1794 isym->st_shndx); 1795 1796 /* Initial symbol value. */ 1797 symval = isym->st_value; 1798 1799 /* GAS may have made this symbol relative to a section, in 1800 which case, we have to add the addend to find the 1801 symbol. */ 1802 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1803 symval += rel->r_addend; 1804 1805 if (ssec) 1806 { 1807 if ((ssec->flags & SEC_MERGE) 1808 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1809 symval = _bfd_merged_section_offset (abfd, & ssec, 1810 elf_section_data (ssec)->sec_info, 1811 symval); 1812 } 1813 1814 /* Now make the offset relative to where the linker is putting it. */ 1815 if (ssec) 1816 symval += 1817 ssec->output_section->vma + ssec->output_offset; 1818 1819 symval += rel->r_addend; 1820 } 1821 else 1822 { 1823 unsigned long indx; 1824 struct elf_link_hash_entry * h; 1825 1826 /* An external symbol. */ 1827 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1828 h = elf_sym_hashes (abfd)[indx]; 1829 BFD_ASSERT (h != NULL); 1830 1831 if (h->root.type != bfd_link_hash_defined 1832 && h->root.type != bfd_link_hash_defweak) 1833 { 1834 /* This appears to be a reference to an undefined 1835 symbol. Just ignore it--it will be caught by the 1836 regular reloc processing. */ 1837 if (lrel) 1838 *lrel = rel; 1839 return 0; 1840 } 1841 1842 symval = (h->root.u.def.value 1843 + h->root.u.def.section->output_section->vma 1844 + h->root.u.def.section->output_offset); 1845 1846 symval += rel->r_addend; 1847 } 1848 1849 switch (ELF32_R_TYPE (rel->r_info)) 1850 { 1851 case R_RX_SYM: 1852 RX_STACK_PUSH (symval); 1853 break; 1854 1855 case R_RX_OPneg: 1856 RX_STACK_POP (tmp1); 1857 tmp1 = - tmp1; 1858 RX_STACK_PUSH (tmp1); 1859 break; 1860 1861 case R_RX_OPadd: 1862 RX_STACK_POP (tmp1); 1863 RX_STACK_POP (tmp2); 1864 tmp1 += tmp2; 1865 RX_STACK_PUSH (tmp1); 1866 break; 1867 1868 case R_RX_OPsub: 1869 RX_STACK_POP (tmp1); 1870 RX_STACK_POP (tmp2); 1871 tmp2 -= tmp1; 1872 RX_STACK_PUSH (tmp2); 1873 break; 1874 1875 case R_RX_OPmul: 1876 RX_STACK_POP (tmp1); 1877 RX_STACK_POP (tmp2); 1878 tmp1 *= tmp2; 1879 RX_STACK_PUSH (tmp1); 1880 break; 1881 1882 case R_RX_OPdiv: 1883 RX_STACK_POP (tmp1); 1884 RX_STACK_POP (tmp2); 1885 tmp1 /= tmp2; 1886 RX_STACK_PUSH (tmp1); 1887 break; 1888 1889 case R_RX_OPshla: 1890 RX_STACK_POP (tmp1); 1891 RX_STACK_POP (tmp2); 1892 tmp1 <<= tmp2; 1893 RX_STACK_PUSH (tmp1); 1894 break; 1895 1896 case R_RX_OPshra: 1897 RX_STACK_POP (tmp1); 1898 RX_STACK_POP (tmp2); 1899 tmp1 >>= tmp2; 1900 RX_STACK_PUSH (tmp1); 1901 break; 1902 1903 case R_RX_OPsctsize: 1904 RX_STACK_PUSH (input_section->size); 1905 break; 1906 1907 case R_RX_OPscttop: 1908 RX_STACK_PUSH (input_section->output_section->vma); 1909 break; 1910 1911 case R_RX_OPand: 1912 RX_STACK_POP (tmp1); 1913 RX_STACK_POP (tmp2); 1914 tmp1 &= tmp2; 1915 RX_STACK_PUSH (tmp1); 1916 break; 1917 1918 case R_RX_OPor: 1919 RX_STACK_POP (tmp1); 1920 RX_STACK_POP (tmp2); 1921 tmp1 |= tmp2; 1922 RX_STACK_PUSH (tmp1); 1923 break; 1924 1925 case R_RX_OPxor: 1926 RX_STACK_POP (tmp1); 1927 RX_STACK_POP (tmp2); 1928 tmp1 ^= tmp2; 1929 RX_STACK_PUSH (tmp1); 1930 break; 1931 1932 case R_RX_OPnot: 1933 RX_STACK_POP (tmp1); 1934 tmp1 = ~ tmp1; 1935 RX_STACK_PUSH (tmp1); 1936 break; 1937 1938 case R_RX_OPmod: 1939 RX_STACK_POP (tmp1); 1940 RX_STACK_POP (tmp2); 1941 tmp1 %= tmp2; 1942 RX_STACK_PUSH (tmp1); 1943 break; 1944 1945 case R_RX_OPromtop: 1946 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset)); 1947 break; 1948 1949 case R_RX_OPramtop: 1950 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset)); 1951 break; 1952 1953 case R_RX_DIR16UL: 1954 case R_RX_DIR8UL: 1955 case R_RX_ABS16UL: 1956 case R_RX_ABS8UL: 1957 if (rx_stack_top) 1958 RX_STACK_POP (symval); 1959 if (lrel) 1960 *lrel = rel; 1961 *scale = 4; 1962 return symval; 1963 1964 case R_RX_DIR16UW: 1965 case R_RX_DIR8UW: 1966 case R_RX_ABS16UW: 1967 case R_RX_ABS8UW: 1968 if (rx_stack_top) 1969 RX_STACK_POP (symval); 1970 if (lrel) 1971 *lrel = rel; 1972 *scale = 2; 1973 return symval; 1974 1975 default: 1976 if (rx_stack_top) 1977 RX_STACK_POP (symval); 1978 if (lrel) 1979 *lrel = rel; 1980 return symval; 1981 } 1982 1983 rel ++; 1984 } 1985 /* FIXME. */ 1986 (void) r; 1987} 1988 1989static void 1990move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta) 1991{ 1992 bfd_vma old_offset = srel->r_offset; 1993 1994 irel ++; 1995 while (irel <= srel) 1996 { 1997 if (irel->r_offset == old_offset) 1998 irel->r_offset += delta; 1999 irel ++; 2000 } 2001} 2002 2003/* Relax one section. */ 2004 2005static bool 2006elf32_rx_relax_section (bfd *abfd, 2007 asection *sec, 2008 struct bfd_link_info *link_info, 2009 bool *again, 2010 bool allow_pcrel3) 2011{ 2012 Elf_Internal_Shdr *symtab_hdr; 2013 Elf_Internal_Shdr *shndx_hdr; 2014 Elf_Internal_Rela *internal_relocs; 2015 Elf_Internal_Rela *irel; 2016 Elf_Internal_Rela *srel; 2017 Elf_Internal_Rela *irelend; 2018 Elf_Internal_Rela *next_alignment; 2019 Elf_Internal_Rela *prev_alignment; 2020 bfd_byte *contents = NULL; 2021 bfd_byte *free_contents = NULL; 2022 Elf_Internal_Sym *intsyms = NULL; 2023 Elf_Internal_Sym *free_intsyms = NULL; 2024 bfd_byte *shndx_buf = NULL; 2025 bfd_vma pc; 2026 bfd_vma sec_start; 2027 bfd_vma symval = 0; 2028 int pcrel = 0; 2029 int code = 0; 2030 int section_alignment_glue; 2031 /* how much to scale the relocation by - 1, 2, or 4. */ 2032 int scale; 2033 2034 /* Assume nothing changes. */ 2035 *again = false; 2036 2037 /* We don't have to do anything for a relocatable link, if 2038 this section does not have relocs, or if this is not a 2039 code section. */ 2040 if (bfd_link_relocatable (link_info) 2041 || (sec->flags & SEC_RELOC) == 0 2042 || sec->reloc_count == 0 2043 || (sec->flags & SEC_CODE) == 0) 2044 return true; 2045 2046 symtab_hdr = & elf_symtab_hdr (abfd); 2047 if (elf_symtab_shndx_list (abfd)) 2048 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; 2049 else 2050 shndx_hdr = NULL; 2051 2052 sec_start = sec->output_section->vma + sec->output_offset; 2053 2054 /* Get the section contents. */ 2055 if (elf_section_data (sec)->this_hdr.contents != NULL) 2056 contents = elf_section_data (sec)->this_hdr.contents; 2057 /* Go get them off disk. */ 2058 else 2059 { 2060 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2061 goto error_return; 2062 elf_section_data (sec)->this_hdr.contents = contents; 2063 } 2064 2065 /* Read this BFD's symbols. */ 2066 /* Get cached copy if it exists. */ 2067 if (symtab_hdr->contents != NULL) 2068 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2069 else 2070 { 2071 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2072 symtab_hdr->contents = (bfd_byte *) intsyms; 2073 } 2074 2075 if (shndx_hdr && shndx_hdr->sh_size != 0) 2076 { 2077 size_t amt; 2078 2079 if (_bfd_mul_overflow (symtab_hdr->sh_info, 2080 sizeof (Elf_External_Sym_Shndx), &amt)) 2081 { 2082 bfd_set_error (bfd_error_file_too_big); 2083 goto error_return; 2084 } 2085 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0) 2086 goto error_return; 2087 shndx_buf = _bfd_malloc_and_read (abfd, amt, amt); 2088 if (shndx_buf == NULL) 2089 goto error_return; 2090 shndx_hdr->contents = shndx_buf; 2091 } 2092 2093 /* Get a copy of the native relocations. */ 2094 /* Note - we ignore the setting of link_info->keep_memory when reading 2095 in these relocs. We have to maintain a permanent copy of the relocs 2096 because we are going to walk over them multiple times, adjusting them 2097 as bytes are deleted from the section, and with this relaxation 2098 function itself being called multiple times on the same section... */ 2099 internal_relocs = _bfd_elf_link_read_relocs 2100 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, true); 2101 if (internal_relocs == NULL) 2102 goto error_return; 2103 2104 /* The RL_ relocs must be just before the operand relocs they go 2105 with, so we must sort them to guarantee this. We use bubblesort 2106 instead of qsort so we can guarantee that relocs with the same 2107 address remain in the same relative order. */ 2108 reloc_bubblesort (internal_relocs, sec->reloc_count); 2109 2110 /* Walk through them looking for relaxing opportunities. */ 2111 irelend = internal_relocs + sec->reloc_count; 2112 2113 /* This will either be NULL or a pointer to the next alignment 2114 relocation. */ 2115 next_alignment = internal_relocs; 2116 /* This will be the previous alignment, although at first it points 2117 to the first real relocation. */ 2118 prev_alignment = internal_relocs; 2119 2120 /* We calculate worst case shrinkage caused by alignment directives. 2121 No fool-proof, but better than either ignoring the problem or 2122 doing heavy duty analysis of all the alignment markers in all 2123 input sections. */ 2124 section_alignment_glue = 0; 2125 for (irel = internal_relocs; irel < irelend; irel++) 2126 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX 2127 && irel->r_addend & RX_RELAXA_ALIGN) 2128 { 2129 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM); 2130 2131 if (section_alignment_glue < this_glue) 2132 section_alignment_glue = this_glue; 2133 } 2134 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2135 shrinkage. */ 2136 section_alignment_glue *= 2; 2137 2138 for (irel = internal_relocs; irel < irelend; irel++) 2139 { 2140 unsigned char *insn; 2141 int nrelocs; 2142 2143 /* The insns we care about are all marked with one of these. */ 2144 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX) 2145 continue; 2146 2147 if (irel->r_addend & RX_RELAXA_ALIGN 2148 || next_alignment == internal_relocs) 2149 { 2150 /* When we delete bytes, we need to maintain all the alignments 2151 indicated. In addition, we need to be careful about relaxing 2152 jumps across alignment boundaries - these displacements 2153 *grow* when we delete bytes. For now, don't shrink 2154 displacements across an alignment boundary, just in case. 2155 Note that this only affects relocations to the same 2156 section. */ 2157 prev_alignment = next_alignment; 2158 next_alignment += 2; 2159 while (next_alignment < irelend 2160 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX 2161 || !(next_alignment->r_addend & RX_RELAXA_ELIGN))) 2162 next_alignment ++; 2163 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2164 next_alignment = NULL; 2165 } 2166 2167 /* When we hit alignment markers, see if we've shrunk enough 2168 before them to reduce the gap without violating the alignment 2169 requirements. */ 2170 if (irel->r_addend & RX_RELAXA_ALIGN) 2171 { 2172 /* At this point, the next relocation *should* be the ELIGN 2173 end marker. */ 2174 Elf_Internal_Rela *erel = irel + 1; 2175 unsigned int alignment, nbytes; 2176 2177 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX) 2178 continue; 2179 if (!(erel->r_addend & RX_RELAXA_ELIGN)) 2180 continue; 2181 2182 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM); 2183 2184 if (erel->r_offset - irel->r_offset < alignment) 2185 continue; 2186 2187 nbytes = erel->r_offset - irel->r_offset; 2188 nbytes /= alignment; 2189 nbytes *= alignment; 2190 2191 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment, 2192 erel->r_offset == sec->size, internal_relocs); 2193 *again = true; 2194 2195 continue; 2196 } 2197 2198 if (irel->r_addend & RX_RELAXA_ELIGN) 2199 continue; 2200 2201 insn = contents + irel->r_offset; 2202 2203 nrelocs = irel->r_addend & RX_RELAXA_RNUM; 2204 2205 /* At this point, we have an insn that is a candidate for linker 2206 relaxation. There are NRELOCS relocs following that may be 2207 relaxed, although each reloc may be made of more than one 2208 reloc entry (such as gp-rel symbols). */ 2209 2210 /* Get the value of the symbol referred to by the reloc. Just 2211 in case this is the last reloc in the list, use the RL's 2212 addend to choose between this reloc (no addend) or the next 2213 (yes addend, which means at least one following reloc). */ 2214 2215 /* srel points to the "current" reloction for this insn - 2216 actually the last reloc for a given operand, which is the one 2217 we need to update. We check the relaxations in the same 2218 order that the relocations happen, so we'll just push it 2219 along as we go. */ 2220 srel = irel; 2221 2222 pc = sec->output_section->vma + sec->output_offset 2223 + srel->r_offset; 2224 2225#define GET_RELOC \ 2226 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2227 pcrel = symval - pc + srel->r_addend; \ 2228 nrelocs --; 2229 2230#define SNIPNR(offset, nbytes) \ 2231 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs); 2232#define SNIP(offset, nbytes, newtype) \ 2233 SNIPNR (offset, nbytes); \ 2234 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2235 2236 /* The order of these bit tests must match the order that the 2237 relocs appear in. Since we sorted those by offset, we can 2238 predict them. */ 2239 2240 /* Note that the numbers in, say, DSP6 are the bit offsets of 2241 the code fields that describe the operand. Bits number 0 for 2242 the MSB of insn[0]. */ 2243 2244 /* DSP* codes: 2245 0 00 [reg] 2246 1 01 dsp:8[reg] 2247 2 10 dsp:16[reg] 2248 3 11 reg */ 2249 if (irel->r_addend & RX_RELAXA_DSP6) 2250 { 2251 GET_RELOC; 2252 2253 code = insn[0] & 3; 2254 if (code == 2 && symval/scale <= 255) 2255 { 2256 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2257 insn[0] &= 0xfc; 2258 insn[0] |= 0x01; 2259 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2260 if (newrel != ELF32_R_TYPE (srel->r_info)) 2261 { 2262 SNIP (3, 1, newrel); 2263 *again = true; 2264 } 2265 } 2266 2267 else if (code == 1 && symval == 0) 2268 { 2269 insn[0] &= 0xfc; 2270 SNIP (2, 1, R_RX_NONE); 2271 *again = true; 2272 } 2273 2274 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */ 2275 else if (code == 1 && symval/scale <= 31 2276 /* Decodable bits. */ 2277 && (insn[0] & 0xcc) == 0xcc 2278 /* Width. */ 2279 && (insn[0] & 0x30) != 0x30 2280 /* Register MSBs. */ 2281 && (insn[1] & 0x88) == 0x00) 2282 { 2283 int newrel = 0; 2284 2285 insn[0] = 0x88 | (insn[0] & 0x30); 2286 /* The register fields are in the right place already. */ 2287 2288 /* We can't relax this new opcode. */ 2289 irel->r_addend = 0; 2290 2291 switch ((insn[0] & 0x30) >> 4) 2292 { 2293 case 0: 2294 newrel = R_RX_RH_ABS5p5B; 2295 break; 2296 case 1: 2297 newrel = R_RX_RH_ABS5p5W; 2298 break; 2299 case 2: 2300 newrel = R_RX_RH_ABS5p5L; 2301 break; 2302 } 2303 2304 move_reloc (irel, srel, -2); 2305 SNIP (2, 1, newrel); 2306 } 2307 2308 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */ 2309 else if (code == 1 && symval/scale <= 31 2310 /* Decodable bits. */ 2311 && (insn[0] & 0xf8) == 0x58 2312 /* Register MSBs. */ 2313 && (insn[1] & 0x88) == 0x00) 2314 { 2315 int newrel = 0; 2316 2317 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1); 2318 /* The register fields are in the right place already. */ 2319 2320 /* We can't relax this new opcode. */ 2321 irel->r_addend = 0; 2322 2323 switch ((insn[0] & 0x08) >> 3) 2324 { 2325 case 0: 2326 newrel = R_RX_RH_ABS5p5B; 2327 break; 2328 case 1: 2329 newrel = R_RX_RH_ABS5p5W; 2330 break; 2331 } 2332 2333 move_reloc (irel, srel, -2); 2334 SNIP (2, 1, newrel); 2335 } 2336 } 2337 2338 /* A DSP4 operand always follows a DSP6 operand, even if there's 2339 no relocation for it. We have to read the code out of the 2340 opcode to calculate the offset of the operand. */ 2341 if (irel->r_addend & RX_RELAXA_DSP4) 2342 { 2343 int code6, offset = 0; 2344 2345 GET_RELOC; 2346 2347 code6 = insn[0] & 0x03; 2348 switch (code6) 2349 { 2350 case 0: offset = 2; break; 2351 case 1: offset = 3; break; 2352 case 2: offset = 4; break; 2353 case 3: offset = 2; break; 2354 } 2355 2356 code = (insn[0] & 0x0c) >> 2; 2357 2358 if (code == 2 && symval / scale <= 255) 2359 { 2360 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2361 2362 insn[0] &= 0xf3; 2363 insn[0] |= 0x04; 2364 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2365 if (newrel != ELF32_R_TYPE (srel->r_info)) 2366 { 2367 SNIP (offset+1, 1, newrel); 2368 *again = true; 2369 } 2370 } 2371 2372 else if (code == 1 && symval == 0) 2373 { 2374 insn[0] &= 0xf3; 2375 SNIP (offset, 1, R_RX_NONE); 2376 *again = true; 2377 } 2378 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */ 2379 else if (code == 1 && symval/scale <= 31 2380 /* Decodable bits. */ 2381 && (insn[0] & 0xc3) == 0xc3 2382 /* Width. */ 2383 && (insn[0] & 0x30) != 0x30 2384 /* Register MSBs. */ 2385 && (insn[1] & 0x88) == 0x00) 2386 { 2387 int newrel = 0; 2388 2389 insn[0] = 0x80 | (insn[0] & 0x30); 2390 /* The register fields are in the right place already. */ 2391 2392 /* We can't relax this new opcode. */ 2393 irel->r_addend = 0; 2394 2395 switch ((insn[0] & 0x30) >> 4) 2396 { 2397 case 0: 2398 newrel = R_RX_RH_ABS5p5B; 2399 break; 2400 case 1: 2401 newrel = R_RX_RH_ABS5p5W; 2402 break; 2403 case 2: 2404 newrel = R_RX_RH_ABS5p5L; 2405 break; 2406 } 2407 2408 move_reloc (irel, srel, -2); 2409 SNIP (2, 1, newrel); 2410 } 2411 } 2412 2413 /* These always occur alone, but the offset depends on whether 2414 it's a MEMEX opcode (0x06) or not. */ 2415 if (irel->r_addend & RX_RELAXA_DSP14) 2416 { 2417 int offset; 2418 GET_RELOC; 2419 2420 if (insn[0] == 0x06) 2421 offset = 3; 2422 else 2423 offset = 4; 2424 2425 code = insn[1] & 3; 2426 2427 if (code == 2 && symval / scale <= 255) 2428 { 2429 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2430 2431 insn[1] &= 0xfc; 2432 insn[1] |= 0x01; 2433 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2434 if (newrel != ELF32_R_TYPE (srel->r_info)) 2435 { 2436 SNIP (offset, 1, newrel); 2437 *again = true; 2438 } 2439 } 2440 else if (code == 1 && symval == 0) 2441 { 2442 insn[1] &= 0xfc; 2443 SNIP (offset, 1, R_RX_NONE); 2444 *again = true; 2445 } 2446 } 2447 2448 /* IMM* codes: 2449 0 00 imm:32 2450 1 01 simm:8 2451 2 10 simm:16 2452 3 11 simm:24. */ 2453 2454 /* These always occur alone. */ 2455 if (irel->r_addend & RX_RELAXA_IMM6) 2456 { 2457 long ssymval; 2458 2459 GET_RELOC; 2460 2461 /* These relocations sign-extend, so we must do signed compares. */ 2462 ssymval = (long) symval; 2463 2464 code = insn[0] & 0x03; 2465 2466 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) 2467 { 2468 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2469 2470 insn[0] &= 0xfc; 2471 insn[0] |= 0x03; 2472 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2473 if (newrel != ELF32_R_TYPE (srel->r_info)) 2474 { 2475 SNIP (2, 1, newrel); 2476 *again = true; 2477 } 2478 } 2479 2480 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) 2481 { 2482 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2483 2484 insn[0] &= 0xfc; 2485 insn[0] |= 0x02; 2486 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2487 if (newrel != ELF32_R_TYPE (srel->r_info)) 2488 { 2489 SNIP (2, 1, newrel); 2490 *again = true; 2491 } 2492 } 2493 2494 /* Special case UIMM8 format: CMP #uimm8,Rdst. */ 2495 else if (code == 2 && ssymval <= 255 && ssymval >= 16 2496 /* Decodable bits. */ 2497 && (insn[0] & 0xfc) == 0x74 2498 /* Decodable bits. */ 2499 && ((insn[1] & 0xf0) == 0x00)) 2500 { 2501 int newrel; 2502 2503 insn[0] = 0x75; 2504 insn[1] = 0x50 | (insn[1] & 0x0f); 2505 2506 /* We can't relax this new opcode. */ 2507 irel->r_addend = 0; 2508 2509 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) 2510 newrel = R_RX_ABS8U; 2511 else 2512 newrel = R_RX_DIR8U; 2513 2514 SNIP (2, 1, newrel); 2515 *again = true; 2516 } 2517 2518 else if (code == 2 && ssymval <= 127 && ssymval >= -128) 2519 { 2520 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2521 2522 insn[0] &= 0xfc; 2523 insn[0] |= 0x01; 2524 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2525 if (newrel != ELF32_R_TYPE (srel->r_info)) 2526 { 2527 SNIP (2, 1, newrel); 2528 *again = true; 2529 } 2530 } 2531 2532 /* Special case UIMM4 format: CMP, MUL, AND, OR. */ 2533 else if (code == 1 && ssymval <= 15 && ssymval >= 0 2534 /* Decodable bits and immediate type. */ 2535 && insn[0] == 0x75 2536 /* Decodable bits. */ 2537 && (insn[1] & 0xc0) == 0x00) 2538 { 2539 static const int newop[4] = { 1, 3, 4, 5 }; 2540 2541 insn[0] = 0x60 | newop[insn[1] >> 4]; 2542 /* The register number doesn't move. */ 2543 2544 /* We can't relax this new opcode. */ 2545 irel->r_addend = 0; 2546 2547 move_reloc (irel, srel, -1); 2548 2549 SNIP (2, 1, R_RX_RH_UIMM4p8); 2550 *again = true; 2551 } 2552 2553 /* Special case UIMM4 format: ADD -> ADD/SUB. */ 2554 else if (code == 1 && ssymval <= 15 && ssymval >= -15 2555 /* Decodable bits and immediate type. */ 2556 && insn[0] == 0x71 2557 /* Same register for source and destination. */ 2558 && ((insn[1] >> 4) == (insn[1] & 0x0f))) 2559 { 2560 int newrel; 2561 2562 /* Note that we can't turn "add $0,Rs" into a NOP 2563 because the flags need to be set right. */ 2564 2565 if (ssymval < 0) 2566 { 2567 insn[0] = 0x60; /* Subtract. */ 2568 newrel = R_RX_RH_UNEG4p8; 2569 } 2570 else 2571 { 2572 insn[0] = 0x62; /* Add. */ 2573 newrel = R_RX_RH_UIMM4p8; 2574 } 2575 2576 /* The register number is in the right place. */ 2577 2578 /* We can't relax this new opcode. */ 2579 irel->r_addend = 0; 2580 2581 move_reloc (irel, srel, -1); 2582 2583 SNIP (2, 1, newrel); 2584 *again = true; 2585 } 2586 } 2587 2588 /* These are either matched with a DSP6 (2-byte base) or an id24 2589 (3-byte base). */ 2590 if (irel->r_addend & RX_RELAXA_IMM12) 2591 { 2592 int dspcode, offset = 0; 2593 long ssymval; 2594 2595 GET_RELOC; 2596 2597 if ((insn[0] & 0xfc) == 0xfc) 2598 dspcode = 1; /* Just something with one byte operand. */ 2599 else 2600 dspcode = insn[0] & 3; 2601 switch (dspcode) 2602 { 2603 case 0: offset = 2; break; 2604 case 1: offset = 3; break; 2605 case 2: offset = 4; break; 2606 case 3: offset = 2; break; 2607 } 2608 2609 /* These relocations sign-extend, so we must do signed compares. */ 2610 ssymval = (long) symval; 2611 2612 code = (insn[1] >> 2) & 3; 2613 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) 2614 { 2615 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2616 2617 insn[1] &= 0xf3; 2618 insn[1] |= 0x0c; 2619 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2620 if (newrel != ELF32_R_TYPE (srel->r_info)) 2621 { 2622 SNIP (offset, 1, newrel); 2623 *again = true; 2624 } 2625 } 2626 2627 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) 2628 { 2629 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2630 2631 insn[1] &= 0xf3; 2632 insn[1] |= 0x08; 2633 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2634 if (newrel != ELF32_R_TYPE (srel->r_info)) 2635 { 2636 SNIP (offset, 1, newrel); 2637 *again = true; 2638 } 2639 } 2640 2641 /* Special case UIMM8 format: MOV #uimm8,Rdst. */ 2642 else if (code == 2 && ssymval <= 255 && ssymval >= 16 2643 /* Decodable bits. */ 2644 && insn[0] == 0xfb 2645 /* Decodable bits. */ 2646 && ((insn[1] & 0x03) == 0x02)) 2647 { 2648 int newrel; 2649 2650 insn[0] = 0x75; 2651 insn[1] = 0x40 | (insn[1] >> 4); 2652 2653 /* We can't relax this new opcode. */ 2654 irel->r_addend = 0; 2655 2656 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) 2657 newrel = R_RX_ABS8U; 2658 else 2659 newrel = R_RX_DIR8U; 2660 2661 SNIP (2, 1, newrel); 2662 *again = true; 2663 } 2664 2665 else if (code == 2 && ssymval <= 127 && ssymval >= -128) 2666 { 2667 unsigned int newrel = ELF32_R_TYPE(srel->r_info); 2668 2669 insn[1] &= 0xf3; 2670 insn[1] |= 0x04; 2671 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2672 if (newrel != ELF32_R_TYPE(srel->r_info)) 2673 { 2674 SNIP (offset, 1, newrel); 2675 *again = true; 2676 } 2677 } 2678 2679 /* Special case UIMM4 format: MOV #uimm4,Rdst. */ 2680 else if (code == 1 && ssymval <= 15 && ssymval >= 0 2681 /* Decodable bits. */ 2682 && insn[0] == 0xfb 2683 /* Decodable bits. */ 2684 && ((insn[1] & 0x03) == 0x02)) 2685 { 2686 insn[0] = 0x66; 2687 insn[1] = insn[1] >> 4; 2688 2689 /* We can't relax this new opcode. */ 2690 irel->r_addend = 0; 2691 2692 move_reloc (irel, srel, -1); 2693 2694 SNIP (2, 1, R_RX_RH_UIMM4p8); 2695 *again = true; 2696 } 2697 } 2698 2699 if (irel->r_addend & RX_RELAXA_BRA) 2700 { 2701 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2702 int max_pcrel3 = 4; 2703 int alignment_glue = 0; 2704 2705 GET_RELOC; 2706 2707 /* Branches over alignment chunks are problematic, as 2708 deleting bytes here makes the branch *further* away. We 2709 can be agressive with branches within this alignment 2710 block, but not branches outside it. */ 2711 if ((prev_alignment == NULL 2712 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset)) 2713 && (next_alignment == NULL 2714 || symval > (bfd_vma)(sec_start + next_alignment->r_offset))) 2715 alignment_glue = section_alignment_glue; 2716 2717 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX 2718 && srel[1].r_addend & RX_RELAXA_BRA 2719 && srel[1].r_offset < irel->r_offset + pcrel) 2720 max_pcrel3 ++; 2721 2722 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2723 2724 /* The values we compare PCREL with are not what you'd 2725 expect; they're off by a little to compensate for (1) 2726 where the reloc is relative to the insn, and (2) how much 2727 the insn is going to change when we relax it. */ 2728 2729 /* These we have to decode. */ 2730 switch (insn[0]) 2731 { 2732 case 0x04: /* BRA pcdsp:24 */ 2733 if (-32768 + alignment_glue <= pcrel 2734 && pcrel <= 32765 - alignment_glue) 2735 { 2736 insn[0] = 0x38; 2737 SNIP (3, 1, newrel); 2738 *again = true; 2739 } 2740 break; 2741 2742 case 0x38: /* BRA pcdsp:16 */ 2743 if (-128 + alignment_glue <= pcrel 2744 && pcrel <= 127 - alignment_glue) 2745 { 2746 insn[0] = 0x2e; 2747 SNIP (2, 1, newrel); 2748 *again = true; 2749 } 2750 break; 2751 2752 case 0x2e: /* BRA pcdsp:8 */ 2753 /* Note that there's a risk here of shortening things so 2754 much that we no longer fit this reloc; it *should* 2755 only happen when you branch across a branch, and that 2756 branch also devolves into BRA.S. "Real" code should 2757 be OK. */ 2758 if (max_pcrel3 + alignment_glue <= pcrel 2759 && pcrel <= 10 - alignment_glue 2760 && allow_pcrel3) 2761 { 2762 insn[0] = 0x08; 2763 SNIP (1, 1, newrel); 2764 move_reloc (irel, srel, -1); 2765 *again = true; 2766 } 2767 break; 2768 2769 case 0x05: /* BSR pcdsp:24 */ 2770 if (-32768 + alignment_glue <= pcrel 2771 && pcrel <= 32765 - alignment_glue) 2772 { 2773 insn[0] = 0x39; 2774 SNIP (1, 1, newrel); 2775 *again = true; 2776 } 2777 break; 2778 2779 case 0x3a: /* BEQ.W pcdsp:16 */ 2780 case 0x3b: /* BNE.W pcdsp:16 */ 2781 if (-128 + alignment_glue <= pcrel 2782 && pcrel <= 127 - alignment_glue) 2783 { 2784 insn[0] = 0x20 | (insn[0] & 1); 2785 SNIP (1, 1, newrel); 2786 *again = true; 2787 } 2788 break; 2789 2790 case 0x20: /* BEQ.B pcdsp:8 */ 2791 case 0x21: /* BNE.B pcdsp:8 */ 2792 if (max_pcrel3 + alignment_glue <= pcrel 2793 && pcrel - alignment_glue <= 10 2794 && allow_pcrel3) 2795 { 2796 insn[0] = 0x10 | ((insn[0] & 1) << 3); 2797 SNIP (1, 1, newrel); 2798 move_reloc (irel, srel, -1); 2799 *again = true; 2800 } 2801 break; 2802 2803 case 0x16: /* synthetic BNE dsp24 */ 2804 case 0x1e: /* synthetic BEQ dsp24 */ 2805 if (-32767 + alignment_glue <= pcrel 2806 && pcrel <= 32766 - alignment_glue 2807 && insn[1] == 0x04) 2808 { 2809 if (insn[0] == 0x16) 2810 insn[0] = 0x3b; 2811 else 2812 insn[0] = 0x3a; 2813 /* We snip out the bytes at the end else the reloc 2814 will get moved too, and too much. */ 2815 SNIP (3, 2, newrel); 2816 move_reloc (irel, srel, -1); 2817 *again = true; 2818 } 2819 break; 2820 } 2821 2822 /* Special case - synthetic conditional branches, pcrel24. 2823 Note that EQ and NE have been handled above. */ 2824 if ((insn[0] & 0xf0) == 0x20 2825 && insn[1] == 0x06 2826 && insn[2] == 0x04 2827 && srel->r_offset != irel->r_offset + 1 2828 && -32767 + alignment_glue <= pcrel 2829 && pcrel <= 32766 - alignment_glue) 2830 { 2831 insn[1] = 0x05; 2832 insn[2] = 0x38; 2833 SNIP (5, 1, newrel); 2834 *again = true; 2835 } 2836 2837 /* Special case - synthetic conditional branches, pcrel16 */ 2838 if ((insn[0] & 0xf0) == 0x20 2839 && insn[1] == 0x05 2840 && insn[2] == 0x38 2841 && srel->r_offset != irel->r_offset + 1 2842 && -127 + alignment_glue <= pcrel 2843 && pcrel <= 126 - alignment_glue) 2844 { 2845 int cond = (insn[0] & 0x0f) ^ 0x01; 2846 2847 insn[0] = 0x20 | cond; 2848 /* By moving the reloc first, we avoid having 2849 delete_bytes move it also. */ 2850 move_reloc (irel, srel, -2); 2851 SNIP (2, 3, newrel); 2852 *again = true; 2853 } 2854 } 2855 2856 BFD_ASSERT (nrelocs == 0); 2857 2858 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can 2859 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky 2860 because it may have one or two relocations. */ 2861 if ((insn[0] & 0xfc) == 0xf8 2862 && (insn[1] & 0x80) == 0x00 2863 && (insn[0] & 0x03) != 0x03) 2864 { 2865 int dcode, icode, reg, ioff, dscale, ilen; 2866 bfd_vma disp_val = 0; 2867 long imm_val = 0; 2868 Elf_Internal_Rela * disp_rel = 0; 2869 Elf_Internal_Rela * imm_rel = 0; 2870 2871 /* Reset this. */ 2872 srel = irel; 2873 2874 dcode = insn[0] & 0x03; 2875 icode = (insn[1] >> 2) & 0x03; 2876 reg = (insn[1] >> 4) & 0x0f; 2877 2878 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2; 2879 2880 /* Figure out what the dispacement is. */ 2881 if (dcode == 1 || dcode == 2) 2882 { 2883 /* There's a displacement. See if there's a reloc for it. */ 2884 if (srel[1].r_offset == irel->r_offset + 2) 2885 { 2886 GET_RELOC; 2887 disp_val = symval; 2888 disp_rel = srel; 2889 } 2890 else 2891 { 2892 if (dcode == 1) 2893 disp_val = insn[2]; 2894 else 2895 { 2896#if RX_OPCODE_BIG_ENDIAN 2897 disp_val = insn[2] * 256 + insn[3]; 2898#else 2899 disp_val = insn[2] + insn[3] * 256; 2900#endif 2901 } 2902 switch (insn[1] & 3) 2903 { 2904 case 1: 2905 disp_val *= 2; 2906 scale = 2; 2907 break; 2908 case 2: 2909 disp_val *= 4; 2910 scale = 4; 2911 break; 2912 } 2913 } 2914 } 2915 2916 dscale = scale; 2917 2918 /* Figure out what the immediate is. */ 2919 if (srel[1].r_offset == irel->r_offset + ioff) 2920 { 2921 GET_RELOC; 2922 imm_val = (long) symval; 2923 imm_rel = srel; 2924 } 2925 else 2926 { 2927 unsigned char * ip = insn + ioff; 2928 2929 switch (icode) 2930 { 2931 case 1: 2932 /* For byte writes, we don't sign extend. Makes the math easier later. */ 2933 if (scale == 1) 2934 imm_val = ip[0]; 2935 else 2936 imm_val = (char) ip[0]; 2937 break; 2938 case 2: 2939#if RX_OPCODE_BIG_ENDIAN 2940 imm_val = ((char) ip[0] << 8) | ip[1]; 2941#else 2942 imm_val = ((char) ip[1] << 8) | ip[0]; 2943#endif 2944 break; 2945 case 3: 2946#if RX_OPCODE_BIG_ENDIAN 2947 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2]; 2948#else 2949 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0]; 2950#endif 2951 break; 2952 case 0: 2953#if RX_OPCODE_BIG_ENDIAN 2954 imm_val = ((unsigned) ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3]; 2955#else 2956 imm_val = ((unsigned) ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0]; 2957#endif 2958 break; 2959 } 2960 } 2961 2962 ilen = 2; 2963 2964 switch (dcode) 2965 { 2966 case 1: 2967 ilen += 1; 2968 break; 2969 case 2: 2970 ilen += 2; 2971 break; 2972 } 2973 2974 switch (icode) 2975 { 2976 case 1: 2977 ilen += 1; 2978 break; 2979 case 2: 2980 ilen += 2; 2981 break; 2982 case 3: 2983 ilen += 3; 2984 break; 2985 case 4: 2986 ilen += 4; 2987 break; 2988 } 2989 2990 /* The shortcut happens when the immediate is 0..255, 2991 register r0 to r7, and displacement (scaled) 0..31. */ 2992 2993 if (0 <= imm_val && imm_val <= 255 2994 && 0 <= reg && reg <= 7 2995 && disp_val / dscale <= 31) 2996 { 2997 insn[0] = 0x3c | (insn[1] & 0x03); 2998 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f); 2999 insn[2] = imm_val; 3000 3001 if (disp_rel) 3002 { 3003 int newrel = R_RX_NONE; 3004 3005 switch (dscale) 3006 { 3007 case 1: 3008 newrel = R_RX_RH_ABS5p8B; 3009 break; 3010 case 2: 3011 newrel = R_RX_RH_ABS5p8W; 3012 break; 3013 case 4: 3014 newrel = R_RX_RH_ABS5p8L; 3015 break; 3016 } 3017 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel); 3018 move_reloc (irel, disp_rel, -1); 3019 } 3020 if (imm_rel) 3021 { 3022 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U); 3023 move_reloc (disp_rel ? disp_rel : irel, 3024 imm_rel, 3025 irel->r_offset - imm_rel->r_offset + 2); 3026 } 3027 3028 SNIPNR (3, ilen - 3); 3029 *again = true; 3030 3031 /* We can't relax this new opcode. */ 3032 irel->r_addend = 0; 3033 } 3034 } 3035 } 3036 3037 /* We can't reliably relax branches to DIR3U_PCREL unless we know 3038 whatever they're branching over won't shrink any more. If we're 3039 basically done here, do one more pass just for branches - but 3040 don't request a pass after that one! */ 3041 if (!*again && !allow_pcrel3) 3042 { 3043 bool ignored; 3044 3045 elf32_rx_relax_section (abfd, sec, link_info, &ignored, true); 3046 } 3047 3048 return true; 3049 3050 error_return: 3051 free (free_contents); 3052 3053 if (shndx_buf != NULL) 3054 { 3055 shndx_hdr->contents = NULL; 3056 free (shndx_buf); 3057 } 3058 3059 free (free_intsyms); 3060 3061 return false; 3062} 3063 3064static bool 3065elf32_rx_relax_section_wrapper (bfd *abfd, 3066 asection *sec, 3067 struct bfd_link_info *link_info, 3068 bool *again) 3069{ 3070 return elf32_rx_relax_section (abfd, sec, link_info, again, false); 3071} 3072 3073/* Function to set the ELF flag bits. */ 3074 3075static bool 3076rx_elf_set_private_flags (bfd * abfd, flagword flags) 3077{ 3078 elf_elfheader (abfd)->e_flags = flags; 3079 elf_flags_init (abfd) = true; 3080 return true; 3081} 3082 3083static bool no_warn_mismatch = false; 3084static bool ignore_lma = true; 3085 3086void bfd_elf32_rx_set_target_flags (bool, bool); 3087 3088void 3089bfd_elf32_rx_set_target_flags (bool user_no_warn_mismatch, 3090 bool user_ignore_lma) 3091{ 3092 no_warn_mismatch = user_no_warn_mismatch; 3093 ignore_lma = user_ignore_lma; 3094} 3095 3096/* Converts FLAGS into a descriptive string. 3097 Returns a static pointer. */ 3098 3099static const char * 3100describe_flags (flagword flags, char *buf) 3101{ 3102 buf[0] = 0; 3103 3104 if (flags & E_FLAG_RX_64BIT_DOUBLES) 3105 strcat (buf, "64-bit doubles"); 3106 else 3107 strcat (buf, "32-bit doubles"); 3108 3109 if (flags & E_FLAG_RX_DSP) 3110 strcat (buf, ", dsp"); 3111 else 3112 strcat (buf, ", no dsp"); 3113 3114 if (flags & E_FLAG_RX_PID) 3115 strcat (buf, ", pid"); 3116 else 3117 strcat (buf, ", no pid"); 3118 3119 if (flags & E_FLAG_RX_ABI) 3120 strcat (buf, ", RX ABI"); 3121 else 3122 strcat (buf, ", GCC ABI"); 3123 3124 if (flags & E_FLAG_RX_SINSNS_SET) 3125 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions"); 3126 3127 return buf; 3128} 3129 3130/* Merge backend specific data from an object file to the output 3131 object file when linking. */ 3132 3133static bool 3134rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info) 3135{ 3136 bfd *obfd = info->output_bfd; 3137 flagword old_flags; 3138 flagword new_flags; 3139 bool error = false; 3140 3141 new_flags = elf_elfheader (ibfd)->e_flags; 3142 old_flags = elf_elfheader (obfd)->e_flags; 3143 3144 if (!elf_flags_init (obfd)) 3145 { 3146 /* First call, no flags set. */ 3147 elf_flags_init (obfd) = true; 3148 elf_elfheader (obfd)->e_flags = new_flags; 3149 } 3150 else if (old_flags != new_flags) 3151 { 3152 flagword known_flags; 3153 3154 if (old_flags & E_FLAG_RX_SINSNS_SET) 3155 { 3156 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0) 3157 { 3158 new_flags &= ~ E_FLAG_RX_SINSNS_MASK; 3159 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK); 3160 } 3161 } 3162 else if (new_flags & E_FLAG_RX_SINSNS_SET) 3163 { 3164 old_flags &= ~ E_FLAG_RX_SINSNS_MASK; 3165 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK); 3166 } 3167 3168 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES 3169 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK; 3170 3171 if ((old_flags ^ new_flags) & known_flags) 3172 { 3173 /* Only complain if flag bits we care about do not match. 3174 Other bits may be set, since older binaries did use some 3175 deprecated flags. */ 3176 if (no_warn_mismatch) 3177 { 3178 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags; 3179 } 3180 else 3181 { 3182 char buf[128]; 3183 3184 _bfd_error_handler (_("there is a conflict merging the" 3185 " ELF header flags from %pB"), 3186 ibfd); 3187 _bfd_error_handler (_(" the input file's flags: %s"), 3188 describe_flags (new_flags, buf)); 3189 _bfd_error_handler (_(" the output file's flags: %s"), 3190 describe_flags (old_flags, buf)); 3191 error = true; 3192 } 3193 } 3194 else 3195 elf_elfheader (obfd)->e_flags = new_flags & known_flags; 3196 } 3197 3198 if (error) 3199 bfd_set_error (bfd_error_bad_value); 3200 3201 return !error; 3202} 3203 3204static bool 3205rx_elf_print_private_bfd_data (bfd * abfd, void * ptr) 3206{ 3207 FILE * file = (FILE *) ptr; 3208 flagword flags; 3209 char buf[128]; 3210 3211 BFD_ASSERT (abfd != NULL && ptr != NULL); 3212 3213 /* Print normal ELF private data. */ 3214 _bfd_elf_print_private_bfd_data (abfd, ptr); 3215 3216 flags = elf_elfheader (abfd)->e_flags; 3217 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 3218 3219 fprintf (file, "%s", describe_flags (flags, buf)); 3220 return true; 3221} 3222 3223/* Return the MACH for an e_flags value. */ 3224 3225static int 3226elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED) 3227{ 3228#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_... 3229 Need to sort out how these flag bits are used. 3230 For now we assume that the flags are OK. */ 3231 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX) 3232#endif 3233 if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V2)) 3234 return bfd_mach_rx_v2; 3235 else if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V3)) 3236 return bfd_mach_rx_v3; 3237 else 3238 return bfd_mach_rx; 3239 3240 return 0; 3241} 3242 3243static bool 3244rx_elf_object_p (bfd * abfd) 3245{ 3246 int i; 3247 unsigned int u; 3248 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr; 3249 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd); 3250 int nphdrs = ehdr->e_phnum; 3251 sec_ptr bsec; 3252 static int saw_be = false; 3253 bfd_vma end_phdroff; 3254 3255 /* We never want to automatically choose the non-swapping big-endian 3256 target. The user can only get that explicitly, such as with -I 3257 and objcopy. */ 3258 if (abfd->xvec == &rx_elf32_be_ns_vec 3259 && abfd->target_defaulted) 3260 return false; 3261 3262 /* BFD->target_defaulted is not set to TRUE when a target is chosen 3263 as a fallback, so we check for "scanning" to know when to stop 3264 using the non-swapping target. */ 3265 if (abfd->xvec == &rx_elf32_be_ns_vec 3266 && saw_be) 3267 return false; 3268 if (abfd->xvec == &rx_elf32_be_vec) 3269 saw_be = true; 3270 3271 bfd_default_set_arch_mach (abfd, bfd_arch_rx, 3272 elf32_rx_machine (abfd)); 3273 3274 /* For each PHDR in the object, we must find some section that 3275 corresponds (based on matching file offsets) and use its VMA 3276 information to reconstruct the p_vaddr field we clobbered when we 3277 wrote it out. */ 3278 /* If PT_LOAD headers include the ELF file header or program headers 3279 then the PT_LOAD header does not start with some section contents. 3280 Making adjustments based on the difference between sh_offset and 3281 p_offset is nonsense in such cases. Exclude them. Note that 3282 since standard linker scripts for RX do not use SIZEOF_HEADERS, 3283 the linker won't normally create PT_LOAD segments covering the 3284 headers so this is mainly for passing the ld testsuite. 3285 FIXME. Why are we looking at non-PT_LOAD headers here? */ 3286 end_phdroff = ehdr->e_ehsize; 3287 if (ehdr->e_phoff != 0) 3288 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize; 3289 for (i=0; i<nphdrs; i++) 3290 { 3291 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++) 3292 { 3293 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u]; 3294 3295 if (phdr[i].p_filesz 3296 && phdr[i].p_offset >= end_phdroff 3297 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset 3298 && sec->sh_size > 0 3299 && sec->sh_type != SHT_NOBITS 3300 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1)) 3301 { 3302 /* Found one! The difference between the two addresses, 3303 plus the difference between the two file offsets, is 3304 enough information to reconstruct the lma. */ 3305 3306 /* Example where they aren't: 3307 PHDR[1] = lma fffc0100 offset 00002010 size 00000100 3308 SEC[6] = vma 00000050 offset 00002050 size 00000040 3309 3310 The correct LMA for the section is fffc0140 + (2050-2010). 3311 */ 3312 3313 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset); 3314 break; 3315 } 3316 } 3317 3318 /* We must update the bfd sections as well, so we don't stop 3319 with one match. */ 3320 bsec = abfd->sections; 3321 while (bsec) 3322 { 3323 if (phdr[i].p_filesz 3324 && phdr[i].p_vaddr <= bsec->vma 3325 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1)) 3326 { 3327 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr); 3328 } 3329 bsec = bsec->next; 3330 } 3331 } 3332 3333 return true; 3334} 3335 3336static bool 3337rx_linux_object_p (bfd * abfd) 3338{ 3339 bfd_default_set_arch_mach (abfd, bfd_arch_rx, elf32_rx_machine (abfd)); 3340 return true; 3341} 3342 3343 3344#ifdef DEBUG 3345void 3346rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms) 3347{ 3348 size_t locsymcount; 3349 Elf_Internal_Sym * isymbuf; 3350 Elf_Internal_Sym * isymend; 3351 Elf_Internal_Sym * isym; 3352 Elf_Internal_Shdr * symtab_hdr; 3353 char * st_info_str; 3354 char * st_info_stb_str; 3355 char * st_other_str; 3356 char * st_shndx_str; 3357 3358 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 3359 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym; 3360 if (!internal_syms) 3361 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, 3362 symtab_hdr->sh_info, 0, 3363 internal_syms, external_syms, NULL); 3364 else 3365 isymbuf = internal_syms; 3366 isymend = isymbuf + locsymcount; 3367 3368 for (isym = isymbuf ; isym < isymend ; isym++) 3369 { 3370 switch (ELF_ST_TYPE (isym->st_info)) 3371 { 3372 case STT_FUNC: st_info_str = "STT_FUNC"; break; 3373 case STT_SECTION: st_info_str = "STT_SECTION"; break; 3374 case STT_FILE: st_info_str = "STT_FILE"; break; 3375 case STT_OBJECT: st_info_str = "STT_OBJECT"; break; 3376 case STT_TLS: st_info_str = "STT_TLS"; break; 3377 default: st_info_str = ""; 3378 } 3379 switch (ELF_ST_BIND (isym->st_info)) 3380 { 3381 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break; 3382 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break; 3383 default: st_info_stb_str = ""; 3384 } 3385 switch (ELF_ST_VISIBILITY (isym->st_other)) 3386 { 3387 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break; 3388 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break; 3389 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break; 3390 default: st_other_str = ""; 3391 } 3392 switch (isym->st_shndx) 3393 { 3394 case SHN_ABS: st_shndx_str = "SHN_ABS"; break; 3395 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break; 3396 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break; 3397 default: st_shndx_str = ""; 3398 } 3399 3400 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s " 3401 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n", 3402 isym, 3403 (unsigned long) isym->st_value, 3404 (unsigned long) isym->st_size, 3405 isym->st_name, 3406 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link, 3407 isym->st_name), 3408 isym->st_info, st_info_str, st_info_stb_str, 3409 isym->st_other, st_other_str, 3410 isym->st_shndx, st_shndx_str); 3411 } 3412} 3413 3414char * 3415rx_get_reloc (long reloc) 3416{ 3417 if (0 <= reloc && reloc < R_RX_max) 3418 return rx_elf_howto_table[reloc].name; 3419 return ""; 3420} 3421#endif /* DEBUG */ 3422 3423 3424/* We must take care to keep the on-disk copy of any code sections 3425 that are fully linked swapped if the target is big endian, to match 3426 the Renesas tools. */ 3427 3428/* The rule is: big endian object that are final-link executables, 3429 have code sections stored with 32-bit words swapped relative to 3430 what you'd get by default. */ 3431 3432static bool 3433rx_get_section_contents (bfd * abfd, 3434 sec_ptr section, 3435 void * location, 3436 file_ptr offset, 3437 bfd_size_type count) 3438{ 3439 int exec = (abfd->flags & EXEC_P) ? 1 : 0; 3440 int s_code = (section->flags & SEC_CODE) ? 1 : 0; 3441 bool rv; 3442 3443#ifdef DJDEBUG 3444 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n", 3445 (long) offset, (long) count, section->name, 3446 bfd_big_endian(abfd) ? "be" : "le", 3447 exec, s_code, (long unsigned) section->filepos, 3448 (long unsigned) offset); 3449#endif 3450 3451 if (exec && s_code && bfd_big_endian (abfd)) 3452 { 3453 char * cloc = (char *) location; 3454 bfd_size_type cnt, end_cnt; 3455 3456 rv = true; 3457 3458 /* Fetch and swap unaligned bytes at the beginning. */ 3459 if (offset % 4) 3460 { 3461 char buf[4]; 3462 3463 rv = _bfd_generic_get_section_contents (abfd, section, buf, 3464 (offset & -4), 4); 3465 if (!rv) 3466 return false; 3467 3468 bfd_putb32 (bfd_getl32 (buf), buf); 3469 3470 cnt = 4 - (offset % 4); 3471 if (cnt > count) 3472 cnt = count; 3473 3474 memcpy (location, buf + (offset % 4), cnt); 3475 3476 count -= cnt; 3477 offset += cnt; 3478 cloc += count; 3479 } 3480 3481 end_cnt = count % 4; 3482 3483 /* Fetch and swap the middle bytes. */ 3484 if (count >= 4) 3485 { 3486 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset, 3487 count - end_cnt); 3488 if (!rv) 3489 return false; 3490 3491 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4) 3492 bfd_putb32 (bfd_getl32 (cloc), cloc); 3493 } 3494 3495 /* Fetch and swap the end bytes. */ 3496 if (end_cnt > 0) 3497 { 3498 char buf[4]; 3499 3500 /* Fetch the end bytes. */ 3501 rv = _bfd_generic_get_section_contents (abfd, section, buf, 3502 offset + count - end_cnt, 4); 3503 if (!rv) 3504 return false; 3505 3506 bfd_putb32 (bfd_getl32 (buf), buf); 3507 memcpy (cloc, buf, end_cnt); 3508 } 3509 } 3510 else 3511 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count); 3512 3513 return rv; 3514} 3515 3516#ifdef DJDEBUG 3517static bool 3518rx2_set_section_contents (bfd * abfd, 3519 sec_ptr section, 3520 const void * location, 3521 file_ptr offset, 3522 bfd_size_type count) 3523{ 3524 bfd_size_type i; 3525 3526 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n", 3527 section->name, (unsigned) section->vma, location, (int) offset, (int) count); 3528 for (i = 0; i < count; i++) 3529 { 3530 if (i % 16 == 0 && i > 0) 3531 fprintf (stderr, "\n"); 3532 3533 if (i % 16 && i % 4 == 0) 3534 fprintf (stderr, " "); 3535 3536 if (i % 16 == 0) 3537 fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); 3538 3539 fprintf (stderr, " %02x", ((unsigned char *) location)[i]); 3540 } 3541 fprintf (stderr, "\n"); 3542 3543 return _bfd_elf_set_section_contents (abfd, section, location, offset, count); 3544} 3545#define _bfd_elf_set_section_contents rx2_set_section_contents 3546#endif 3547 3548static bool 3549rx_set_section_contents (bfd * abfd, 3550 sec_ptr section, 3551 const void * location, 3552 file_ptr offset, 3553 bfd_size_type count) 3554{ 3555 bool exec = (abfd->flags & EXEC_P) != 0; 3556 bool s_code = (section->flags & SEC_CODE) != 0; 3557 bool rv; 3558 char * swapped_data = NULL; 3559 bfd_size_type i; 3560 bfd_vma caddr = section->vma + offset; 3561 file_ptr faddr = 0; 3562 bfd_size_type scount; 3563 3564#ifdef DJDEBUG 3565 bfd_size_type i; 3566 3567 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n", 3568 (long) offset, (long) count, section->name, 3569 bfd_big_endian (abfd) ? "be" : "le", 3570 exec, s_code); 3571 3572 for (i = 0; i < count; i++) 3573 { 3574 int a = section->vma + offset + i; 3575 3576 if (a % 16 == 0 && a > 0) 3577 fprintf (stderr, "\n"); 3578 3579 if (a % 16 && a % 4 == 0) 3580 fprintf (stderr, " "); 3581 3582 if (a % 16 == 0 || i == 0) 3583 fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); 3584 3585 fprintf (stderr, " %02x", ((unsigned char *) location)[i]); 3586 } 3587 3588 fprintf (stderr, "\n"); 3589#endif 3590 3591 if (! exec || ! s_code || ! bfd_big_endian (abfd)) 3592 return _bfd_elf_set_section_contents (abfd, section, location, offset, count); 3593 3594 while (count > 0 && caddr > 0 && caddr % 4) 3595 { 3596 switch (caddr % 4) 3597 { 3598 case 0: faddr = offset + 3; break; 3599 case 1: faddr = offset + 1; break; 3600 case 2: faddr = offset - 1; break; 3601 case 3: faddr = offset - 3; break; 3602 } 3603 3604 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); 3605 if (! rv) 3606 return rv; 3607 3608 location = (bfd_byte *) location + 1; 3609 offset ++; 3610 count --; 3611 caddr ++; 3612 } 3613 3614 scount = (int)(count / 4) * 4; 3615 if (scount > 0) 3616 { 3617 char * cloc = (char *) location; 3618 3619 swapped_data = (char *) bfd_alloc (abfd, count); 3620 if (swapped_data == NULL) 3621 return false; 3622 3623 for (i = 0; i < count; i += 4) 3624 { 3625 bfd_vma v = bfd_getl32 (cloc + i); 3626 bfd_putb32 (v, swapped_data + i); 3627 } 3628 3629 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount); 3630 3631 if (!rv) 3632 return rv; 3633 } 3634 3635 count -= scount; 3636 location = (bfd_byte *) location + scount; 3637 offset += scount; 3638 3639 if (count > 0) 3640 { 3641 caddr = section->vma + offset; 3642 while (count > 0) 3643 { 3644 switch (caddr % 4) 3645 { 3646 case 0: faddr = offset + 3; break; 3647 case 1: faddr = offset + 1; break; 3648 case 2: faddr = offset - 1; break; 3649 case 3: faddr = offset - 3; break; 3650 } 3651 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); 3652 if (! rv) 3653 return rv; 3654 3655 location = (bfd_byte *) location + 1; 3656 offset ++; 3657 count --; 3658 caddr ++; 3659 } 3660 } 3661 3662 return true; 3663} 3664 3665static bool 3666rx_final_link (bfd * abfd, struct bfd_link_info * info) 3667{ 3668 asection * o; 3669 3670 for (o = abfd->sections; o != NULL; o = o->next) 3671 { 3672#ifdef DJDEBUG 3673 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n", 3674 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize); 3675#endif 3676 if (o->flags & SEC_CODE 3677 && bfd_big_endian (abfd) 3678 && o->size % 4) 3679 { 3680#ifdef DJDEBUG 3681 fprintf (stderr, "adjusting...\n"); 3682#endif 3683 o->size += 4 - (o->size % 4); 3684 } 3685 } 3686 3687 return bfd_elf_final_link (abfd, info); 3688} 3689 3690static bool 3691elf32_rx_modify_headers (bfd *abfd, struct bfd_link_info *info) 3692{ 3693 const struct elf_backend_data * bed; 3694 struct elf_obj_tdata * tdata; 3695 Elf_Internal_Phdr * phdr; 3696 unsigned int count; 3697 unsigned int i; 3698 3699 bed = get_elf_backend_data (abfd); 3700 tdata = elf_tdata (abfd); 3701 phdr = tdata->phdr; 3702 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr; 3703 3704 if (ignore_lma) 3705 for (i = count; i-- != 0;) 3706 if (phdr[i].p_type == PT_LOAD) 3707 { 3708 /* The Renesas tools expect p_paddr to be zero. However, 3709 there is no other way to store the writable data in ROM for 3710 startup initialization. So, we let the linker *think* 3711 we're using paddr and vaddr the "usual" way, but at the 3712 last minute we move the paddr into the vaddr (which is what 3713 the simulator uses) and zero out paddr. Note that this 3714 does not affect the section headers, just the program 3715 headers. We hope. */ 3716 phdr[i].p_vaddr = phdr[i].p_paddr; 3717#if 0 /* If we zero out p_paddr, then the LMA in the section table 3718 becomes wrong. */ 3719 phdr[i].p_paddr = 0; 3720#endif 3721 } 3722 3723 return _bfd_elf_modify_headers (abfd, info); 3724} 3725 3726/* The default literal sections should always be marked as "code" (i.e., 3727 SHF_EXECINSTR). This is particularly important for big-endian mode 3728 when we do not want their contents byte reversed. */ 3729static const struct bfd_elf_special_section elf32_rx_special_sections[] = 3730{ 3731 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR }, 3732 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR }, 3733 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR }, 3734 { NULL, 0, 0, 0, 0 } 3735}; 3736 3737typedef struct { 3738 bfd *abfd; 3739 struct bfd_link_info *info; 3740 bfd_vma table_start; 3741 int table_size; 3742 bfd_vma *table_handlers; 3743 bfd_vma table_default_handler; 3744 struct bfd_link_hash_entry **table_entries; 3745 struct bfd_link_hash_entry *table_default_entry; 3746 FILE *mapfile; 3747} RX_Table_Info; 3748 3749static bool 3750rx_table_find (struct bfd_hash_entry *vent, void *vinfo) 3751{ 3752 RX_Table_Info *info = (RX_Table_Info *)vinfo; 3753 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent; 3754 const char *name; /* of the symbol we've found */ 3755 asection *sec; 3756 struct bfd *abfd; 3757 int idx; 3758 const char *tname; /* name of the table */ 3759 bfd_vma start_addr, end_addr; 3760 char *buf; 3761 struct bfd_link_hash_entry * h; 3762 3763 /* We're looking for globally defined symbols of the form 3764 $tablestart$<NAME>. */ 3765 if (ent->type != bfd_link_hash_defined 3766 && ent->type != bfd_link_hash_defweak) 3767 return true; 3768 3769 name = ent->root.string; 3770 sec = ent->u.def.section; 3771 abfd = sec->owner; 3772 3773 if (!startswith (name, "$tablestart$")) 3774 return true; 3775 3776 sec->flags |= SEC_KEEP; 3777 3778 tname = name + 12; 3779 3780 start_addr = ent->u.def.value; 3781 3782 /* At this point, we can't build the table but we can (and must) 3783 find all the related symbols and mark their sections as SEC_KEEP 3784 so we don't garbage collect them. */ 3785 3786 buf = (char *) bfd_malloc (12 + 10 + strlen (tname)); 3787 if (buf == NULL) 3788 return false; 3789 3790 sprintf (buf, "$tableend$%s", tname); 3791 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true); 3792 if (!h || (h->type != bfd_link_hash_defined 3793 && h->type != bfd_link_hash_defweak)) 3794 { 3795 /* xgettext:c-format */ 3796 _bfd_error_handler (_("%pB:%pA: table %s missing corresponding %s"), 3797 abfd, sec, name, buf); 3798 return true; 3799 } 3800 3801 if (h->u.def.section != ent->u.def.section) 3802 { 3803 /* xgettext:c-format */ 3804 _bfd_error_handler (_("%pB:%pA: %s and %s must be in the same input section"), 3805 h->u.def.section->owner, h->u.def.section, 3806 name, buf); 3807 return true; 3808 } 3809 3810 end_addr = h->u.def.value; 3811 3812 sprintf (buf, "$tableentry$default$%s", tname); 3813 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true); 3814 if (h && (h->type == bfd_link_hash_defined 3815 || h->type == bfd_link_hash_defweak)) 3816 { 3817 h->u.def.section->flags |= SEC_KEEP; 3818 } 3819 3820 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++) 3821 { 3822 sprintf (buf, "$tableentry$%d$%s", idx, tname); 3823 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true); 3824 if (h && (h->type == bfd_link_hash_defined 3825 || h->type == bfd_link_hash_defweak)) 3826 { 3827 h->u.def.section->flags |= SEC_KEEP; 3828 } 3829 } 3830 3831 /* Return TRUE to keep scanning, FALSE to end the traversal. */ 3832 return true; 3833} 3834 3835/* We need to check for table entry symbols and build the tables, and 3836 we need to do it before the linker does garbage collection. This function is 3837 called once per input object file. */ 3838static bool 3839rx_check_directives 3840 (bfd * abfd ATTRIBUTE_UNUSED, 3841 struct bfd_link_info * info ATTRIBUTE_UNUSED) 3842{ 3843 RX_Table_Info stuff; 3844 3845 stuff.abfd = abfd; 3846 stuff.info = info; 3847 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff); 3848 3849 return true; 3850} 3851 3852 3853static bool 3854rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo) 3855{ 3856 RX_Table_Info *info = (RX_Table_Info *)vinfo; 3857 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent; 3858 int idx; 3859 const char *name; 3860 bfd_vma addr; 3861 3862 /* See if the symbol ENT has an address listed in the table, and 3863 isn't a debug/special symbol. If so, put it in the table. */ 3864 3865 if (ent->type != bfd_link_hash_defined 3866 && ent->type != bfd_link_hash_defweak) 3867 return true; 3868 3869 name = ent->root.string; 3870 3871 if (name[0] == '$' || name[0] == '.' || name[0] < ' ') 3872 return true; 3873 3874 addr = (ent->u.def.value 3875 + ent->u.def.section->output_section->vma 3876 + ent->u.def.section->output_offset); 3877 3878 for (idx = 0; idx < info->table_size; idx ++) 3879 if (addr == info->table_handlers[idx]) 3880 info->table_entries[idx] = ent; 3881 3882 if (addr == info->table_default_handler) 3883 info->table_default_entry = ent; 3884 3885 return true; 3886} 3887 3888static bool 3889rx_table_map (struct bfd_hash_entry *vent, void *vinfo) 3890{ 3891 RX_Table_Info *info = (RX_Table_Info *)vinfo; 3892 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent; 3893 const char *name; /* of the symbol we've found */ 3894 int idx; 3895 const char *tname; /* name of the table */ 3896 bfd_vma start_addr, end_addr; 3897 char *buf; 3898 struct bfd_link_hash_entry * h; 3899 int need_elipses; 3900 3901 /* We're looking for globally defined symbols of the form 3902 $tablestart$<NAME>. */ 3903 if (ent->type != bfd_link_hash_defined 3904 && ent->type != bfd_link_hash_defweak) 3905 return true; 3906 3907 name = ent->root.string; 3908 3909 if (!startswith (name, "$tablestart$")) 3910 return true; 3911 3912 tname = name + 12; 3913 start_addr = (ent->u.def.value 3914 + ent->u.def.section->output_section->vma 3915 + ent->u.def.section->output_offset); 3916 3917 buf = (char *) bfd_malloc (12 + 10 + strlen (tname)); 3918 if (buf == NULL) 3919 return false; 3920 3921 sprintf (buf, "$tableend$%s", tname); 3922 end_addr = get_symbol_value_maybe (buf, info->info); 3923 3924 sprintf (buf, "$tableentry$default$%s", tname); 3925 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true); 3926 if (h) 3927 { 3928 info->table_default_handler = (h->u.def.value 3929 + h->u.def.section->output_section->vma 3930 + h->u.def.section->output_offset); 3931 } 3932 else 3933 /* Zero is a valid handler address! */ 3934 info->table_default_handler = (bfd_vma) (-1); 3935 info->table_default_entry = NULL; 3936 3937 info->table_start = start_addr; 3938 info->table_size = (int) (end_addr - start_addr) / 4; 3939 info->table_handlers = (bfd_vma *) 3940 bfd_malloc (info->table_size * sizeof (bfd_vma)); 3941 if (info->table_handlers == NULL) 3942 { 3943 free (buf); 3944 return false; 3945 } 3946 info->table_entries = (struct bfd_link_hash_entry **) 3947 bfd_malloc (info->table_size * sizeof (struct bfd_link_hash_entry)); 3948 if (info->table_entries == NULL) 3949 { 3950 free (info->table_handlers); 3951 free (buf); 3952 return false; 3953 } 3954 3955 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++) 3956 { 3957 sprintf (buf, "$tableentry$%d$%s", idx, tname); 3958 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true); 3959 if (h && (h->type == bfd_link_hash_defined 3960 || h->type == bfd_link_hash_defweak)) 3961 { 3962 info->table_handlers[idx] = (h->u.def.value 3963 + h->u.def.section->output_section->vma 3964 + h->u.def.section->output_offset); 3965 } 3966 else 3967 info->table_handlers[idx] = info->table_default_handler; 3968 info->table_entries[idx] = NULL; 3969 } 3970 3971 free (buf); 3972 3973 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info); 3974 3975 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n", 3976 tname, info->table_size, start_addr); 3977 3978 if (info->table_default_entry) 3979 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n", 3980 info->table_default_entry->root.string, 3981 info->table_default_handler); 3982 else if (info->table_default_handler != (bfd_vma)(-1)) 3983 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n", 3984 info->table_default_handler); 3985 else 3986 fprintf (info->mapfile, " no default handler\n"); 3987 3988 need_elipses = 1; 3989 for (idx = 0; idx < info->table_size; idx ++) 3990 { 3991 if (info->table_handlers[idx] == info->table_default_handler) 3992 { 3993 if (need_elipses) 3994 fprintf (info->mapfile, " . . .\n"); 3995 need_elipses = 0; 3996 continue; 3997 } 3998 need_elipses = 1; 3999 4000 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx); 4001 4002 if (info->table_handlers[idx] == (bfd_vma) (-1)) 4003 fprintf (info->mapfile, "(no handler found)\n"); 4004 4005 else if (info->table_handlers[idx] == info->table_default_handler) 4006 { 4007 if (info->table_default_entry) 4008 fprintf (info->mapfile, "(default)\n"); 4009 else 4010 fprintf (info->mapfile, "(default)\n"); 4011 } 4012 4013 else if (info->table_entries[idx]) 4014 { 4015 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string); 4016 } 4017 4018 else 4019 { 4020 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]); 4021 } 4022 } 4023 if (need_elipses) 4024 fprintf (info->mapfile, " . . .\n"); 4025 4026 return true; 4027} 4028 4029void 4030rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile) 4031{ 4032 /* We scan the symbol table looking for $tableentry$'s, and for 4033 each, try to deduce which handlers go with which entries. */ 4034 4035 RX_Table_Info stuff; 4036 4037 stuff.abfd = obfd; 4038 stuff.info = info; 4039 stuff.mapfile = mapfile; 4040 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff); 4041} 4042 4043 4044#define ELF_ARCH bfd_arch_rx 4045#define ELF_MACHINE_CODE EM_RX 4046#define ELF_MAXPAGESIZE 0x1000 4047 4048#define TARGET_BIG_SYM rx_elf32_be_vec 4049#define TARGET_BIG_NAME "elf32-rx-be" 4050 4051#define TARGET_LITTLE_SYM rx_elf32_le_vec 4052#define TARGET_LITTLE_NAME "elf32-rx-le" 4053 4054#define elf_info_to_howto_rel NULL 4055#define elf_info_to_howto rx_info_to_howto_rela 4056#define elf_backend_object_p rx_elf_object_p 4057#define elf_backend_relocate_section rx_elf_relocate_section 4058#define elf_symbol_leading_char ('_') 4059#define elf_backend_can_gc_sections 1 4060#define elf_backend_modify_headers elf32_rx_modify_headers 4061 4062#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup 4063#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup 4064#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags 4065#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data 4066#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data 4067#define bfd_elf32_get_section_contents rx_get_section_contents 4068#define bfd_elf32_set_section_contents rx_set_section_contents 4069#define bfd_elf32_bfd_final_link rx_final_link 4070#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper 4071#define elf_backend_special_sections elf32_rx_special_sections 4072#define elf_backend_check_directives rx_check_directives 4073 4074#include "elf32-target.h" 4075 4076/* We define a second big-endian target that doesn't have the custom 4077 section get/set hooks, for times when we want to preserve the 4078 pre-swapped .text sections (like objcopy). */ 4079 4080#undef TARGET_BIG_SYM 4081#define TARGET_BIG_SYM rx_elf32_be_ns_vec 4082#undef TARGET_BIG_NAME 4083#define TARGET_BIG_NAME "elf32-rx-be-ns" 4084#undef TARGET_LITTLE_SYM 4085 4086#undef bfd_elf32_get_section_contents 4087#undef bfd_elf32_set_section_contents 4088 4089#undef elf32_bed 4090#define elf32_bed elf32_rx_be_ns_bed 4091 4092#include "elf32-target.h" 4093 4094#undef TARGET_LITTLE_SYM 4095#define TARGET_LITTLE_SYM rx_elf32_linux_le_vec 4096#undef TARGET_LITTLE_NAME 4097#define TARGET_LITTLE_NAME "elf32-rx-linux" 4098#undef TARGET_BIG_SYM 4099#undef TARGET_BIG_NAME 4100 4101#undef elf_backend_object_p 4102#define elf_backend_object_p rx_linux_object_p 4103#undef elf_symbol_leading_char 4104#undef elf32_bed 4105#define elf32_bed elf32_rx_le_linux_bed 4106 4107#include "elf32-target.h" 4108