1@section Architectures 2BFD keeps one atom in a BFD describing the 3architecture of the data attached to the BFD: a pointer to a 4@code{bfd_arch_info_type}. 5 6Pointers to structures can be requested independently of a BFD 7so that an architecture's information can be interrogated 8without access to an open BFD. 9 10The architecture information is provided by each architecture package. 11The set of default architectures is selected by the macro 12@code{SELECT_ARCHITECTURES}. This is normally set up in the 13@file{config/@var{target}.mt} file of your choice. If the name is not 14defined, then all the architectures supported are included. 15 16When BFD starts up, all the architectures are called with an 17initialize method. It is up to the architecture back end to 18insert as many items into the list of architectures as it wants to; 19generally this would be one for each machine and one for the 20default case (an item with a machine field of 0). 21 22BFD's idea of an architecture is implemented in @file{archures.c}. 23 24@subsection bfd_architecture 25 26 27@strong{Description}@* 28This enum gives the object file's CPU architecture, in a 29global sense---i.e., what processor family does it belong to? 30Another field indicates which processor within 31the family is in use. The machine gives a number which 32distinguishes different versions of the architecture, 33containing, for example, 68020 for Motorola 68020. 34@example 35enum bfd_architecture 36@{ 37 bfd_arch_unknown, /* File arch not known. */ 38 bfd_arch_obscure, /* Arch known, not one of these. */ 39 bfd_arch_m68k, /* Motorola 68xxx. */ 40#define bfd_mach_m68000 1 41#define bfd_mach_m68008 2 42#define bfd_mach_m68010 3 43#define bfd_mach_m68020 4 44#define bfd_mach_m68030 5 45#define bfd_mach_m68040 6 46#define bfd_mach_m68060 7 47#define bfd_mach_cpu32 8 48#define bfd_mach_fido 9 49#define bfd_mach_mcf_isa_a_nodiv 10 50#define bfd_mach_mcf_isa_a 11 51#define bfd_mach_mcf_isa_a_mac 12 52#define bfd_mach_mcf_isa_a_emac 13 53#define bfd_mach_mcf_isa_aplus 14 54#define bfd_mach_mcf_isa_aplus_mac 15 55#define bfd_mach_mcf_isa_aplus_emac 16 56#define bfd_mach_mcf_isa_b_nousp 17 57#define bfd_mach_mcf_isa_b_nousp_mac 18 58#define bfd_mach_mcf_isa_b_nousp_emac 19 59#define bfd_mach_mcf_isa_b 20 60#define bfd_mach_mcf_isa_b_mac 21 61#define bfd_mach_mcf_isa_b_emac 22 62#define bfd_mach_mcf_isa_b_float 23 63#define bfd_mach_mcf_isa_b_float_mac 24 64#define bfd_mach_mcf_isa_b_float_emac 25 65#define bfd_mach_mcf_isa_c 26 66#define bfd_mach_mcf_isa_c_mac 27 67#define bfd_mach_mcf_isa_c_emac 28 68#define bfd_mach_mcf_isa_c_nodiv 29 69#define bfd_mach_mcf_isa_c_nodiv_mac 30 70#define bfd_mach_mcf_isa_c_nodiv_emac 31 71 bfd_arch_vax, /* DEC Vax. */ 72 73 bfd_arch_or1k, /* OpenRISC 1000. */ 74#define bfd_mach_or1k 1 75#define bfd_mach_or1knd 2 76 77 bfd_arch_sparc, /* SPARC. */ 78#define bfd_mach_sparc 1 79/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ 80#define bfd_mach_sparc_sparclet 2 81#define bfd_mach_sparc_sparclite 3 82#define bfd_mach_sparc_v8plus 4 83#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ 84#define bfd_mach_sparc_sparclite_le 6 85#define bfd_mach_sparc_v9 7 86#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ 87#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ 88#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ 89#define bfd_mach_sparc_v8plusc 11 /* with UA2005 and T1 add'ns. */ 90#define bfd_mach_sparc_v9c 12 /* with UA2005 and T1 add'ns. */ 91#define bfd_mach_sparc_v8plusd 13 /* with UA2007 and T3 add'ns. */ 92#define bfd_mach_sparc_v9d 14 /* with UA2007 and T3 add'ns. */ 93#define bfd_mach_sparc_v8pluse 15 /* with OSA2001 and T4 add'ns (no IMA). */ 94#define bfd_mach_sparc_v9e 16 /* with OSA2001 and T4 add'ns (no IMA). */ 95#define bfd_mach_sparc_v8plusv 17 /* with OSA2011 and T4 and IMA and FJMAU add'ns. */ 96#define bfd_mach_sparc_v9v 18 /* with OSA2011 and T4 and IMA and FJMAU add'ns. */ 97#define bfd_mach_sparc_v8plusm 19 /* with OSA2015 and M7 add'ns. */ 98#define bfd_mach_sparc_v9m 20 /* with OSA2015 and M7 add'ns. */ 99#define bfd_mach_sparc_v8plusm8 21 /* with OSA2017 and M8 add'ns. */ 100#define bfd_mach_sparc_v9m8 22 /* with OSA2017 and M8 add'ns. */ 101/* Nonzero if MACH has the v9 instruction set. */ 102#define bfd_mach_sparc_v9_p(mach) \ 103 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m8 \ 104 && (mach) != bfd_mach_sparc_sparclite_le) 105/* Nonzero if MACH is a 64 bit sparc architecture. */ 106#define bfd_mach_sparc_64bit_p(mach) \ 107 ((mach) >= bfd_mach_sparc_v9 \ 108 && (mach) != bfd_mach_sparc_v8plusb \ 109 && (mach) != bfd_mach_sparc_v8plusc \ 110 && (mach) != bfd_mach_sparc_v8plusd \ 111 && (mach) != bfd_mach_sparc_v8pluse \ 112 && (mach) != bfd_mach_sparc_v8plusv \ 113 && (mach) != bfd_mach_sparc_v8plusm \ 114 && (mach) != bfd_mach_sparc_v8plusm8) 115 bfd_arch_spu, /* PowerPC SPU. */ 116#define bfd_mach_spu 256 117 bfd_arch_mips, /* MIPS Rxxxx. */ 118#define bfd_mach_mips3000 3000 119#define bfd_mach_mips3900 3900 120#define bfd_mach_mips4000 4000 121#define bfd_mach_mips4010 4010 122#define bfd_mach_mips4100 4100 123#define bfd_mach_mips4111 4111 124#define bfd_mach_mips4120 4120 125#define bfd_mach_mips4300 4300 126#define bfd_mach_mips4400 4400 127#define bfd_mach_mips4600 4600 128#define bfd_mach_mips4650 4650 129#define bfd_mach_mips5000 5000 130#define bfd_mach_mips5400 5400 131#define bfd_mach_mips5500 5500 132#define bfd_mach_mips5900 5900 133#define bfd_mach_mips6000 6000 134#define bfd_mach_mips7000 7000 135#define bfd_mach_mips8000 8000 136#define bfd_mach_mips9000 9000 137#define bfd_mach_mips10000 10000 138#define bfd_mach_mips12000 12000 139#define bfd_mach_mips14000 14000 140#define bfd_mach_mips16000 16000 141#define bfd_mach_mips16 16 142#define bfd_mach_mips5 5 143#define bfd_mach_mips_loongson_2e 3001 144#define bfd_mach_mips_loongson_2f 3002 145#define bfd_mach_mips_gs464 3003 146#define bfd_mach_mips_gs464e 3004 147#define bfd_mach_mips_gs264e 3005 148#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01. */ 149#define bfd_mach_mips_octeon 6501 150#define bfd_mach_mips_octeonp 6601 151#define bfd_mach_mips_octeon2 6502 152#define bfd_mach_mips_octeon3 6503 153#define bfd_mach_mips_xlr 887682 /* decimal 'XLR'. */ 154#define bfd_mach_mips_interaptiv_mr2 736550 /* decimal 'IA2'. */ 155#define bfd_mach_mipsisa32 32 156#define bfd_mach_mipsisa32r2 33 157#define bfd_mach_mipsisa32r3 34 158#define bfd_mach_mipsisa32r5 36 159#define bfd_mach_mipsisa32r6 37 160#define bfd_mach_mipsisa64 64 161#define bfd_mach_mipsisa64r2 65 162#define bfd_mach_mipsisa64r3 66 163#define bfd_mach_mipsisa64r5 68 164#define bfd_mach_mipsisa64r6 69 165#define bfd_mach_mips_micromips 96 166 bfd_arch_i386, /* Intel 386. */ 167#define bfd_mach_i386_intel_syntax (1 << 0) 168#define bfd_mach_i386_i8086 (1 << 1) 169#define bfd_mach_i386_i386 (1 << 2) 170#define bfd_mach_x86_64 (1 << 3) 171#define bfd_mach_x64_32 (1 << 4) 172#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) 173#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) 174#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) 175 bfd_arch_iamcu, /* Intel MCU. */ 176#define bfd_mach_iamcu (1 << 8) 177#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu) 178#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax) 179 bfd_arch_romp, /* IBM ROMP PC/RT. */ 180 bfd_arch_convex, /* Convex. */ 181 bfd_arch_m98k, /* Motorola 98xxx. */ 182 bfd_arch_pyramid, /* Pyramid Technology. */ 183 bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300). */ 184#define bfd_mach_h8300 1 185#define bfd_mach_h8300h 2 186#define bfd_mach_h8300s 3 187#define bfd_mach_h8300hn 4 188#define bfd_mach_h8300sn 5 189#define bfd_mach_h8300sx 6 190#define bfd_mach_h8300sxn 7 191 bfd_arch_pdp11, /* DEC PDP-11. */ 192 bfd_arch_powerpc, /* PowerPC. */ 193#define bfd_mach_ppc 32 194#define bfd_mach_ppc64 64 195#define bfd_mach_ppc_403 403 196#define bfd_mach_ppc_403gc 4030 197#define bfd_mach_ppc_405 405 198#define bfd_mach_ppc_505 505 199#define bfd_mach_ppc_601 601 200#define bfd_mach_ppc_602 602 201#define bfd_mach_ppc_603 603 202#define bfd_mach_ppc_ec603e 6031 203#define bfd_mach_ppc_604 604 204#define bfd_mach_ppc_620 620 205#define bfd_mach_ppc_630 630 206#define bfd_mach_ppc_750 750 207#define bfd_mach_ppc_860 860 208#define bfd_mach_ppc_a35 35 209#define bfd_mach_ppc_rs64ii 642 210#define bfd_mach_ppc_rs64iii 643 211#define bfd_mach_ppc_7400 7400 212#define bfd_mach_ppc_e500 500 213#define bfd_mach_ppc_e500mc 5001 214#define bfd_mach_ppc_e500mc64 5005 215#define bfd_mach_ppc_e5500 5006 216#define bfd_mach_ppc_e6500 5007 217#define bfd_mach_ppc_titan 83 218#define bfd_mach_ppc_vle 84 219 bfd_arch_rs6000, /* IBM RS/6000. */ 220#define bfd_mach_rs6k 6000 221#define bfd_mach_rs6k_rs1 6001 222#define bfd_mach_rs6k_rsc 6003 223#define bfd_mach_rs6k_rs2 6002 224 bfd_arch_hppa, /* HP PA RISC. */ 225#define bfd_mach_hppa10 10 226#define bfd_mach_hppa11 11 227#define bfd_mach_hppa20 20 228#define bfd_mach_hppa20w 25 229 bfd_arch_d10v, /* Mitsubishi D10V. */ 230#define bfd_mach_d10v 1 231#define bfd_mach_d10v_ts2 2 232#define bfd_mach_d10v_ts3 3 233 bfd_arch_d30v, /* Mitsubishi D30V. */ 234 bfd_arch_dlx, /* DLX. */ 235 bfd_arch_m68hc11, /* Motorola 68HC11. */ 236 bfd_arch_m68hc12, /* Motorola 68HC12. */ 237#define bfd_mach_m6812_default 0 238#define bfd_mach_m6812 1 239#define bfd_mach_m6812s 2 240 bfd_arch_m9s12x, /* Freescale S12X. */ 241 bfd_arch_m9s12xg, /* Freescale XGATE. */ 242 bfd_arch_s12z, /* Freescale S12Z. */ 243#define bfd_mach_s12z_default 0 244 bfd_arch_z8k, /* Zilog Z8000. */ 245#define bfd_mach_z8001 1 246#define bfd_mach_z8002 2 247 bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH). */ 248#define bfd_mach_sh 1 249#define bfd_mach_sh2 0x20 250#define bfd_mach_sh_dsp 0x2d 251#define bfd_mach_sh2a 0x2a 252#define bfd_mach_sh2a_nofpu 0x2b 253#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 254#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 255#define bfd_mach_sh2a_or_sh4 0x2a3 256#define bfd_mach_sh2a_or_sh3e 0x2a4 257#define bfd_mach_sh2e 0x2e 258#define bfd_mach_sh3 0x30 259#define bfd_mach_sh3_nommu 0x31 260#define bfd_mach_sh3_dsp 0x3d 261#define bfd_mach_sh3e 0x3e 262#define bfd_mach_sh4 0x40 263#define bfd_mach_sh4_nofpu 0x41 264#define bfd_mach_sh4_nommu_nofpu 0x42 265#define bfd_mach_sh4a 0x4a 266#define bfd_mach_sh4a_nofpu 0x4b 267#define bfd_mach_sh4al_dsp 0x4d 268 bfd_arch_alpha, /* Dec Alpha. */ 269#define bfd_mach_alpha_ev4 0x10 270#define bfd_mach_alpha_ev5 0x20 271#define bfd_mach_alpha_ev6 0x30 272 bfd_arch_arm, /* Advanced Risc Machines ARM. */ 273#define bfd_mach_arm_unknown 0 274#define bfd_mach_arm_2 1 275#define bfd_mach_arm_2a 2 276#define bfd_mach_arm_3 3 277#define bfd_mach_arm_3M 4 278#define bfd_mach_arm_4 5 279#define bfd_mach_arm_4T 6 280#define bfd_mach_arm_5 7 281#define bfd_mach_arm_5T 8 282#define bfd_mach_arm_5TE 9 283#define bfd_mach_arm_XScale 10 284#define bfd_mach_arm_ep9312 11 285#define bfd_mach_arm_iWMMXt 12 286#define bfd_mach_arm_iWMMXt2 13 287#define bfd_mach_arm_5TEJ 14 288#define bfd_mach_arm_6 15 289#define bfd_mach_arm_6KZ 16 290#define bfd_mach_arm_6T2 17 291#define bfd_mach_arm_6K 18 292#define bfd_mach_arm_7 19 293#define bfd_mach_arm_6M 20 294#define bfd_mach_arm_6SM 21 295#define bfd_mach_arm_7EM 22 296#define bfd_mach_arm_8 23 297#define bfd_mach_arm_8R 24 298#define bfd_mach_arm_8M_BASE 25 299#define bfd_mach_arm_8M_MAIN 26 300#define bfd_mach_arm_8_1M_MAIN 27 301#define bfd_mach_arm_9 28 302 bfd_arch_nds32, /* Andes NDS32. */ 303#define bfd_mach_n1 1 304#define bfd_mach_n1h 2 305#define bfd_mach_n1h_v2 3 306#define bfd_mach_n1h_v3 4 307#define bfd_mach_n1h_v3m 5 308 bfd_arch_ns32k, /* National Semiconductors ns32000. */ 309 bfd_arch_tic30, /* Texas Instruments TMS320C30. */ 310 bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X. */ 311#define bfd_mach_tic3x 30 312#define bfd_mach_tic4x 40 313 bfd_arch_tic54x, /* Texas Instruments TMS320C54X. */ 314 bfd_arch_tic6x, /* Texas Instruments TMS320C6X. */ 315 bfd_arch_v850, /* NEC V850. */ 316 bfd_arch_v850_rh850,/* NEC V850 (using RH850 ABI). */ 317#define bfd_mach_v850 1 318#define bfd_mach_v850e 'E' 319#define bfd_mach_v850e1 '1' 320#define bfd_mach_v850e2 0x4532 321#define bfd_mach_v850e2v3 0x45325633 322#define bfd_mach_v850e3v5 0x45335635 /* ('E'|'3'|'V'|'5'). */ 323 bfd_arch_arc, /* ARC Cores. */ 324#define bfd_mach_arc_a4 0 325#define bfd_mach_arc_a5 1 326#define bfd_mach_arc_arc600 2 327#define bfd_mach_arc_arc601 4 328#define bfd_mach_arc_arc700 3 329#define bfd_mach_arc_arcv2 5 330 bfd_arch_m32c, /* Renesas M16C/M32C. */ 331#define bfd_mach_m16c 0x75 332#define bfd_mach_m32c 0x78 333 bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D). */ 334#define bfd_mach_m32r 1 /* For backwards compatibility. */ 335#define bfd_mach_m32rx 'x' 336#define bfd_mach_m32r2 '2' 337 bfd_arch_mn10200, /* Matsushita MN10200. */ 338 bfd_arch_mn10300, /* Matsushita MN10300. */ 339#define bfd_mach_mn10300 300 340#define bfd_mach_am33 330 341#define bfd_mach_am33_2 332 342 bfd_arch_fr30, 343#define bfd_mach_fr30 0x46523330 344 bfd_arch_frv, 345#define bfd_mach_frv 1 346#define bfd_mach_frvsimple 2 347#define bfd_mach_fr300 300 348#define bfd_mach_fr400 400 349#define bfd_mach_fr450 450 350#define bfd_mach_frvtomcat 499 /* fr500 prototype. */ 351#define bfd_mach_fr500 500 352#define bfd_mach_fr550 550 353 bfd_arch_moxie, /* The moxie processor. */ 354#define bfd_mach_moxie 1 355 bfd_arch_ft32, /* The ft32 processor. */ 356#define bfd_mach_ft32 1 357#define bfd_mach_ft32b 2 358 bfd_arch_mcore, 359 bfd_arch_mep, 360#define bfd_mach_mep 1 361#define bfd_mach_mep_h1 0x6831 362#define bfd_mach_mep_c5 0x6335 363 bfd_arch_metag, 364#define bfd_mach_metag 1 365 bfd_arch_ia64, /* HP/Intel ia64. */ 366#define bfd_mach_ia64_elf64 64 367#define bfd_mach_ia64_elf32 32 368 bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ 369#define bfd_mach_ip2022 1 370#define bfd_mach_ip2022ext 2 371 bfd_arch_iq2000, /* Vitesse IQ2000. */ 372#define bfd_mach_iq2000 1 373#define bfd_mach_iq10 2 374 bfd_arch_bpf, /* Linux eBPF. */ 375#define bfd_mach_bpf 1 376#define bfd_mach_xbpf 2 377 bfd_arch_epiphany, /* Adapteva EPIPHANY. */ 378#define bfd_mach_epiphany16 1 379#define bfd_mach_epiphany32 2 380 bfd_arch_mt, 381#define bfd_mach_ms1 1 382#define bfd_mach_mrisc2 2 383#define bfd_mach_ms2 3 384 bfd_arch_pj, 385 bfd_arch_avr, /* Atmel AVR microcontrollers. */ 386#define bfd_mach_avr1 1 387#define bfd_mach_avr2 2 388#define bfd_mach_avr25 25 389#define bfd_mach_avr3 3 390#define bfd_mach_avr31 31 391#define bfd_mach_avr35 35 392#define bfd_mach_avr4 4 393#define bfd_mach_avr5 5 394#define bfd_mach_avr51 51 395#define bfd_mach_avr6 6 396#define bfd_mach_avrtiny 100 397#define bfd_mach_avrxmega1 101 398#define bfd_mach_avrxmega2 102 399#define bfd_mach_avrxmega3 103 400#define bfd_mach_avrxmega4 104 401#define bfd_mach_avrxmega5 105 402#define bfd_mach_avrxmega6 106 403#define bfd_mach_avrxmega7 107 404 bfd_arch_bfin, /* ADI Blackfin. */ 405#define bfd_mach_bfin 1 406 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ 407#define bfd_mach_cr16 1 408 bfd_arch_crx, /* National Semiconductor CRX. */ 409#define bfd_mach_crx 1 410 bfd_arch_cris, /* Axis CRIS. */ 411#define bfd_mach_cris_v0_v10 255 412#define bfd_mach_cris_v32 32 413#define bfd_mach_cris_v10_v32 1032 414 bfd_arch_riscv, 415#define bfd_mach_riscv32 132 416#define bfd_mach_riscv64 164 417 bfd_arch_rl78, 418#define bfd_mach_rl78 0x75 419 bfd_arch_rx, /* Renesas RX. */ 420#define bfd_mach_rx 0x75 421#define bfd_mach_rx_v2 0x76 422#define bfd_mach_rx_v3 0x77 423 bfd_arch_s390, /* IBM s390. */ 424#define bfd_mach_s390_31 31 425#define bfd_mach_s390_64 64 426 bfd_arch_score, /* Sunplus score. */ 427#define bfd_mach_score3 3 428#define bfd_mach_score7 7 429 bfd_arch_mmix, /* Donald Knuth's educational processor. */ 430 bfd_arch_xstormy16, 431#define bfd_mach_xstormy16 1 432 bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ 433#define bfd_mach_msp11 11 434#define bfd_mach_msp110 110 435#define bfd_mach_msp12 12 436#define bfd_mach_msp13 13 437#define bfd_mach_msp14 14 438#define bfd_mach_msp15 15 439#define bfd_mach_msp16 16 440#define bfd_mach_msp20 20 441#define bfd_mach_msp21 21 442#define bfd_mach_msp22 22 443#define bfd_mach_msp23 23 444#define bfd_mach_msp24 24 445#define bfd_mach_msp26 26 446#define bfd_mach_msp31 31 447#define bfd_mach_msp32 32 448#define bfd_mach_msp33 33 449#define bfd_mach_msp41 41 450#define bfd_mach_msp42 42 451#define bfd_mach_msp43 43 452#define bfd_mach_msp44 44 453#define bfd_mach_msp430x 45 454#define bfd_mach_msp46 46 455#define bfd_mach_msp47 47 456#define bfd_mach_msp54 54 457 bfd_arch_xgate, /* Freescale XGATE. */ 458#define bfd_mach_xgate 1 459 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ 460#define bfd_mach_xtensa 1 461 bfd_arch_z80, 462/* Zilog Z80 without undocumented opcodes. */ 463#define bfd_mach_z80strict 1 464/* Zilog Z180: successor with additional instructions, but without 465 halves of ix and iy. */ 466#define bfd_mach_z180 2 467/* Zilog Z80 with ixl, ixh, iyl, and iyh. */ 468#define bfd_mach_z80 3 469/* Zilog eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode. */ 470#define bfd_mach_ez80_z80 4 471/* Zilog eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode. */ 472#define bfd_mach_ez80_adl 5 473/* Z80N */ 474#define bfd_mach_z80n 6 475/* Zilog Z80 with all undocumented instructions. */ 476#define bfd_mach_z80full 7 477/* GameBoy Z80 (reduced instruction set). */ 478#define bfd_mach_gbz80 8 479/* ASCII R800: successor with multiplication. */ 480#define bfd_mach_r800 11 481 bfd_arch_lm32, /* Lattice Mico32. */ 482#define bfd_mach_lm32 1 483 bfd_arch_microblaze,/* Xilinx MicroBlaze. */ 484 bfd_arch_tilepro, /* Tilera TILEPro. */ 485 bfd_arch_tilegx, /* Tilera TILE-Gx. */ 486#define bfd_mach_tilepro 1 487#define bfd_mach_tilegx 1 488#define bfd_mach_tilegx32 2 489 bfd_arch_aarch64, /* AArch64. */ 490#define bfd_mach_aarch64 0 491#define bfd_mach_aarch64_8R 1 492#define bfd_mach_aarch64_ilp32 32 493 bfd_arch_nios2, /* Nios II. */ 494#define bfd_mach_nios2 0 495#define bfd_mach_nios2r1 1 496#define bfd_mach_nios2r2 2 497 bfd_arch_visium, /* Visium. */ 498#define bfd_mach_visium 1 499 bfd_arch_wasm32, /* WebAssembly. */ 500#define bfd_mach_wasm32 1 501 bfd_arch_pru, /* PRU. */ 502#define bfd_mach_pru 0 503 bfd_arch_nfp, /* Netronome Flow Processor */ 504#define bfd_mach_nfp3200 0x3200 505#define bfd_mach_nfp6000 0x6000 506 bfd_arch_csky, /* C-SKY. */ 507#define bfd_mach_ck_unknown 0 508#define bfd_mach_ck510 1 509#define bfd_mach_ck610 2 510#define bfd_mach_ck801 3 511#define bfd_mach_ck802 4 512#define bfd_mach_ck803 5 513#define bfd_mach_ck807 6 514#define bfd_mach_ck810 7 515#define bfd_mach_ck860 8 516 bfd_arch_loongarch, /* LoongArch */ 517#define bfd_mach_loongarch32 1 518#define bfd_mach_loongarch64 2 519 bfd_arch_amdgcn, /* AMDGCN */ 520#define bfd_mach_amdgcn_unknown 0x000 521#define bfd_mach_amdgcn_gfx900 0x02c 522#define bfd_mach_amdgcn_gfx904 0x02e 523#define bfd_mach_amdgcn_gfx906 0x02f 524#define bfd_mach_amdgcn_gfx908 0x030 525#define bfd_mach_amdgcn_gfx90a 0x03f 526#define bfd_mach_amdgcn_gfx1010 0x033 527#define bfd_mach_amdgcn_gfx1011 0x034 528#define bfd_mach_amdgcn_gfx1012 0x035 529#define bfd_mach_amdgcn_gfx1030 0x036 530#define bfd_mach_amdgcn_gfx1031 0x037 531#define bfd_mach_amdgcn_gfx1032 0x038 532 bfd_arch_last 533 @}; 534@end example 535 536@subsection bfd_arch_info 537 538 539@strong{Description}@* 540This structure contains information on architectures for use 541within BFD. 542@example 543 544typedef struct bfd_arch_info 545@{ 546 int bits_per_word; 547 int bits_per_address; 548 int bits_per_byte; 549 enum bfd_architecture arch; 550 unsigned long mach; 551 const char *arch_name; 552 const char *printable_name; 553 unsigned int section_align_power; 554 /* TRUE if this is the default machine for the architecture. 555 The default arch should be the first entry for an arch so that 556 all the entries for that arch can be accessed via @code{next}. */ 557 bool the_default; 558 const struct bfd_arch_info * (*compatible) (const struct bfd_arch_info *, 559 const struct bfd_arch_info *); 560 561 bool (*scan) (const struct bfd_arch_info *, const char *); 562 563 /* Allocate via bfd_malloc and return a fill buffer of size COUNT. If 564 IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is 565 TRUE, the buffer contains code. */ 566 void *(*fill) (bfd_size_type count, bool is_bigendian, bool code); 567 568 const struct bfd_arch_info *next; 569 570 /* On some architectures the offset for a relocation can point into 571 the middle of an instruction. This field specifies the maximum 572 offset such a relocation can have (in octets). This affects the 573 behaviour of the disassembler, since a value greater than zero 574 means that it may need to disassemble an instruction twice, once 575 to get its length and then a second time to display it. If the 576 value is negative then this has to be done for every single 577 instruction, regardless of the offset of the reloc. */ 578 signed int max_reloc_offset_into_insn; 579@} 580bfd_arch_info_type; 581 582@end example 583 584@findex bfd_printable_name 585@subsubsection @code{bfd_printable_name} 586@strong{Synopsis} 587@example 588const char *bfd_printable_name (bfd *abfd); 589@end example 590@strong{Description}@* 591Return a printable string representing the architecture and machine 592from the pointer to the architecture info structure. 593 594@findex bfd_scan_arch 595@subsubsection @code{bfd_scan_arch} 596@strong{Synopsis} 597@example 598const bfd_arch_info_type *bfd_scan_arch (const char *string); 599@end example 600@strong{Description}@* 601Figure out if BFD supports any cpu which could be described with 602the name @var{string}. Return a pointer to an @code{arch_info} 603structure if a machine is found, otherwise NULL. 604 605@findex bfd_arch_list 606@subsubsection @code{bfd_arch_list} 607@strong{Synopsis} 608@example 609const char **bfd_arch_list (void); 610@end example 611@strong{Description}@* 612Return a freshly malloced NULL-terminated vector of the names 613of all the valid BFD architectures. Do not modify the names. 614 615@findex bfd_arch_get_compatible 616@subsubsection @code{bfd_arch_get_compatible} 617@strong{Synopsis} 618@example 619const bfd_arch_info_type *bfd_arch_get_compatible 620 (const bfd *abfd, const bfd *bbfd, bool accept_unknowns); 621@end example 622@strong{Description}@* 623Determine whether two BFDs' architectures and machine types 624are compatible. Calculates the lowest common denominator 625between the two architectures and machine types implied by 626the BFDs and returns a pointer to an @code{arch_info} structure 627describing the compatible machine. 628 629@findex bfd_default_arch_struct 630@subsubsection @code{bfd_default_arch_struct} 631@strong{Description}@* 632The @code{bfd_default_arch_struct} is an item of 633@code{bfd_arch_info_type} which has been initialized to a fairly 634generic state. A BFD starts life by pointing to this 635structure, until the correct back end has determined the real 636architecture of the file. 637@example 638extern const bfd_arch_info_type bfd_default_arch_struct; 639@end example 640 641@findex bfd_set_arch_info 642@subsubsection @code{bfd_set_arch_info} 643@strong{Synopsis} 644@example 645void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); 646@end example 647@strong{Description}@* 648Set the architecture info of @var{abfd} to @var{arg}. 649 650@findex bfd_default_set_arch_mach 651@subsubsection @code{bfd_default_set_arch_mach} 652@strong{Synopsis} 653@example 654bool bfd_default_set_arch_mach 655 (bfd *abfd, enum bfd_architecture arch, unsigned long mach); 656@end example 657@strong{Description}@* 658Set the architecture and machine type in BFD @var{abfd} 659to @var{arch} and @var{mach}. Find the correct 660pointer to a structure and insert it into the @code{arch_info} 661pointer. 662 663@findex bfd_get_arch 664@subsubsection @code{bfd_get_arch} 665@strong{Synopsis} 666@example 667enum bfd_architecture bfd_get_arch (const bfd *abfd); 668@end example 669@strong{Description}@* 670Return the enumerated type which describes the BFD @var{abfd}'s 671architecture. 672 673@findex bfd_get_mach 674@subsubsection @code{bfd_get_mach} 675@strong{Synopsis} 676@example 677unsigned long bfd_get_mach (const bfd *abfd); 678@end example 679@strong{Description}@* 680Return the long type which describes the BFD @var{abfd}'s 681machine. 682 683@findex bfd_arch_bits_per_byte 684@subsubsection @code{bfd_arch_bits_per_byte} 685@strong{Synopsis} 686@example 687unsigned int bfd_arch_bits_per_byte (const bfd *abfd); 688@end example 689@strong{Description}@* 690Return the number of bits in one of the BFD @var{abfd}'s 691architecture's bytes. 692 693@findex bfd_arch_bits_per_address 694@subsubsection @code{bfd_arch_bits_per_address} 695@strong{Synopsis} 696@example 697unsigned int bfd_arch_bits_per_address (const bfd *abfd); 698@end example 699@strong{Description}@* 700Return the number of bits in one of the BFD @var{abfd}'s 701architecture's addresses. 702 703@findex bfd_default_compatible 704@subsubsection @code{bfd_default_compatible} 705@strong{Synopsis} 706@example 707const bfd_arch_info_type *bfd_default_compatible 708 (const bfd_arch_info_type *a, const bfd_arch_info_type *b); 709@end example 710@strong{Description}@* 711The default function for testing for compatibility. 712 713@findex bfd_default_scan 714@subsubsection @code{bfd_default_scan} 715@strong{Synopsis} 716@example 717bool bfd_default_scan 718 (const struct bfd_arch_info *info, const char *string); 719@end example 720@strong{Description}@* 721The default function for working out whether this is an 722architecture hit and a machine hit. 723 724@findex bfd_get_arch_info 725@subsubsection @code{bfd_get_arch_info} 726@strong{Synopsis} 727@example 728const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); 729@end example 730@strong{Description}@* 731Return the architecture info struct in @var{abfd}. 732 733@findex bfd_lookup_arch 734@subsubsection @code{bfd_lookup_arch} 735@strong{Synopsis} 736@example 737const bfd_arch_info_type *bfd_lookup_arch 738 (enum bfd_architecture arch, unsigned long machine); 739@end example 740@strong{Description}@* 741Look for the architecture info structure which matches the 742arguments @var{arch} and @var{machine}. A machine of 0 matches the 743machine/architecture structure which marks itself as the 744default. 745 746@findex bfd_printable_arch_mach 747@subsubsection @code{bfd_printable_arch_mach} 748@strong{Synopsis} 749@example 750const char *bfd_printable_arch_mach 751 (enum bfd_architecture arch, unsigned long machine); 752@end example 753@strong{Description}@* 754Return a printable string representing the architecture and 755machine type. 756 757This routine is depreciated. 758 759@findex bfd_octets_per_byte 760@subsubsection @code{bfd_octets_per_byte} 761@strong{Synopsis} 762@example 763unsigned int bfd_octets_per_byte (const bfd *abfd, 764 const asection *sec); 765@end example 766@strong{Description}@* 767Return the number of octets (8-bit quantities) per target byte 768(minimum addressable unit). In most cases, this will be one, but some 769DSP targets have 16, 32, or even 48 bits per byte. 770 771@findex bfd_arch_mach_octets_per_byte 772@subsubsection @code{bfd_arch_mach_octets_per_byte} 773@strong{Synopsis} 774@example 775unsigned int bfd_arch_mach_octets_per_byte 776 (enum bfd_architecture arch, unsigned long machine); 777@end example 778@strong{Description}@* 779See bfd_octets_per_byte. 780 781This routine is provided for those cases where a bfd * is not 782available 783 784@findex bfd_arch_default_fill 785@subsubsection @code{bfd_arch_default_fill} 786@strong{Synopsis} 787@example 788void *bfd_arch_default_fill (bfd_size_type count, 789 bool is_bigendian, 790 bool code); 791@end example 792@strong{Description}@* 793Allocate via bfd_malloc and return a fill buffer of size COUNT. 794If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If 795CODE is TRUE, the buffer contains code. 796 797