1193323Sed//===-- M68kISelLowering.h - M68k DAG Lowering Interface ----*- C++ -*-===// 2193323Sed// 3193323Sed// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4193323Sed// See https://llvm.org/LICENSE.txt for license information. 5193323Sed// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6193323Sed// 7193323Sed//===----------------------------------------------------------------------===// 8193323Sed/// 9193323Sed/// \file 10193323Sed/// This file defines the interfaces that M68k uses to lower LLVM code into a 11193323Sed/// selection DAG. 12193323Sed/// 13193323Sed//===----------------------------------------------------------------------===// 14193323Sed 15193323Sed#ifndef LLVM_LIB_TARGET_M68K_M68KISELLOWERING_H 16193323Sed#define LLVM_LIB_TARGET_M68K_M68KISELLOWERING_H 17193574Sed 18193323Sed#include "M68k.h" 19193323Sed 20193323Sed#include "llvm/CodeGen/CallingConvLower.h" 21198090Srdivacky#include "llvm/CodeGen/SelectionDAG.h" 22198090Srdivacky#include "llvm/CodeGen/TargetLowering.h" 23198090Srdivacky#include "llvm/IR/Function.h" 24198090Srdivacky 25198090Srdivacky#include <deque> 26193323Sed 27193323Sednamespace llvm { 28193323Sednamespace M68kISD { 29193323Sed 30193323Sed/// M68k Specific DAG nodes 31193323Sedenum NodeType { 32193323Sed /// Start the numbering from where ISD NodeType finishes. 33193323Sed FIRST_NUMBER = ISD::BUILTIN_OP_END, 34193323Sed 35193323Sed CALL, 36193323Sed RET, 37193323Sed TAIL_CALL, 38193323Sed TC_RETURN, 39193323Sed 40193323Sed /// M68k compare and logical compare instructions. Subtracts the source 41193323Sed /// operand from the destination data register and sets the condition 42193323Sed /// codes according to the result. Immediate always goes first. 43193323Sed CMP, 44193323Sed 45193323Sed /// M68k bit-test instructions. 46193323Sed BT, 47193323Sed 48193323Sed /// M68k Select 49193323Sed SELECT, 50198090Srdivacky 51198090Srdivacky /// M68k SetCC. Operand 0 is condition code, and operand 1 is the CCR 52198090Srdivacky /// operand, usually produced by a CMP instruction. 53198090Srdivacky SETCC, 54198090Srdivacky 55193323Sed // Same as SETCC except it's materialized with a subx and the value is all 56198090Srdivacky // one's or all zero's. 57198090Srdivacky SETCC_CARRY, // R = carry_bit ? ~0 : 0 58198090Srdivacky 59198090Srdivacky /// M68k conditional moves. Operand 0 and operand 1 are the two values 60198090Srdivacky /// to select from. Operand 2 is the condition code, and operand 3 is the 61198090Srdivacky /// flag operand produced by a CMP or TEST instruction. It also writes a 62198090Srdivacky /// flag result. 63198090Srdivacky CMOV, 64198090Srdivacky 65198090Srdivacky /// M68k conditional branches. Operand 0 is the chain operand, operand 1 66198090Srdivacky /// is the block to branch if condition is true, operand 2 is the 67193323Sed /// condition code, and operand 3 is the flag operand produced by a CMP 68193323Sed /// or TEST instruction. 69193323Sed BRCOND, 70198090Srdivacky 71198090Srdivacky // Arithmetic operations with CCR results. 72198090Srdivacky ADD, 73198090Srdivacky SUB, 74198090Srdivacky ADDX, 75198090Srdivacky SUBX, 76198090Srdivacky SMUL, 77198090Srdivacky UMUL, 78198090Srdivacky OR, 79198090Srdivacky XOR, 80198090Srdivacky AND, 81198090Srdivacky 82198090Srdivacky // GlobalBaseReg, 83198090Srdivacky GLOBAL_BASE_REG, 84198090Srdivacky 85198090Srdivacky /// A wrapper node for TargetConstantPool, 86198090Srdivacky /// TargetExternalSymbol, and TargetGlobalAddress. 87198090Srdivacky Wrapper, 88198090Srdivacky 89198090Srdivacky /// Special wrapper used under M68k PIC mode for PC 90198090Srdivacky /// relative displacements. 91198090Srdivacky WrapperPC, 92198090Srdivacky 93198090Srdivacky // For allocating variable amounts of stack space when using 94198090Srdivacky // segmented stacks. Check if the current stacklet has enough space, and 95198090Srdivacky // falls back to heap allocation if not. 96198090Srdivacky SEG_ALLOCA, 97198090Srdivacky}; 98198090Srdivacky} // namespace M68kISD 99198090Srdivacky 100198090Srdivacky/// Define some predicates that are used for node matching. 101198090Srdivackynamespace M68k { 102198090Srdivacky 103193323Sed/// Determines whether the callee is required to pop its 104193323Sed/// own arguments. Callee pop is necessary to support tail calls. 105193323Sedbool isCalleePop(CallingConv::ID CallingConv, bool IsVarArg, bool GuaranteeTCO); 106193323Sed 107193323Sed} // end namespace M68k 108193323Sed 109193323Sed//===--------------------------------------------------------------------===// 110193323Sed// TargetLowering Implementation 111193323Sed//===--------------------------------------------------------------------===// 112193323Sed 113193323Sedclass M68kMachineFunctionInfo; 114193323Sedclass M68kSubtarget; 115193323Sed 116193323Sedclass M68kTargetLowering : public TargetLowering { 117193323Sed const M68kSubtarget &Subtarget; 118193323Sed const M68kTargetMachine &TM; 119193323Sed 120193323Sedpublic: 121193323Sed explicit M68kTargetLowering(const M68kTargetMachine &TM, 122193323Sed const M68kSubtarget &STI); 123193323Sed 124193323Sed static const M68kTargetLowering *create(const M68kTargetMachine &TM, 125193323Sed const M68kSubtarget &STI); 126193323Sed 127193323Sed const char *getTargetNodeName(unsigned Opcode) const override; 128193323Sed 129198090Srdivacky /// Return the value type to use for ISD::SETCC. 130198090Srdivacky EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, 131198090Srdivacky EVT VT) const override; 132198090Srdivacky 133193323Sed /// EVT is not used in-tree, but is used by out-of-tree target. 134193323Sed virtual MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override; 135193323Sed 136193323Sed /// Provide custom lowering hooks for some operations. 137193323Sed SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 138193323Sed 139193323Sed /// Return the entry encoding for a jump table in the current function. 140193323Sed /// The returned value is a member of the MachineJumpTableInfo::JTEntryKind 141193323Sed /// enum. 142193323Sed unsigned getJumpTableEncoding() const override; 143193323Sed 144193323Sed const MCExpr *LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI, 145193323Sed const MachineBasicBlock *MBB, 146193323Sed unsigned uid, 147193323Sed MCContext &Ctx) const override; 148193323Sed 149193323Sed /// Returns relocation base for the given PIC jumptable. 150193323Sed SDValue getPICJumpTableRelocBase(SDValue Table, 151193323Sed SelectionDAG &DAG) const override; 152193323Sed 153198090Srdivacky /// This returns the relocation base for the given PIC jumptable, 154193323Sed /// the same as getPICJumpTableRelocBase, but as an MCExpr. 155193323Sed const MCExpr *getPICJumpTableRelocBaseExpr(const MachineFunction *MF, 156193323Sed unsigned JTI, 157193323Sed MCContext &Ctx) const override; 158193323Sed 159193323Sed ConstraintType getConstraintType(StringRef ConstraintStr) const override; 160193323Sed 161193323Sed std::pair<unsigned, const TargetRegisterClass *> 162193323Sed getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, 163198090Srdivacky StringRef Constraint, MVT VT) const override; 164193323Sed 165193323Sed // Lower operand with C_Immediate and C_Other constraint type 166193323Sed void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 167193323Sed std::vector<SDValue> &Ops, 168193323Sed SelectionDAG &DAG) const override; 169193323Sed 170193323Sed MachineBasicBlock * 171198396Srdivacky EmitInstrWithCustomInserter(MachineInstr &MI, 172198396Srdivacky MachineBasicBlock *MBB) const override; 173198396Srdivacky 174198396Srdivackyprivate: 175198396Srdivacky unsigned GetAlignedArgumentStackSize(unsigned StackSize, 176198396Srdivacky SelectionDAG &DAG) const; 177198396Srdivacky 178198396Srdivacky SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const; 179198396Srdivacky 180198396Srdivacky /// Emit a load of return address if tail call 181198396Srdivacky /// optimization is performed and it is required. 182198396Srdivacky SDValue EmitTailCallLoadRetAddr(SelectionDAG &DAG, SDValue &OutRetAddr, 183198396Srdivacky SDValue Chain, bool IsTailCall, int FPDiff, 184198396Srdivacky const SDLoc &DL) const; 185198396Srdivacky 186198396Srdivacky /// Emit a store of the return address if tail call 187198396Srdivacky /// optimization is performed and it is required (FPDiff!=0). 188198396Srdivacky SDValue EmitTailCallStoreRetAddr(SelectionDAG &DAG, MachineFunction &MF, 189198396Srdivacky SDValue Chain, SDValue RetAddrFrIdx, 190198396Srdivacky EVT PtrVT, unsigned SlotSize, int FPDiff, 191198396Srdivacky const SDLoc &DL) const; 192198396Srdivacky 193198396Srdivacky SDValue LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, 194198396Srdivacky const SmallVectorImpl<ISD::InputArg> &ArgInfo, 195198396Srdivacky const SDLoc &DL, SelectionDAG &DAG, 196198396Srdivacky const CCValAssign &VA, MachineFrameInfo &MFI, 197198396Srdivacky unsigned ArgIdx) const; 198198396Srdivacky 199198396Srdivacky SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, 200198396Srdivacky const SDLoc &DL, SelectionDAG &DAG, 201198396Srdivacky const CCValAssign &VA, ISD::ArgFlagsTy Flags) const; 202198396Srdivacky 203198396Srdivacky SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) const; 204198396Srdivacky SDValue LowerToBT(SDValue And, ISD::CondCode CC, const SDLoc &DL, 205198090Srdivacky SelectionDAG &DAG) const; 206198090Srdivacky SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; 207198090Srdivacky SDValue LowerSETCCCARRY(SDValue Op, SelectionDAG &DAG) const; 208198090Srdivacky SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; 209198090Srdivacky SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const; 210198090Srdivacky SDValue LowerADDC_ADDE_SUBC_SUBE(SDValue Op, SelectionDAG &DAG) const; 211198090Srdivacky SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 212198090Srdivacky SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 213198090Srdivacky SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const; 214198090Srdivacky SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 215198090Srdivacky SDValue LowerGlobalAddress(const GlobalValue *GV, const SDLoc &DL, 216198090Srdivacky int64_t Offset, SelectionDAG &DAG) const; 217198090Srdivacky SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 218193323Sed SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const; 219193323Sed SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const; 220198090Srdivacky 221198090Srdivacky SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 222198090Srdivacky CallingConv::ID CallConv, bool IsVarArg, 223193323Sed const SmallVectorImpl<ISD::InputArg> &Ins, 224193323Sed const SDLoc &DL, SelectionDAG &DAG, 225193323Sed SmallVectorImpl<SDValue> &InVals) const; 226193323Sed 227198090Srdivacky /// LowerFormalArguments - transform physical registers into virtual 228198090Srdivacky /// registers and generate load operations for arguments places on the stack. 229198090Srdivacky SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CCID, 230198090Srdivacky bool IsVarArg, 231198090Srdivacky const SmallVectorImpl<ISD::InputArg> &Ins, 232198090Srdivacky const SDLoc &DL, SelectionDAG &DAG, 233198090Srdivacky SmallVectorImpl<SDValue> &InVals) const override; 234198090Srdivacky 235198090Srdivacky SDValue LowerCall(CallLoweringInfo &CLI, 236193323Sed SmallVectorImpl<SDValue> &InVals) const override; 237198090Srdivacky 238198090Srdivacky /// Lower the result values of a call into the 239193323Sed /// appropriate copies out of appropriate physical registers. 240193323Sed SDValue LowerReturn(SDValue Chain, CallingConv::ID CCID, bool IsVarArg, 241193323Sed const SmallVectorImpl<ISD::OutputArg> &Outs, 242193323Sed const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, 243193323Sed SelectionDAG &DAG) const override; 244193323Sed 245198090Srdivacky bool decomposeMulByConstant(LLVMContext &Context, EVT VT, 246193323Sed SDValue C) const override; 247193323Sed 248198090Srdivacky MachineBasicBlock *EmitLoweredSelect(MachineInstr &I, 249198090Srdivacky MachineBasicBlock *MBB) const; 250198090Srdivacky MachineBasicBlock *EmitLoweredSegAlloca(MachineInstr &MI, 251198090Srdivacky MachineBasicBlock *BB) const; 252198090Srdivacky 253198090Srdivacky /// Emit nodes that will be selected as "test Op0,Op0", or something 254198090Srdivacky /// equivalent, for use with the given M68k condition code. 255198090Srdivacky SDValue EmitTest(SDValue Op0, unsigned M68kCC, const SDLoc &dl, 256193323Sed SelectionDAG &DAG) const; 257198090Srdivacky 258198090Srdivacky /// Emit nodes that will be selected as "cmp Op0,Op1", or something 259198090Srdivacky /// equivalent, for use with the given M68k condition code. 260198090Srdivacky SDValue EmitCmp(SDValue Op0, SDValue Op1, unsigned M68kCC, const SDLoc &dl, 261198090Srdivacky SelectionDAG &DAG) const; 262198090Srdivacky 263193323Sed /// Check whether the call is eligible for tail call optimization. Targets 264198090Srdivacky /// that want to do tail call optimization should implement this function. 265198090Srdivacky bool IsEligibleForTailCallOptimization( 266198090Srdivacky SDValue Callee, CallingConv::ID CalleeCC, bool IsVarArg, 267193323Sed bool IsCalleeStructRet, bool IsCallerStructRet, Type *RetTy, 268198090Srdivacky const SmallVectorImpl<ISD::OutputArg> &Outs, 269198090Srdivacky const SmallVectorImpl<SDValue> &OutVals, 270198090Srdivacky const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const; 271198090Srdivacky 272198090Srdivacky SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 273198090Srdivacky}; 274198090Srdivacky} // namespace llvm 275198090Srdivacky 276198090Srdivacky#endif // M68kISELLOWERING_H 277193323Sed