1/*	$NetBSD: atomic_add.S,v 1.7 2020/08/06 10:00:21 skrll Exp $	*/
2
3/*-
4 * Copyright (c) 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <machine/asm.h>
30#include "atomic_op_asm.h"
31
32RCSID("$NetBSD: atomic_add.S,v 1.7 2020/08/06 10:00:21 skrll Exp $")
33
34	.text
35	.set	noreorder
36#ifdef _KERNEL_OPT
37#include "opt_cputype.h"
38#ifndef MIPS3_LOONGSON2F
39	.set	noat
40	.set	nomacro
41#endif
42#else /* _KERNEL_OPT */
43	.set	noat
44	.set	nomacro
45#endif /* _KERNEL_OPT */
46
47
48LEAF(_atomic_add_32)
49#if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2)
50	saa		a1, (a0)
51#else
52	LLSCSYNC
531:	INT_LL		t0, 0(a0)
54	 nop
55	INT_ADDU	t0, a1
56	INT_SC		t0, 0(a0)
57	beq		t0, zero, 1b
58 	 nop
59#endif
60	j		ra
61	 nop
62END(_atomic_add_32)
63ATOMIC_OP_ALIAS(atomic_add_32, _atomic_add_32)
64
65LEAF(_atomic_add_32_nv)
66	LLSCSYNC
671:	INT_LL		v0, 0(a0)
68	 nop
69	INT_ADDU	v0, a1
70	move		t0, v0
71	INT_SC		t0, 0(a0)
72	beq		t0, zero, 1b
73 	 nop
74	j		ra
75	 nop
76END(_atomic_add_32_nv)
77ATOMIC_OP_ALIAS(atomic_add_32_nv, _atomic_add_32_nv)
78
79#if !defined(__mips_o32)
80LEAF(_atomic_add_64)
81#if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2)
82	saad		a1, (a0)
83#else
84	LLSCSYNC
851:	REG_LL		t0, 0(a0)
86	 nop
87	REG_ADDU	t0, a1
88	REG_SC		t0, 0(a0)
89	beq		t0, zero, 1b
90 	 nop
91#endif
92	j		ra
93	 nop
94END(_atomic_add_64)
95ATOMIC_OP_ALIAS(atomic_add_64, _atomic_add_64)
96
97LEAF(_atomic_add_64_nv)
98	LLSCSYNC
991:	REG_LL		v0, 0(a0)
100	 nop
101	REG_ADDU	v0, a1
102	move		t0, v0
103	REG_SC		t0, 0(a0)
104	beq		t0, zero, 1b
105 	 nop
106	j		ra
107	 nop
108END(_atomic_add_64_nv)
109ATOMIC_OP_ALIAS(atomic_add_64_nv, _atomic_add_64_nv)
110#endif
111
112#ifdef _LP64
113STRONG_ALIAS(_atomic_add_long,		_atomic_add_64)
114STRONG_ALIAS(_atomic_add_long_nv,	_atomic_add_64_nv)
115STRONG_ALIAS(_atomic_add_ptr,		_atomic_add_64)
116STRONG_ALIAS(_atomic_add_ptr_nv,	_atomic_add_64_nv)
117#else
118STRONG_ALIAS(_atomic_add_long,		_atomic_add_32)
119STRONG_ALIAS(_atomic_add_long_nv,	_atomic_add_32_nv)
120STRONG_ALIAS(_atomic_add_ptr,		_atomic_add_32)
121STRONG_ALIAS(_atomic_add_ptr_nv,	_atomic_add_32_nv)
122#endif
123STRONG_ALIAS(_atomic_add_int,		_atomic_add_32)
124STRONG_ALIAS(_atomic_add_int_nv,	_atomic_add_32_nv)
125
126ATOMIC_OP_ALIAS(atomic_add_int,		_atomic_add_int)
127ATOMIC_OP_ALIAS(atomic_add_int_nv,	_atomic_add_int_nv)
128ATOMIC_OP_ALIAS(atomic_add_ptr,		_atomic_add_ptr)
129ATOMIC_OP_ALIAS(atomic_add_ptr_nv,	_atomic_add_ptr_nv)
130ATOMIC_OP_ALIAS(atomic_add_long,	_atomic_add_long)
131ATOMIC_OP_ALIAS(atomic_add_long_nv,	_atomic_add_long_nv)
132