1237263Snp/****************************************************************************
2292736Snp * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
3237263Snp *
4237263Snp * All Rights Reserved.
5237263Snp *
6237263Snp * Permission is hereby granted, free of charge, to any person obtaining
7237263Snp * a copy of this software and associated documentation files (the
8237263Snp * "Software"), to deal in the Software without restriction, including
9237263Snp * without limitation on the rights to use, copy, modify, merge,
10237263Snp * publish, distribute, sublicense, and/or sell copies of the Software,
11237263Snp * and to permit persons to whom the Software is furnished to do so,
12237263Snp * subject to the following conditions:
13237263Snp *
14237263Snp * The above copyright notice and this permission notice (including the
15237263Snp * next paragraph) shall be included in all copies or substantial
16237263Snp * portions of the Software.
17237263Snp *
18237263Snp * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19237263Snp * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20237263Snp * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21237263Snp * NON-INFRINGEMENT.  IN NO EVENT SHALL XGI AND/OR
22237263Snp * ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23237263Snp * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24237263Snp * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25237263Snp * DEALINGS IN THE SOFTWARE.
26237263Snp ***************************************************************************/
27237263Snp
28237263Snp#ifndef _XGI_DRM_H_
29237263Snp#define _XGI_DRM_H_
30237263Snp
31237263Snp#include <linux/types.h>
32237263Snp#include <asm/ioctl.h>
33276729Snp
34345664Sjhbstruct drm_xgi_sarea {
35237263Snp	__u16 device_id;
36237263Snp	__u16 vendor_id;
37237263Snp
38237263Snp	char device_name[32];
39237263Snp
40237263Snp	unsigned int scrn_start;
41237263Snp	unsigned int scrn_xres;
42237263Snp	unsigned int scrn_yres;
43237263Snp	unsigned int scrn_bpp;
44237263Snp	unsigned int scrn_pitch;
45237263Snp};
46237263Snp
47237263Snp
48237263Snpstruct xgi_bootstrap {
49237263Snp	/**
50239344Snp	 * Size of PCI-e GART range in megabytes.
51239344Snp	 */
52239344Snp	struct drm_map gart;
53239344Snp};
54239344Snp
55309555Sjhb
56309555Sjhbenum xgi_mem_location {
57309555Sjhb	XGI_MEMLOC_NON_LOCAL = 0,
58237263Snp	XGI_MEMLOC_LOCAL = 1,
59237263Snp	XGI_MEMLOC_INVALID = 0x7fffffff
60239514Snp};
61239514Snp
62239514Snpstruct xgi_mem_alloc {
63239514Snp	/**
64239514Snp	 * Memory region to be used for allocation.
65239514Snp	 *
66239514Snp	 * Must be one of XGI_MEMLOC_NON_LOCAL or XGI_MEMLOC_LOCAL.
67239514Snp	 */
68239514Snp	unsigned int location;
69346970Snp
70346970Snp	/**
71237263Snp	 * Number of bytes request.
72237263Snp	 *
73239344Snp	 * On successful allocation, set to the actual number of bytes
74239344Snp	 * allocated.
75239344Snp	 */
76239344Snp	unsigned int size;
77239344Snp
78239344Snp	/**
79299210Sjhb	 * Address of the memory from the graphics hardware's point of view.
80299210Sjhb	 */
81239344Snp	__u32 hw_addr;
82239344Snp
83345664Sjhb	/**
84346805Snp	 * Offset of the allocation in the mapping.
85345664Sjhb	 */
86237263Snp	__u32 offset;
87237263Snp
88237263Snp	/**
89345664Sjhb	 * Magic handle used to release memory.
90237263Snp	 *
91237263Snp	 * See also DRM_XGI_FREE ioctl.
92309555Sjhb	 */
93309555Sjhb	__u32 index;
94309555Sjhb};
95309555Sjhb
96309555Sjhbenum xgi_batch_type {
97309555Sjhb	BTYPE_2D = 0,
98309555Sjhb	BTYPE_3D = 1,
99309555Sjhb	BTYPE_FLIP = 2,
100309555Sjhb	BTYPE_CTRL = 3,
101309555Sjhb	BTYPE_NONE = 0x7fffffff
102309555Sjhb};
103309555Sjhb
104309555Sjhbstruct xgi_cmd_info {
105309555Sjhb	__u32 type;
106309555Sjhb	__u32 hw_addr;
107309555Sjhb	__u32 size;
108309555Sjhb	__u32 id;
109299210Sjhb};
110299210Sjhb
111299210Sjhbstruct xgi_state_info {
112299210Sjhb	unsigned int _fromState;
113299210Sjhb	unsigned int _toState;
114299210Sjhb};
115239344Snp
116309555Sjhb
117299210Sjhb/*
118323884Sjhb * Ioctl definitions
119299210Sjhb */
120239344Snp
121239344Snp#define DRM_XGI_BOOTSTRAP           0
122299210Sjhb#define DRM_XGI_ALLOC               1
123299210Sjhb#define DRM_XGI_FREE                2
124299210Sjhb#define DRM_XGI_SUBMIT_CMDLIST      3
125299210Sjhb#define DRM_XGI_STATE_CHANGE        4
126299210Sjhb#define DRM_XGI_SET_FENCE           5
127306661Sjhb#define DRM_XGI_WAIT_FENCE          6
128306661Sjhb
129345664Sjhb#define XGI_IOCTL_BOOTSTRAP         DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_BOOTSTRAP, struct xgi_bootstrap)
130345664Sjhb#define XGI_IOCTL_ALLOC             DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_ALLOC, struct xgi_mem_alloc)
131345664Sjhb#define XGI_IOCTL_FREE              DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_FREE, __u32)
132299210Sjhb#define XGI_IOCTL_SUBMIT_CMDLIST    DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_SUBMIT_CMDLIST, struct xgi_cmd_info)
133299210Sjhb#define XGI_IOCTL_STATE_CHANGE      DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_STATE_CHANGE, struct xgi_state_info)
134299210Sjhb#define XGI_IOCTL_SET_FENCE         DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_SET_FENCE, u32)
135299210Sjhb#define XGI_IOCTL_WAIT_FENCE        DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_WAIT_FENCE, u32)
136299210Sjhb
137299210Sjhb#endif /* _XGI_DRM_H_ */
138299210Sjhb