1/*	$NetBSD: pci_usrreq.c,v 1.23 2011/02/10 12:37:58 jmcneill Exp $	*/
2
3/*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed for the NetBSD Project by
20 *	Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 *    or promote products derived from this software without specific prior
23 *    written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38/*
39 * User -> kernel interface for PCI bus access.
40 */
41
42#include <sys/cdefs.h>
43__KERNEL_RCSID(0, "$NetBSD: pci_usrreq.c,v 1.23 2011/02/10 12:37:58 jmcneill Exp $");
44
45#include <sys/param.h>
46#include <sys/conf.h>
47#include <sys/device.h>
48#include <sys/ioctl.h>
49#include <sys/proc.h>
50#include <sys/systm.h>
51#include <sys/errno.h>
52#include <sys/fcntl.h>
53#include <sys/kauth.h>
54
55#include <dev/pci/pcireg.h>
56#include <dev/pci/pcivar.h>
57#include <dev/pci/pciio.h>
58
59#include "opt_pci.h"
60
61static int
62pciopen(dev_t dev, int flags, int mode, struct lwp *l)
63{
64	device_t dv;
65
66	dv = device_lookup(&pci_cd, minor(dev));
67	if (dv == NULL)
68		return ENXIO;
69
70	return 0;
71}
72
73static int
74pciioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
75{
76	struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev));
77	struct pciio_bdf_cfgreg *bdfr;
78	struct pciio_businfo *binfo;
79	pcitag_t tag;
80
81	switch (cmd) {
82	case PCI_IOC_BDF_CFGREAD:
83	case PCI_IOC_BDF_CFGWRITE:
84		bdfr = data;
85		if (bdfr->bus > 255 || bdfr->device >= sc->sc_maxndevs ||
86		    bdfr->function > 7 || ISSET(bdfr->cfgreg.reg, 3))
87			return EINVAL;
88		tag = pci_make_tag(sc->sc_pc, bdfr->bus, bdfr->device,
89		    bdfr->function);
90
91		if (cmd == PCI_IOC_BDF_CFGREAD) {
92			bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag,
93			    bdfr->cfgreg.reg);
94		} else {
95			if ((flag & FWRITE) == 0)
96				return EBADF;
97			pci_conf_write(sc->sc_pc, tag, bdfr->cfgreg.reg,
98			    bdfr->cfgreg.val);
99		}
100		return 0;
101
102	case PCI_IOC_BUSINFO:
103		binfo = data;
104		binfo->busno = sc->sc_bus;
105		binfo->maxdevs = sc->sc_maxndevs;
106		return 0;
107
108	default:
109		return ENOTTY;
110	}
111}
112
113static paddr_t
114pcimmap(dev_t dev, off_t offset, int prot)
115{
116	struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev));
117	struct pci_child *c;
118	struct pci_range *r;
119	int flags = 0;
120	int device, range;
121
122	if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER,
123	    NULL) != 0) {
124		return -1;
125	}
126	/*
127	 * Since we allow mapping of the entire bus, we
128	 * take the offset to be the address on the bus,
129	 * and pass 0 as the offset into that range.
130	 *
131	 * XXX Need a way to deal with linear/etc.
132	 *
133	 * XXX we rely on MD mmap() methods to enforce limits since these
134	 * are hidden in *_tag_t structs if they exist at all
135	 */
136
137#ifdef PCI_MAGIC_IO_RANGE
138	/*
139	 * first, check if someone's trying to map the IO range
140	 * XXX this assumes 64kB IO space even though some machines can have
141	 * significantly more than that - macppc's bandit host bridge allows
142	 * 8MB IO space and sparc64 may have the entire 4GB available. The
143	 * firmware on both tries to use the lower 64kB first though and
144	 * exausting it is pretty difficult so we should be safe
145	 */
146	if ((offset >= PCI_MAGIC_IO_RANGE) &&
147	    (offset < (PCI_MAGIC_IO_RANGE + 0x10000))) {
148		return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE,
149		    0, prot, 0);
150	}
151#endif /* PCI_MAGIC_IO_RANGE */
152
153	for (device = 0; device < __arraycount(sc->sc_devices); device++) {
154		c = &sc->sc_devices[device];
155		if (c->c_dev == NULL)
156			continue;
157		for (range = 0; range < __arraycount(c->c_range); range++) {
158			r = &c->c_range[range];
159			if (r->r_size == 0)
160				break;
161			if (offset >= r->r_offset &&
162			    offset < r->r_offset + r->r_size) {
163				flags = r->r_flags;
164				break;
165			}
166		}
167	}
168
169	return bus_space_mmap(sc->sc_memt, offset, 0, prot, flags);
170}
171
172const struct cdevsw pci_cdevsw = {
173	pciopen, nullclose, noread, nowrite, pciioctl,
174	nostop, notty, nopoll, pcimmap, nokqfilter, D_OTHER,
175};
176
177/*
178 * pci_devioctl:
179 *
180 *	PCI ioctls that can be performed on devices directly.
181 */
182int
183pci_devioctl(pci_chipset_tag_t pc, pcitag_t tag, u_long cmd, void *data,
184    int flag, struct lwp *l)
185{
186	struct pciio_cfgreg *r = (void *) data;
187
188	switch (cmd) {
189	case PCI_IOC_CFGREAD:
190		r->val = pci_conf_read(pc, tag, r->reg);
191		break;
192
193	case PCI_IOC_CFGWRITE:
194		if ((flag & FWRITE) == 0)
195			return EBADF;
196		pci_conf_write(pc, tag, r->reg, r->val);
197		break;
198
199	default:
200		return EPASSTHROUGH;
201	}
202
203	return 0;
204}
205