1/*	$NetBSD$	*/
2
3/*-
4 * Copyright (c) 2005, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by TAMURA Kent
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/types.h>
33#include <sys/audioio.h>
34
35/* ----------------------------------------------------------------
36 * High Definition Audio constant values
37 * ---------------------------------------------------------------- */
38
39/* High Definition Audio registers */
40#define HDA_GCAP	0x000	/* 2 */
41#define		HDA_GCAP_OSS(x)	((x & 0xf000) >> 12)
42#define		HDA_GCAP_ISS(x)	((x & 0x0f00) >> 8)
43#define		HDA_GCAP_BSS(x)	((x & 0x00f8) >> 3)
44#define		HDA_GCAP_NSDO_MASK	0x0006
45#define		HDA_GCAP_NSDO_1		0x0000
46#define		HDA_GCAP_NSDO_2		0x0002
47#define		HDA_GCAP_NSDO_4		0x0004
48#define		HDA_GCAP_NSDO_RESERVED	0x0006
49#define		HDA_GCAP_64OK	0x0001
50#define HDA_VMIN	0x002	/* 1 */
51#define HDA_VMAJ	0x003	/* 1 */
52#define HDA_OUTPAY	0x004	/* 2 */
53#define HDA_INPAY	0x006	/* 2 */
54#define HDA_GCTL	0x008	/* 4 */
55#define		HDA_GCTL_UNSOL	0x00000100
56#define		HDA_GCTL_FCNTRL	0x00000002
57#define		HDA_GCTL_CRST	0x00000001
58#define HDA_WAKEEN	0x00c	/* 2 */
59#define		HDA_WAKEEN_SDIWEN	0x7fff
60#define HDA_STATESTS	0x00e	/* 2 */
61#define		HDA_STATESTS_SDIWAKE	0x7fff
62#define HDA_GSTS	0x010	/* 2 */
63#define		HDA_GSTS_FSTS		0x0002
64#define HDA_OUTSTRMPAY	0x018	/* 2 */
65#define HDA_INSTRMPAY	0x01a	/* 2 */
66#define HDA_INTCTL	0x020	/* 4 */
67#define		HDA_INTCTL_GIE	0x80000000
68#define		HDA_INTCTL_CIE	0x40000000
69#define		HDA_INTCTL_SIE	0x3fffffff
70#define HDA_INTSTS	0x024	/* 4 */
71#define		HDA_INTSTS_GIS	0x80000000
72#define		HDA_INTSTS_CIS	0x40000000
73#define		HDA_INTSTS_SIS	0x3fffffff
74#define HDA_WALCLK	0x030	/* 4 */
75#define HDA_SSYNC	0x034	/* 4 */
76#define		HDA_SSYNC_SSYNC	0x3fffffff
77#define HDA_CORBLBASE	0x040	/* 4 */
78#define HDA_CORBUBASE	0x044	/* 4 */
79#define HDA_CORBWP	0x048	/* 2 */
80#define		HDA_CORBWP_CORBWP	0x00ff
81#define HDA_CORBRP	0x04a	/* 2 */
82#define		HDA_CORBRP_CORBRPRST	0x8000
83#define		HDA_CORBRP_CORBRP	0x00ff
84#define HDA_CORBCTL	0x04c	/* 1 */
85#define		HDA_CORBCTL_CORBRUN	0x02
86#define		HDA_CORBCTL_CMEIE	0x01
87#define HDA_CORBSTS	0x04d	/* 1 */
88#define		HDA_CORBSTS_CMEI	0x01
89#define HDA_CORBSIZE	0x04e	/* 1 */
90#define		HDA_CORBSIZE_CORBSZCAP_MASK	0xf0
91#define		HDA_CORBSIZE_CORBSZCAP_2	0x10
92#define		HDA_CORBSIZE_CORBSZCAP_16	0x20
93#define		HDA_CORBSIZE_CORBSZCAP_256	0x40
94#define		HDA_CORBSIZE_CORBSIZE_MASK	0x03
95#define		HDA_CORBSIZE_CORBSIZE_2		0x00
96#define		HDA_CORBSIZE_CORBSIZE_16	0x01
97#define		HDA_CORBSIZE_CORBSIZE_256	0x02
98#define HDA_RIRBLBASE	0x050	/* 4 */
99#define HDA_RIRBUBASE	0x054	/* 4 */
100#define HDA_RIRBWP	0x058	/* 2 */
101#define		HDA_RIRBWP_RIRBWPRST	0x8000
102#define		HDA_RIRBWP_RIRBWP	0x00ff
103#define HDA_RINTCNT	0x05a	/* 2 */
104#define		HDA_RINTCNT_RINTCNT	0x00ff
105#define HDA_RIRBCTL	0x05c	/* 1 */
106#define		HDA_RIRBCTL_RIRBOIC	0x04
107#define		HDA_RIRBCTL_RIRBDMAEN	0x02
108#define		HDA_RIRBCTL_RINTCTL	0x01
109#define HDA_RIRBSTS	0x05d	/* 1 */
110#define		HDA_RIRBSTS_RIRBOIS	0x04
111#define		HDA_RIRBSTS_RINTFL	0x01
112#define HDA_RIRBSIZE	0x05e	/* 1 */
113#define		HDA_RIRBSIZE_RIRBSZCAP_MASK	0xf0
114#define		HDA_RIRBSIZE_RIRBSZCAP_2	0x10
115#define		HDA_RIRBSIZE_RIRBSZCAP_16	0x20
116#define		HDA_RIRBSIZE_RIRBSZCAP_256	0x40
117#define		HDA_RIRBSIZE_RIRBSIZE_MASK	0x03
118#define		HDA_RIRBSIZE_RIRBSIZE_2		0x00
119#define		HDA_RIRBSIZE_RIRBSIZE_16	0x01
120#define		HDA_RIRBSIZE_RIRBSIZE_256	0x02
121#define HDA_IC		0x060	/* 4 */
122#define HDA_IR		0x064	/* 4 */
123#define HDA_IRS		0x068	/* 2 */
124#define		HDA_IRS_IRRADD		0x00f0
125#define		HDA_IRS_IRRUNSOL	0x0008
126#define		HDA_IRS_IRV		0x0002
127#define		HDA_IRS_ICB		0x0001
128#define HDA_DPLBASE	0x070	/* 4 */
129#define		HDA_DPLBASE_DPLBASE	0xffffff80
130#define		HDA_DPLBASE_ENABLE	0x00000001
131#define HDA_DPUBASE	0x074
132
133#define HDA_SD_BASE	0x080
134#define		HDA_SD_CTL	0x00 /* 2 */
135#define			HDA_SD_CTL_DEIE	0x0010
136#define			HDA_SD_CTL_FEIE	0x0008
137#define			HDA_SD_CTL_IOCE	0x0004
138#define			HDA_SD_CTL_RUN	0x0002
139#define			HDA_SD_CTL_SRST	0x0001
140#define		HDA_SD_CTL2	0x02 /* 1 */
141#define			HDA_SD_CTL2_STRM	0xf0
142#define			HDA_SD_CTL2_STRM_SHIFT	4
143#define			HDA_SD_CTL2_DIR		0x08
144#define			HDA_SD_CTL2_TP		0x04
145#define			HDA_SD_CTL2_STRIPE	0x03
146#define		HDA_SD_STS	0x03 /* 1 */
147#define			HDA_SD_STS_FIFORDY	0x20
148#define			HDA_SD_STS_DESE		0x10
149#define			HDA_SD_STS_FIFOE	0x08
150#define			HDA_SD_STS_BCIS		0x04
151#define		HDA_SD_LPIB	0x04 /* 4 */
152#define		HDA_SD_CBL	0x08 /* 4 */
153#define		HDA_SD_LVI	0x0c /* 2 */
154#define			HDA_SD_LVI_LVI	0x00ff
155#define		HDA_SD_FIFOW	0x0e /* 2 */
156#define		HDA_SD_FIFOS	0x10 /* 2 */
157#define		HDA_SD_FMT	0x12 /* 2 */
158#define			HDA_SD_FMT_BASE	0x4000
159#define			HDA_SD_FMT_BASE_48	0x0000
160#define			HDA_SD_FMT_BASE_44	0x4000
161#define			HDA_SD_FMT_MULT	0x3800
162#define			HDA_SD_FMT_MULT_X1	0x0000
163#define			HDA_SD_FMT_MULT_X2	0x0800
164#define			HDA_SD_FMT_MULT_X3	0x1000
165#define			HDA_SD_FMT_MULT_X4	0x1800
166#define			HDA_SD_FMT_DIV	0x0700
167#define			HDA_SD_FMT_DIV_BY1	0x0000
168#define			HDA_SD_FMT_DIV_BY2	0x0100
169#define			HDA_SD_FMT_DIV_BY3	0x0200
170#define			HDA_SD_FMT_DIV_BY4	0x0300
171#define			HDA_SD_FMT_DIV_BY5	0x0400
172#define			HDA_SD_FMT_DIV_BY6	0x0500
173#define			HDA_SD_FMT_DIV_BY7	0x0600
174#define			HDA_SD_FMT_DIV_BY8	0x0700
175#define			HDA_SD_FMT_BITS	0x0070
176#define			HDA_SD_FMT_BITS_8_16	0x0000
177#define			HDA_SD_FMT_BITS_16_16	0x0010
178#define			HDA_SD_FMT_BITS_20_32	0x0020
179#define			HDA_SD_FMT_BITS_24_32	0x0030
180#define			HDA_SD_FMT_BITS_32_32	0x0040
181#define			HDA_SD_FMT_CHAN	0x000f
182#define		HDA_SD_BDPL	0x18 /* 4 */
183#define		HDA_SD_BDPU	0x1c /* 4 */
184#define		HDA_SD_SIZE	0x20
185
186/* CORB commands */
187#define CORB_GET_PARAMETER		0xf00
188#define		COP_VENDOR_ID			0x00
189#define			COP_VID_VENDOR(x)	(x >> 16)
190#define			COP_VID_DEVICE(x)	(x & 0xffff)
191#define		COP_REVISION_ID			0x02
192#define			COP_RID_MAJ(x)		((x >> 20) & 0x0f)
193#define			COP_RID_MIN(x)		((x >> 16) & 0x0f)
194#define			COP_RID_REVISION(x)	((x >> 8) & 0xff)
195#define			COP_RID_STEPPING(x)	(x & 0xff)
196#define		COP_SUBORDINATE_NODE_COUNT	0x04
197#define			COP_START_NID(x)	((x & 0x00ff0000) >> 16)
198#define			COP_NSUBNODES(x)	(x & 0x000000ff)
199#define		COP_FUNCTION_GROUP_TYPE		0x05
200#define			COP_FTYPE(x)		(x & 0x000000ff)
201#define			COP_FTYPE_RESERVED	0x01
202#define			COP_FTYPE_AUDIO		0x01
203#define			COP_FTYPE_MODEM		0x02
204#define		COP_AUDIO_FUNCTION_GROUP_CAPABILITY	0x08
205#define		COP_AUDIO_WIDGET_CAP	0x09
206#define			COP_AWCAP_TYPE(x)	((x >> 20) & 0xf)
207#define			COP_AWTYPE_AUDIO_OUTPUT		0x0
208#define			COP_AWTYPE_AUDIO_INPUT		0x1
209#define			COP_AWTYPE_AUDIO_MIXER		0x2
210#define			COP_AWTYPE_AUDIO_SELECTOR	0x3
211#define			COP_AWTYPE_PIN_COMPLEX		0x4
212#define			COP_AWTYPE_POWER		0x5
213#define			COP_AWTYPE_VOLUME_KNOB		0x6
214#define			COP_AWTYPE_BEEP_GENERATOR	0x7
215#define			COP_AWTYPE_VENDOR_DEFINED	0xf
216#define			COP_AWCAP_STEREO	0x001
217#define			COP_AWCAP_INAMP		0x002
218#define			COP_AWCAP_OUTAMP	0x004
219#define			COP_AWCAP_AMPOV		0x008
220#define			COP_AWCAP_FORMATOV	0x010
221#define			COP_AWCAP_STRIPE	0x020
222#define			COP_AWCAP_PROC		0x040
223#define			COP_AWCAP_UNSOL		0x080
224#define			COP_AWCAP_CONNLIST	0x100
225#define			COP_AWCAP_DIGITAL	0x200
226#define			COP_AWCAP_POWER		0x400
227#define			COP_AWCAP_LRSWAP	0x800
228#define			COP_AWCAP_DELAY(x)	((x >> 16) & 0xf)
229#define		COP_PCM				0x0a
230#define			COP_PCM_B32	0x00100000
231#define			COP_PCM_B24	0x00080000
232#define			COP_PCM_B20	0x00040000
233#define			COP_PCM_B16	0x00020000
234#define			COP_PCM_B8	0x00010000
235#define			COP_PCM_R3840	0x00000800
236#define			COP_PCM_R1920	0x00000400
237#define			COP_PCM_R1764	0x00000200
238#define			COP_PCM_R960	0x00000100
239#define			COP_PCM_R882	0x00000080
240#define			COP_PCM_R480	0x00000040
241#define			COP_PCM_R441	0x00000020
242#define			COP_PCM_R320	0x00000010
243#define			COP_PCM_R220	0x00000008
244#define			COP_PCM_R160	0x00000004
245#define			COP_PCM_R110	0x00000002
246#define			COP_PCM_R80	0x00000001
247#define		COP_STREAM_FORMATS		0x0b
248#define			COP_STREAM_FORMAT_PCM		0x00000001
249#define			COP_STREAM_FORMAT_FLOAT32	0x00000002
250#define			COP_STREAM_FORMAT_AC3		0x00000003
251#define		COP_PINCAP		0x0c
252#define			COP_PINCAP_IMPEDANCE	0x00000001
253#define			COP_PINCAP_TRIGGER	0x00000002
254#define			COP_PINCAP_PRESENCE	0x00000004
255#define			COP_PINCAP_HEADPHONE	0x00000008
256#define			COP_PINCAP_OUTPUT	0x00000010
257#define			COP_PINCAP_INPUT	0x00000020
258#define			COP_PINCAP_BALANCE	0x00000040
259#define			COP_PINCAP_VREF(x)	((x >> 8) & 0xff)
260#define			COP_PINCAP_EAPD		0x00010000
261#define		COP_INPUT_AMPCAP	0x0d
262#define			COP_AMPCAP_OFFSET(x)	(x & 0x0000007f)
263#define			COP_AMPCAP_NUMSTEPS(x)	((x >> 8) & 0x7f)
264#define			COP_AMPCAP_STEPSIZE(x)	((x >> 16) & 0x7f)
265#define			COP_AMPCAP_MUTE		0x80000000
266#define		COP_CONNECTION_LIST_LENGTH	0x0e
267#define			COP_CLL_LONG		0x00000080
268#define			COP_CLL_LENGTH(x)	(x & 0x0000007f)
269#define		COP_SUPPORTED_POWER_STATES	0x0f
270#define		COP_PROCESSING_CAPABILITIES	0x10
271#define		COP_GPIO_COUNT			0x11
272#define		COP_OUTPUT_AMPCAP		0x12
273#define		COP_VOLUME_KNOB_CAPABILITIES	0x13
274#define			COP_VKCAP_DELTA		0x00000080
275#define			COP_VKCAP_NUMSTEPS(x)	(x & 0x7f)
276#define CORB_GET_CONNECTION_SELECT_CONTROL	0xf01
277#define		CORB_CSC_INDEX(x)		(x & 0xff)
278#define CORB_SET_CONNECTION_SELECT_CONTROL	0x701
279#define CORB_GET_CONNECTION_LIST_ENTRY	0xf02
280#define		CORB_CLE_LONG_0(x)	(x & 0x0000ffff)
281#define		CORB_CLE_LONG_1(x)	((x & 0xffff0000) >> 16)
282#define		CORB_CLE_SHORT_0(x)	(x & 0xff)
283#define		CORB_CLE_SHORT_1(x)	((x >> 8) & 0xff)
284#define		CORB_CLE_SHORT_2(x)	((x >> 16) & 0xff)
285#define		CORB_CLE_SHORT_3(x)	((x >> 24) & 0xff)
286#define CORB_GET_PROCESSING_STATE	0xf03
287#define CORB_SET_PROCESSING_STATE	0x703
288#define CORB_GET_COEFFICIENT_INDEX	0xd00
289#define CORB_SET_COEFFICIENT_INDEX	0x500
290#define CORB_GET_PROCESSING_COEFFICIENT	0xc00
291#define CORB_SET_PROCESSING_COEFFICIENT	0x400
292#define CORB_GET_AMPLIFIER_GAIN_MUTE	0xb00
293#define		CORB_GAGM_INPUT		0x0000
294#define		CORB_GAGM_OUTPUT	0x8000
295#define		CORB_GAGM_RIGHT		0x0000
296#define		CORB_GAGM_LEFT		0x2000
297#define		CORB_GAGM_MUTE		0x00000080
298#define		CORB_GAGM_GAIN(x)	(x & 0x0000007f)
299#define CORB_SET_AMPLIFIER_GAIN_MUTE	0x300
300#define		CORB_AGM_GAIN_MASK	0x007f
301#define		CORB_AGM_MUTE		0x0080
302#define		CORB_AGM_INDEX_SHIFT	8
303#define		CORB_AGM_RIGHT		0x1000
304#define		CORB_AGM_LEFT		0x2000
305#define		CORB_AGM_INPUT		0x4000
306#define		CORB_AGM_OUTPUT		0x8000
307#define CORB_GET_CONVERTER_FORMAT	0xa00
308#define CORB_SET_CONVERTER_FORMAT	0x200
309#define CORB_GET_DIGITAL_CONTROL	0xf0d
310#define CORB_SET_DIGITAL_CONTROL_L	0x70d
311#define CORB_SET_DIGITAL_CONTROL_H	0x70e
312#define		CORB_DCC_DIGEN		0x01
313#define		CORB_DCC_V		0x02
314#define		CORB_DCC_VCFG		0x04
315#define		CORB_DCC_PRE		0x08
316#define		CORB_DCC_COPY		0x10
317#define		CORB_DCC_NAUDIO		0x20
318#define		CORB_DCC_PRO		0x40
319#define		CORB_DCC_L		0x80
320#define		CORB_DCC_CC(x)		((x >> 8) & 0x7f)
321#define CORB_GET_POWER_STATE		0xf05
322#define CORB_SET_POWER_STATE		0x705
323#define		CORB_PS_D0		0x0
324#define		CORB_PS_D1		0x1
325#define		CORB_PS_D2		0x2
326#define		CORB_PS_D3		0x3
327#define CORB_GET_CONVERTER_STREAM_CHANNEL	0xf06
328#define CORB_SET_CONVERTER_STREAM_CHANNEL	0x706
329#define CORB_GET_INPUT_CONVERTER_SDI_SELECT	0xf04
330#define CORB_SET_INPUT_CONVERTER_SDI_SELECT	0x704
331#define CORB_GET_PIN_WIDGET_CONTROL	0xf07
332#define CORB_SET_PIN_WIDGET_CONTROL	0x707
333#define		CORB_PWC_HEADPHONE	0x80
334#define		CORB_PWC_OUTPUT		0x40
335#define		CORB_PWC_INPUT		0x20
336#define		CORB_PWC_VREF_HIZ	0x00
337#define		CORB_PWC_VREF_50	0x01
338#define		CORB_PWC_VREF_GND	0x02
339#define		CORB_PWC_VREF_80	0x04
340#define		CORB_PWC_VREF_100	0x05
341#define CORB_GET_UNSOLICITED_RESPONSE	0xf08
342#define CORB_SET_UNSOLICITED_RESPONSE	0x708
343#define		CORB_UNSOL_ENABLE	0x80
344#define		CORB_UNSOL_TAG(x)	(x & 0x3f)
345#define CORB_GET_PIN_SENSE		0xf09
346#define		CORB_PS_PRESENCE	0x80000000
347#define		CORB_PS_IMPEDANCE(x)	(x & 0x7fffffff)
348#define CORB_EXECUTE_PIN_SENSE		0x709
349#define		CORB_PS_RIGHT		0x1
350#define CORB_GET_EAPD_BTL_ENABLE	0xf0c
351#define CORB_SET_EAPD_BTL_ENABLE	0x70c
352#define		CORB_EAPD_BTL		0x01
353#define		CORB_EAPD_EAPD		0x02
354#define		CORB_EAPD_LRSWAP	0x04
355#define CORB_GET_GPI_DATA		0xf10
356#define CORB_SET_GPI_DATA		0x710
357#define CORB_GET_GPI_WAKE_ENABLE_MASK	0xf11
358#define CORB_SET_GPI_WAKE_ENABLE_MASK	0x711
359#define CORB_GET_GPI_UNSOLICITED_ENABLE_MASK	0xf12
360#define CORB_SET_GPI_UNSOLICITED_ENABLE_MASK	0x712
361#define CORB_GET_GPI_STICKY_MASK	0xf13
362#define CORB_SET_GPI_STICKY_MASK	0x713
363#define CORB_GET_GPO_DATA		0xf14
364#define CORB_SET_GPO_DATA		0x714
365#define CORB_GET_GPIO_DATA		0xf15
366#define CORB_SET_GPIO_DATA		0x715
367#define CORB_GET_GPIO_ENABLE_MASK	0xf16
368#define CORB_SET_GPIO_ENABLE_MASK	0x716
369#define CORB_GET_GPIO_DIRECTION		0xf17
370#define CORB_SET_GPIO_DIRECTION		0x717
371#define CORB_GET_GPIO_WAKE_ENABLE_MASK	0xf18
372#define CORB_SET_GPIO_WAKE_ENABLE_MASK	0x718
373#define CORB_GET_GPIO_UNSOLICITED_ENABLE_MASK	0xf19
374#define CORB_SET_GPIO_UNSOLICITED_ENABLE_MASK	0x719
375#define CORB_GET_GPIO_STICKY_MASK	0xf1a
376#define CORB_SET_GPIO_STICKY_MASK	0x71a
377#define CORB_GET_BEEP_GENERATION	0xf0a
378#define CORB_SET_BEEP_GENERATION	0x70a
379#define CORB_GET_VOLUME_KNOB		0xf0f
380#define CORB_SET_VOLUME_KNOB		0x70f
381#define		CORB_VKNOB_DIRECT	0x80
382#define		CORB_VKNOB_VOLUME(x)	(x & 0x7f)
383#define CORB_GET_SUBSYSTEM_ID		0xf20
384#define CORB_SET_SUBSYSTEM_ID_1		0x720
385#define CORB_SET_SUBSYSTEM_ID_2		0x721
386#define CORB_SET_SUBSYSTEM_ID_3		0x722
387#define CORB_SET_SUBSYSTEM_ID_4		0x723
388#define CORB_GET_CONFIGURATION_DEFAULT	0xf1c
389#define CORB_SET_CONFIGURATION_DEFAULT_1	0x71c
390#define CORB_SET_CONFIGURATION_DEFAULT_2	0x71d
391#define CORB_SET_CONFIGURATION_DEFAULT_3	0x71e
392#define CORB_SET_CONFIGURATION_DEFAULT_4	0x71f
393#define		CORB_CD_SEQUENCE(x)	(x & 0x0000000f)
394#define		CORB_CD_SEQUENCE_MAX	0x0f
395#define		CORB_CD_ASSOCIATION(x)	((x >> 4) & 0xf)
396#define		CORB_CD_ASSOCIATION_MAX	0x0f
397#define		CORB_CD_MISC_MASK	0x00000f00
398#define		CORB_CD_COLOR(x)	((x >> 12) & 0xf)
399#define			CORB_CD_COLOR_UNKNOWN	0x0
400#define			CORB_CD_BLACK	0x1
401#define			CORB_CD_GRAY	0x2
402#define			CORB_CD_BLUE	0x3
403#define			CORB_CD_GREEN	0x4
404#define			CORB_CD_RED	0x5
405#define			CORB_CD_ORANGE	0x6
406#define			CORB_CD_YELLOW	0x7
407#define			CORB_CD_PURPLE	0x8
408#define			CORB_CD_PINK	0x9
409#define			CORB_CD_WHITE	0xe
410#define			CORB_CD_COLOR_OTHER	0xf
411#define		CORB_CD_CONNECTION_MASK	0x000f0000
412#define		CORB_CD_DEVICE(x)	((x >> 20) & 0xf)
413#define			CORB_CD_LINEOUT		0x0
414#define			CORB_CD_SPEAKER		0x1
415#define			CORB_CD_HEADPHONE	0x2
416#define			CORB_CD_CD		0x3
417#define			CORB_CD_SPDIFOUT	0x4
418#define			CORB_CD_DIGITALOUT	0x5
419#define			CORB_CD_MODEMLINE	0x6
420#define			CORB_CD_MODEMHANDSET	0x7
421#define			CORB_CD_LINEIN		0x8
422#define			CORB_CD_AUX		0x9
423#define			CORB_CD_MICIN		0xa
424#define			CORB_CD_TELEPHONY	0xb
425#define			CORB_CD_SPDIFIN		0xc
426#define			CORB_CD_DIGITALIN	0xd
427#define			CORB_CD_DEVICE_OTHER	0xf
428#define		CORB_CD_LOCATION_MASK	0x3f000000
429#define		CORB_CD_PORT_MASK	0xc0000000
430#define CORB_GET_STRIPE_CONTROL		0xf24
431#define CORB_SET_STRIPE_CONTROL		0x720	/* XXX typo in the spec? */
432#define CORB_EXECUTE_FUNCTION_RESET	0x7ff
433
434#define CORB_NID_ROOT		0
435#define HDA_MAX_CHANNELS	16
436
437
438#ifndef PCI_SUBCLASS_MULTIMEDIA_HDAUDIO
439#define PCI_SUBCLASS_MULTIMEDIA_HDAUDIO	0x03
440#endif
441
442/* memory-mapped types */
443typedef struct {
444	uint32_t low;
445	uint32_t high;
446	uint32_t length;
447	uint32_t flags;
448#define	BDLIST_ENTRY_IOC	0x00000001
449} __packed bdlist_entry_t;
450#define HDA_BDL_MAX	256
451
452typedef struct {
453	uint32_t position;
454	uint32_t reserved;
455} __packed dmaposition_t;
456
457typedef uint32_t corb_entry_t;
458typedef struct {
459	uint32_t resp;
460	uint32_t resp_ex;
461#define RIRB_UNSOL_TAG(resp)	((resp) >> 26)
462#define RIRB_RESP_UNSOL		(1 << 4)
463#define RIRB_RESP_CODEC(ex)	((ex) & 0xf)
464} __packed rirb_entry_t;
465
466
467/* #define AZALIA_DEBUG */
468/* #define AZALIA_DEBUG_DOT */
469#ifdef AZALIA_DEBUG
470# define DPRINTF(x)	do { printf x; } while (0/*CONSTCOND*/)
471#else
472# define DPRINTF(x)	do {} while (0/*CONSTCOND*/)
473#endif
474#define PTR_UPPER32(x)	((uint64_t)(uintptr_t)(x) >> 32)
475#define FLAGBUFLEN	256
476#define MAX_VOLUME_255	1
477
478typedef int nid_t;
479
480typedef struct {
481	nid_t nid;
482	uint32_t widgetcap;
483	int type;		/* = bit20-24 of widgetcap */
484	int nconnections;
485	nid_t *connections;
486	int selected;
487	uint32_t inamp_cap;
488	uint32_t outamp_cap;
489	char name[MAX_AUDIO_DEV_LEN];
490	union {
491		struct {	/* for AUDIO_INPUT/OUTPUT */
492			uint32_t encodings;
493			uint32_t bits_rates;
494		} audio;
495		struct {	/* for PIN */
496			uint32_t cap;
497			uint32_t config;
498			int sequence;
499			int association;
500			int color;
501			int device;
502		} pin;
503		struct {	/* for VOLUME_KNOB */
504			uint32_t cap;
505		} volume;
506	} d;
507} widget_t;
508#define	WIDGET_CHANNELS(w)	((w)->widgetcap & COP_AWCAP_STEREO ? 2 : 1)
509
510typedef struct {
511	mixer_devinfo_t devinfo;
512	nid_t nid;		/* target NID; 0 is invalid. */
513	int target;		/* 0-15: inamp index, 0x100: outamp, ... */
514#define IS_MI_TARGET_INAMP(x)	((x) <= 15)
515#define MI_TARGET_INAMP(x)	(x)
516#define MI_TARGET_OUTAMP	0x100
517#define MI_TARGET_CONNLIST	0x101
518#define MI_TARGET_PINDIR	0x102 /* for bidirectional pin */
519#define MI_TARGET_PINBOOST	0x103 /* for headphone pin */
520#define MI_TARGET_DAC		0x104
521#define MI_TARGET_ADC		0x105
522#define MI_TARGET_VOLUME	0x106
523#define MI_TARGET_SPDIF		0x107
524#define MI_TARGET_SPDIF_CC	0x108
525#define MI_TARGET_EAPD		0x109
526#define MI_TARGET_BALANCE	0x10a
527#define MI_TARGET_LRSWAP	0x10b
528} mixer_item_t;
529
530#define VALID_WIDGET_NID(nid, codec)	(nid == (codec)->audiofunc || \
531					 (nid >= (codec)->wstart &&   \
532					  nid < (codec)->wend))
533
534#define PIN_STATUS(wid, conn)						\
535	do {								\
536		if ((wid)->type != COP_AWTYPE_PIN_COMPLEX)		\
537			(conn) = 0;					\
538		else							\
539			(conn) =					\
540			    ((wid)->d.pin.config & CORB_CD_PORT_MASK) >> 30; \
541	} while (0)
542
543typedef struct {
544	int nconv;
545	nid_t conv[HDA_MAX_CHANNELS]; /* front, surround, clfe, side, ... */
546} convgroup_t;
547typedef struct {
548	int cur;
549	int ngroups;
550	convgroup_t groups[32];
551} convgroupset_t;
552
553typedef struct codec_t {
554	int (*comresp)(const struct codec_t *, nid_t, uint32_t, uint32_t, uint32_t *);
555	int (*init_dacgroup)(struct codec_t *);
556	int (*init_widget)(const struct codec_t *, widget_t *, nid_t);
557	int (*mixer_init)(struct codec_t *);
558	int (*mixer_delete)(struct codec_t *);
559	int (*set_port)(struct codec_t *, mixer_ctrl_t *);
560	int (*get_port)(struct codec_t *, mixer_ctrl_t *);
561	int (*unsol_event)(struct codec_t *, int);
562
563	device_t dev; 		/* parent azalia(4) instance */
564	uint32_t vid;		/* codec vendor/device ID */
565	uint32_t subid;		/* PCI subvendor/device ID */
566	const char *name;
567	int address;
568	int nfunctions;
569	nid_t audiofunc;	/* NID of an audio function node */
570	nid_t wstart;		/* start NID of audio widgets */
571	nid_t wend;		/* the last NID of audio widgets + 1 */
572	widget_t *w;		/* widgets in the audio function.
573				 * w[0] to w[wstart-1] are unused. */
574#define FOR_EACH_WIDGET(this, i)	for (i = (this)->wstart; i < (this)->wend; i++)
575
576	convgroupset_t dacs;
577	convgroupset_t adcs;
578	int running;
579
580	int nmixers, maxmixers;
581	size_t szmixers;
582	mixer_item_t *mixers;
583
584	struct audio_format *formats;
585	int nformats;
586	size_t szformats;
587	struct audio_encoding_set *encodings;
588
589	uint32_t *extra;
590	size_t szextra;
591} codec_t;
592
593
594int	azalia_codec_init_vtbl(codec_t *);
595int	azalia_codec_construct_format(codec_t *, int, int);
596