1/*	$NetBSD: if_elmc_mca.c,v 1.29 2009/05/12 14:31:00 cegger Exp $	*/
2
3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Rafal K. Boni and Jaromir Dolecek.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/*
33 * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
34 *
35 * The 3c523-specific hooks were derived from Linux driver (file
36 * drivers/net/3c523.[ch]).
37 *
38 * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
39 */
40
41#include <sys/cdefs.h>
42__KERNEL_RCSID(0, "$NetBSD: if_elmc_mca.c,v 1.29 2009/05/12 14:31:00 cegger Exp $");
43
44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/mbuf.h>
47#include <sys/errno.h>
48#include <sys/device.h>
49#include <sys/protosw.h>
50#include <sys/socket.h>
51
52#include <net/if.h>
53#include <net/if_types.h>
54#include <net/if_media.h>
55#include <net/if_ether.h>
56
57#include <sys/bus.h>
58
59#include <dev/ic/i82586reg.h>
60#include <dev/ic/i82586var.h>
61#include <dev/mca/mcadevs.h>
62#include <dev/mca/mcavar.h>
63
64#include <dev/mca/3c523reg.h>
65
66struct elmc_mca_softc {
67	struct ie_softc sc_ie;
68
69	bus_space_tag_t sc_regt;	/* space tag for registers */
70	bus_space_handle_t sc_regh;	/* space handle for registers */
71
72	void		*sc_ih;		/* interrupt handle */
73};
74
75int	elmc_mca_match(device_t, cfdata_t, void *);
76void	elmc_mca_attach(device_t, device_t, void *);
77
78static void	elmc_mca_copyin(struct ie_softc *, void *, int, size_t);
79static void	elmc_mca_copyout(struct ie_softc *, const void *, int, size_t);
80static u_int16_t elmc_mca_read_16(struct ie_softc *, int);
81static void	elmc_mca_write_16(struct ie_softc *, int, u_int16_t);
82static void	elmc_mca_write_24(struct ie_softc *, int, int);
83static void	elmc_mca_attn(struct ie_softc *, int);
84static void	elmc_mca_hwreset(struct ie_softc *, int);
85static int	elmc_mca_intrhook(struct ie_softc *, int);
86
87int
88elmc_mca_match(device_t parent, cfdata_t cf,
89    void *aux)
90{
91	struct mca_attach_args *ma = aux;
92
93	switch (ma->ma_id) {
94	case MCA_PRODUCT_3C523:
95		return 1;
96	}
97
98	return 0;
99}
100
101void
102elmc_mca_attach(device_t parent, device_t self, void *aux)
103{
104	struct elmc_mca_softc *asc = device_private(self);
105	struct ie_softc *sc = &asc->sc_ie;
106	struct mca_attach_args *ma = aux;
107	int pos2, pos3, i, revision;
108	int iobase, irq, pbram_addr;
109	bus_space_handle_t ioh, memh;
110	u_int8_t myaddr[ETHER_ADDR_LEN];
111
112	pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
113	pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
114
115	/*
116	 * POS register 2: (adf pos0)
117	 *
118	 * 7 6 5 4 3 2 1 0
119	 *     \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
120	 *      \  \   \____ I/O Address Range: 00=300-307, 01=1300-1307,
121	 *       \  \                           10=2300-2307, 11=3300-3307
122	 *        \  \______ Packet Buffer RAM Address Range:
123	 *         \            00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
124	 *          \           10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
125	 *           \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
126	 *
127	 * POS register 3: (adf pos1)
128	 *
129	 * 7 6 5 4 3 2 1 0
130	 *          \____/
131	 *               \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
132	 */
133
134	iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
135
136	/* get irq */
137	switch (pos3 & 0x1f) {
138	case 4: irq = 3; break;
139	case 2: irq = 7; break;
140	case 8: irq = 9; break;
141	case 1: irq = 12; break;
142	default:
143		printf(": cannot determine irq\n");
144		return;
145	}
146
147	sc->sc_dev = self;
148	pbram_addr = ELMC_MADDR_BASE + (((pos2 & 0x18) >> 3) * 0x8000);
149
150	printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n",
151		ma->ma_slot + 1, irq);
152
153	/* map the pio registers */
154	if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
155		aprint_error_dev(self, "unable to map i/o space\n");
156		return;
157	}
158
159	/*
160	 * 3c523 has a 24K memory. The first 16K is the shared memory, while
161	 * the last 8K is for the EtherStart BIOS ROM, which we don't care
162	 * about. Just use the first 16K.
163	 */
164	if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
165		aprint_error_dev(self, "unable to map memory space\n");
166		if (pbram_addr == 0xc0000) {
167			aprint_error_dev(self, "memory space 0xc0000 may conflict with vga\n");
168		}
169
170		bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
171		return;
172	}
173
174	asc->sc_regt = ma->ma_iot;
175	asc->sc_regh = ioh;
176
177	sc->hwinit = NULL;
178	sc->intrhook = elmc_mca_intrhook;
179	sc->hwreset = elmc_mca_hwreset;
180	sc->chan_attn = elmc_mca_attn;
181
182	sc->ie_bus_barrier = NULL;
183
184	sc->memcopyin = elmc_mca_copyin;
185	sc->memcopyout = elmc_mca_copyout;
186	sc->ie_bus_read16 = elmc_mca_read_16;
187	sc->ie_bus_write16 = elmc_mca_write_16;
188	sc->ie_bus_write24 = elmc_mca_write_24;
189
190	sc->do_xmitnopchain = 0;
191
192	sc->sc_mediachange = NULL;
193	sc->sc_mediastatus = NULL;
194
195	sc->bt = ma->ma_memt;
196	sc->bh = memh;
197
198	/* Map i/o space. */
199	sc->sc_msize = ELMC_MADDR_SIZE;
200	sc->sc_maddr = (void *)memh;
201	sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
202
203	/* set up pointers to important on-card control structures */
204	sc->iscp = 0;
205	sc->scb = IE_ISCP_SZ;
206	sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
207
208	sc->buf_area = sc->scb + IE_SCB_SZ;
209	sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
210
211	/*
212	 * According to docs, we might need to read the interrupt number and
213	 * write it back to the IRQ select register, since the POST might not
214	 * configure the IRQ properly.
215	 */
216	(void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
217
218	/* reset the card first */
219	elmc_mca_hwreset(sc, CARD_RESET);
220	delay(1000000 / ( 1<< 5));
221
222	/* zero card memory */
223	bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
224
225	/* set card to 16-bit bus mode */
226	bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp),
227			  IE_SYSBUS_16BIT);
228
229	/* set up pointers to key structures */
230	elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
231	elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
232	elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
233
234	/* flush setup of pointers, check if chip answers */
235	bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
236			  BUS_SPACE_BARRIER_WRITE);
237	if (!i82586_proberam(sc)) {
238		aprint_error_dev(self, "can't talk to i82586!\n");
239
240		bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
241		bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
242		return;
243	}
244
245	/* revision is stored in the first 4 bits of the revision register */
246	revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
247				ELMC_REVISION) & ELMC_REVISION_MASK;
248
249	/* dump known info */
250	printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
251		device_xname(self), revision,
252		iobase, iobase + ELMC_IOADDR_SIZE - 1,
253		pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
254		(pos2 & 0x20) ? "ex" : "in");
255
256	/*
257	 * Hardware ethernet address is stored in the first six bytes
258	 * of the IO space.
259	 */
260	for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
261		myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
262
263	printf("%s:", device_xname(self));
264	i82586_attach(sc, "3C523", myaddr, NULL, 0, 0);
265
266	/* establish interrupt handler */
267	asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
268			sc);
269	if (asc->sc_ih == NULL) {
270		aprint_error_dev(self, "couldn't establish interrupt handler\n");
271		return;
272	}
273}
274
275static void
276elmc_mca_copyin (struct ie_softc *sc, void *dst, int offset, size_t size)
277{
278	int dribble;
279	u_int8_t* bptr = dst;
280
281	bus_space_barrier(sc->bt, sc->bh, offset, size,
282			  BUS_SPACE_BARRIER_READ);
283
284	if (offset % 2) {
285		*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
286		offset++; bptr++; size--;
287	}
288
289	dribble = size % 2;
290	bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
291				size >> 1);
292
293	if (dribble) {
294		bptr += size - 1;
295		offset += size - 1;
296		*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
297	}
298}
299
300static void
301elmc_mca_copyout (struct ie_softc *sc, const void *src, int offset, size_t size)
302{
303	int dribble;
304	int osize = size;
305	int ooffset = offset;
306	const u_int8_t* bptr = src;
307
308	if (offset % 2) {
309		bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
310		offset++; bptr++; size--;
311	}
312
313	dribble = size % 2;
314	bus_space_write_region_2(sc->bt, sc->bh, offset,
315	    (const u_int16_t *)bptr, size >> 1);
316	if (dribble) {
317		bptr += size - 1;
318		offset += size - 1;
319		bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
320	}
321
322	bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
323			  BUS_SPACE_BARRIER_WRITE);
324}
325
326static u_int16_t
327elmc_mca_read_16 (struct ie_softc *sc, int offset)
328{
329	bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
330        return bus_space_read_2(sc->bt, sc->bh, offset);
331}
332
333static void
334elmc_mca_write_16 (struct ie_softc *sc, int offset, u_int16_t value)
335{
336        bus_space_write_2(sc->bt, sc->bh, offset, value);
337	bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
338}
339
340static void
341elmc_mca_write_24 (struct ie_softc *sc, int offset, int addr)
342{
343        bus_space_write_4(sc->bt, sc->bh, offset, addr +
344                                (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
345	bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
346}
347
348/*
349 * Channel attention hook.
350 */
351static void
352elmc_mca_attn(struct ie_softc *sc, int why)
353{
354    struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
355    int intr = 0;
356
357    switch (why) {
358    case CHIP_PROBE:
359	intr = 0;
360	break;
361    case CARD_RESET:
362	intr = ELMC_CTRL_INT;
363	break;
364    }
365
366    bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
367		ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
368    delay(1);	/* should be > 500 ns */
369    bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
370		ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
371}
372
373/*
374 * Do full card hardware reset.
375 */
376static void
377elmc_mca_hwreset(struct ie_softc *sc, int why)
378{
379    struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
380
381    /* toggle the RST bit low then high */
382    bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
383		ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
384    delay(1);	/* should be > 500 ns */
385    bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
386		ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
387
388    elmc_mca_attn(sc, why);
389}
390
391/*
392 * Interrupt hook.
393 */
394static int
395elmc_mca_intrhook(struct ie_softc *sc, int why)
396{
397	switch (why) {
398	case INTR_ACK:
399		elmc_mca_attn(sc, CHIP_PROBE);
400		break;
401	default:
402		/* do nothing */
403		break;
404	}
405
406	return (0);
407}
408
409CFATTACH_DECL_NEW(elmc_mca, sizeof(struct elmc_mca_softc),
410    elmc_mca_match, elmc_mca_attach, NULL, NULL);
411