1/* $NetBSD: machdep.c,v 1.49 2011/02/20 07:47:38 matt Exp $ */
2
3/*
4 * Copyright 2000, 2001
5 * Broadcom Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and copied only
8 * in accordance with the following terms and conditions.  Subject to these
9 * conditions, you may download, copy, install, use, modify and distribute
10 * modified or unmodified copies of this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce and
14 *    retain this copyright notice and list of conditions as they appear in
15 *    the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 *    Broadcom Corporation.  The "Broadcom Corporation" name may not be
19 *    used to endorse or promote products derived from this software
20 *    without the prior written permission of Broadcom Corporation.
21 *
22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
23 *    WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 *    NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 *    FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 *    LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 *    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 *    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 *    WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 *    OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*
36 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions, and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 *    notice, this list of conditions and the following disclaimer in the
45 *    documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60#include <sys/cdefs.h>
61__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.49 2011/02/20 07:47:38 matt Exp $");
62
63#include "opt_ddb.h"
64#include "opt_execfmt.h"
65#include "opt_modular.h"
66
67#include <sys/param.h>
68#include <sys/buf.h>
69#include <sys/conf.h>
70#include <sys/cpu.h>
71#include <sys/device.h>
72#include <sys/exec.h>
73#include <sys/file.h>
74#include <sys/intr.h>
75#include <sys/kcore.h>
76#include <sys/kernel.h>
77#include <sys/ksyms.h>
78#include <sys/malloc.h>
79#include <sys/mbuf.h>
80#include <sys/mount.h>
81#include <sys/msgbuf.h>
82#include <sys/proc.h>
83#include <sys/reboot.h>
84#include <sys/syscallargs.h>
85#include <sys/systm.h>
86
87#include <uvm/uvm_extern.h>
88
89#include <mips/locore.h>
90#include <mips/psl.h>
91#include <mips/pte.h>
92#include <mips/reg.h>
93
94#include <mips/cfe/cfe_api.h>
95
96#include <sbmips/autoconf.h>
97#include <sbmips/swarm.h>
98
99#if 0 /* XXXCGD */
100#include <sbmips/nvram.h>
101#endif /* XXXCGD */
102#include <sbmips/leds.h>
103
104#include <mips/sibyte/dev/sbbuswatchvar.h>
105
106#include "ksyms.h"
107
108#if NKSYMS || defined(DDB) || defined(MODULAR)
109#include <mips/db_machdep.h>
110#include <ddb/db_access.h>
111#include <ddb/db_sym.h>
112#include <ddb/db_extern.h>
113#ifndef DB_ELFSIZE
114#error Must define DB_ELFSIZE!
115#endif
116#define	ELFSIZE		DB_ELFSIZE
117#include <sys/exec_elf.h>
118#endif
119
120#include <dev/cons.h>
121
122#if NKSYMS || defined(DDB) || defined(MODULAR)
123/* start and end of kernel symbol table */
124void	*ksym_start, *ksym_end;
125#endif
126
127/* Our exported CPU info.  Only one for now */
128struct cpu_info cpu_info_store;
129
130/* Maps for VM objects. */
131struct vm_map *phys_map = NULL;
132
133int	physmem;		/* Total physical memory */
134
135char	bootstring[512];	/* Boot command */
136int	netboot;		/* Are we netbooting? */
137int	cfe_present;
138
139struct bootinfo_v1 bootinfo;
140
141phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
142int mem_cluster_cnt;
143
144void	configure(void);
145void	mach_init(long, long, long, long);
146
147extern void *esym;
148
149/*
150 * Do all the stuff that locore normally does before calling main().
151 */
152void
153mach_init(long fwhandle, long magic, long bootdata, long reserved)
154{
155	void *kernend;
156	extern char edata[], end[];
157	uint32_t config;
158
159	/* XXX this code must run on the target CPU */
160	config = mips3_cp0_config_read();
161	config &= ~MIPS3_CONFIG_K0_MASK;
162	config |= 0x05;				/* XXX.  cacheable coherent */
163	mips3_cp0_config_write(config);
164
165	/* Zero BSS.  XXXCGD: uh, is this really necessary still?  */
166	memset(edata, 0, end - edata);
167
168	/*
169	 * Copy the bootinfo structure from the boot loader.
170	 * this has to be done before mips_vector_init is
171	 * called because we may need CFE's TLB handler
172	 */
173
174	if (magic == BOOTINFO_MAGIC)
175		memcpy(&bootinfo, (struct bootinfo_v1 *)bootdata,
176		    sizeof bootinfo);
177	else if (reserved == CFE_EPTSEAL) {
178		magic = BOOTINFO_MAGIC;
179		memset(&bootinfo, 0, sizeof bootinfo);
180		bootinfo.version = BOOTINFO_VERSION;
181		bootinfo.fwhandle = fwhandle;
182		bootinfo.fwentry = bootdata;
183		bootinfo.ssym = (vaddr_t)end;
184		bootinfo.esym = (vaddr_t)end;
185	}
186
187	kernend = (void *)mips_round_page(end);
188#if NKSYMS || defined(DDB) || defined(MODULAR)
189	if (magic == BOOTINFO_MAGIC) {
190		ksym_start = (void *)(intptr_t)bootinfo.ssym;
191		ksym_end   = (void *)(intptr_t)bootinfo.esym;
192		kernend = (void *)mips_round_page((vaddr_t)ksym_end);
193	}
194#endif
195
196	consinit();
197
198	uvm_setpagesize();
199
200	/*
201	 * Copy exception-dispatch code down to exception vector.
202	 * Initialize locore-function vector.
203	 * Clear out the I and D caches.
204	 */
205#ifdef MULTIPROCESSOR
206	mips_vector_init(NULL, true);
207#else
208	mips_vector_init(NULL, false);
209#endif
210
211	mips_locoresw.lsw_bus_error = sibyte_bus_watch_check;
212
213	sb1250_ipl_map_init();
214
215#ifdef DEBUG
216	printf("fwhandle=%08X magic=%08X bootdata=%08X reserved=%08X\n",
217	    (u_int)fwhandle, (u_int)magic, (u_int)bootdata, (u_int)reserved);
218#endif
219
220	strcpy(cpu_model, "sb1250");
221
222	if (magic == BOOTINFO_MAGIC) {
223		int idx;
224		int added;
225		uint64_t start, len, type;
226
227		cfe_init(bootinfo.fwhandle, bootinfo.fwentry);
228		cfe_present = 1;
229
230		idx = 0;
231		physmem = 0;
232		mem_cluster_cnt = 0;
233		while (cfe_enummem(idx, 0, &start, &len, &type) == 0) {
234			added = 0;
235			printf("Memory Block #%d start %08"PRIx64"X len %08"PRIx64"X: %s: ",
236			    idx, start, len, (type == CFE_MI_AVAILABLE) ?
237			    "Available" : "Reserved");
238			if ((type == CFE_MI_AVAILABLE) &&
239			    (mem_cluster_cnt < VM_PHYSSEG_MAX)) {
240				/*
241				 * XXX Ignore memory above 256MB for now, it
242				 * XXX needs special handling.
243				 */
244				if (start < (256*1024*1024)) {
245				    physmem += btoc(((int) len));
246				    mem_clusters[mem_cluster_cnt].start =
247					(long) start;
248				    mem_clusters[mem_cluster_cnt].size =
249					(long) len;
250				    mem_cluster_cnt++;
251				    added = 1;
252				}
253			}
254			if (added)
255				printf("added to map\n");
256			else
257				printf("not added to map\n");
258			idx++;
259		}
260
261	} else {
262		/*
263		 * Handle the case of not being called from the firmware.
264		 */
265		/* XXX hardwire to 32MB; should be kernel config option */
266		physmem = 32 * 1024 * 1024 / 4096;
267		mem_clusters[0].start = 0;
268		mem_clusters[0].size = ctob(physmem);
269		mem_cluster_cnt = 1;
270	}
271
272
273	for (u_int i = 0; i < sizeof(bootinfo.boot_flags); i++) {
274		switch (bootinfo.boot_flags[i]) {
275		case '\0':
276			break;
277		case ' ':
278			continue;
279		case '-':
280			while (bootinfo.boot_flags[i] != ' ' &&
281			    bootinfo.boot_flags[i] != '\0') {
282				switch (bootinfo.boot_flags[i]) {
283				case 'a':
284					boothowto |= RB_ASKNAME;
285					break;
286				case 'd':
287					boothowto |= RB_KDB;
288					break;
289				case 's':
290					boothowto |= RB_SINGLE;
291					break;
292				}
293				i++;
294			}
295		}
296	}
297
298	/*
299	 * Load the rest of the available pages into the VM system.
300	 */
301	mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
302	    mem_clusters, mem_cluster_cnt, NULL, 0);
303
304	/*
305	 * Initialize error message buffer (at end of core).
306	 */
307	mips_init_msgbuf();
308
309	pmap_bootstrap();
310
311	/*
312	 * Allocate uarea for lwp0 and set it.
313	 */
314	mips_init_lwp0_uarea();
315
316	/*
317	 * Initialize debuggers, and break into them, if appropriate.
318	 */
319#if NKSYMS || defined(DDB) || defined(MODULAR)
320	ksyms_addsyms_elf(((uintptr_t)ksym_end - (uintptr_t)ksym_start),
321	    ksym_start, ksym_end);
322#endif
323
324	if (boothowto & RB_KDB) {
325#if defined(DDB)
326		Debugger();
327#endif
328	}
329
330#ifdef MULTIPROCESSOR
331	mips_fixup_exceptions(mips_fixup_zero_relative);
332#endif
333}
334
335/*
336 * Allocate memory for variable-sized tables,
337 */
338void
339cpu_startup(void)
340{
341	/*
342	 * Just do the common stuff.
343	 */
344	cpu_startup_common();
345}
346
347int	waittime = -1;
348
349void
350cpu_reboot(int howto, char *bootstr)
351{
352
353	/* Take a snapshot before clobbering any registers. */
354	savectx(curpcb);
355
356	if (cold) {
357		howto |= RB_HALT;
358		goto haltsys;
359	}
360
361	/* If "always halt" was specified as a boot flag, obey. */
362	if (boothowto & RB_HALT)
363		howto |= RB_HALT;
364
365	boothowto = howto;
366	if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
367		waittime = 0;
368		vfs_shutdown();
369
370		/*
371		 * If we've been adjusting the clock, the todr
372		 * will be out of synch; adjust it now.
373		 */
374		resettodr();
375	}
376
377	splhigh();
378
379	if (howto & RB_DUMP)
380		dumpsys();
381
382haltsys:
383	doshutdownhooks();
384
385	pmf_system_shutdown(boothowto);
386
387	if (howto & RB_HALT) {
388		printf("\n");
389		printf("The operating system has halted.\n");
390		printf("Please press any key to reboot.\n\n");
391		cnpollc(1);	/* For proper keyboard command handling */
392		cngetc();
393		cnpollc(0);
394	}
395
396	printf("rebooting...\n\n");
397
398	if (cfe_present) {
399		/*
400		 * XXX
401		 * For some reason we can't return to CFE with
402		 * and do a warm start.  Need to look into this...
403		 */
404		cfe_exit(0, (howto & RB_DUMP) ? 1 : 0);
405		printf("cfe_exit didn't!\n");
406	}
407
408	printf("WARNING: reboot failed!\n");
409
410	for (;;);
411}
412
413static void
414cswarm_setled(u_int index, char c)
415{
416	volatile u_char *led_ptr =
417	    (void *)MIPS_PHYS_TO_KSEG1(SWARM_LEDS_PHYS);
418
419	if (index < 4)
420		led_ptr[0x20 + ((3 - index) << 3)] = c;
421}
422
423void
424cswarm_setleds(const char *str)
425{
426	int i;
427
428	for (i = 0; i < 4 && str[i]; i++)
429		cswarm_setled(i, str[i]);
430	for (; i < 4; i++)
431		cswarm_setled(' ', str[i]);
432}
433
434int
435sbmips_cca_for_pa(paddr_t pa)
436{
437	int rv;
438
439	rv = 2;			/* Uncached. */
440
441	/* Check each DRAM region. */
442	if ((pa >= 0x0000000000   && pa <= 0x000fffffff) ||	/* DRAM 0 */
443	    (pa >= 0x0080000000   && pa <= 0x008fffffff) ||	/* DRAM 1 */
444	    (pa >= 0x0090000000   && pa <= 0x009fffffff) ||	/* DRAM 2 */
445	    (pa >= 0x00c0000000   && pa <= 0x00cfffffff) ||	/* DRAM 3 */
446#ifdef _MIPS_PADDR_T_64BIT
447	    (pa >= 0x0100000000LL && pa <= 0x07ffffffffLL) ||	/* DRAM exp */
448#endif
449	   0) {
450		rv = 5;		/* Cacheable coherent. */
451	}
452
453	return (rv);
454}
455