1/*	$NetBSD: pic_distopenpic.c,v 1.8 2012/01/14 19:35:59 phx Exp $ */
2
3/*-
4 * Copyright (c) 2008 Tim Rightnour
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of The NetBSD Foundation nor the names of its
16 *    contributors may be used to endorse or promote products derived
17 *    from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: pic_distopenpic.c,v 1.8 2012/01/14 19:35:59 phx Exp $");
34
35#include "opt_openpic.h"
36#include "opt_interrupt.h"
37
38#include <sys/param.h>
39#include <sys/kernel.h>
40#include <sys/kmem.h>
41
42#include <uvm/uvm_extern.h>
43
44#include <machine/pio.h>
45#include <powerpc/openpic.h>
46
47#include <powerpc/pic/picvar.h>
48
49/* distributed stuff */
50static int opic_isu_from_irq(struct openpic_ops *, int, int *);
51static u_int distopic_read(struct openpic_ops *, int, int);
52static void distopic_write(struct openpic_ops *, int, int, u_int);
53static void distopic_establish_irq(struct pic_ops *, int, int, int);
54static void distopic_enable_irq(struct pic_ops *, int, int);
55static void distopic_disable_irq(struct pic_ops *, int);
56static void distopic_finish_setup(struct pic_ops *);
57
58struct pic_ops *
59setup_distributed_openpic(void *addr, int nrofisus, void **isu, int *maps)
60{
61	struct openpic_ops *opicops;
62	struct pic_ops *pic;
63	int irq, i;
64	u_int x;
65
66	openpic_base = (void *)addr;
67	opicops = kmem_alloc(sizeof(*opicops), KM_SLEEP);
68	KASSERT(opicops != NULL);
69	pic = &opicops->pic;
70
71	x = openpic_read(OPENPIC_FEATURE);
72	if (((x & 0x07ff0000) >> 16) != 0)
73		panic("Can't handle a distributed openpic with internal ISU");
74
75	opicops->nrofisus = nrofisus;
76	opicops->isu = kmem_alloc(sizeof(volatile u_char *) * nrofisus,
77	    KM_SLEEP);
78	KASSERT(opicops->isu != NULL);
79	opicops->irq_per = kmem_alloc(sizeof(uint8_t) * nrofisus, KM_SLEEP);
80	KASSERT(opicops->irq_per != NULL);
81
82	for (irq=0, i=0; i < nrofisus ; i++) {
83		opicops->isu[i] = (void *)isu[i];
84		opicops->irq_per[i] = maps[i]/0x20;
85		irq += maps[i]/0x20;
86		aprint_debug("%d: irqtotal=%d, added %d\n", i, irq,
87		    maps[i]/0x20);
88	}
89	aprint_normal("OpenPIC Version 1.%d: "
90	    "Supports %d CPUs and %d interrupt sources.\n",
91	    x & 0xff, ((x & 0x1f00) >> 8) + 1, irq);
92	pic->pic_numintrs = irq;
93	pic->pic_cookie = addr;
94	pic->pic_enable_irq = distopic_enable_irq;
95	pic->pic_reenable_irq = distopic_enable_irq;
96	pic->pic_disable_irq = distopic_disable_irq;
97	pic->pic_get_irq = opic_get_irq;
98	pic->pic_ack_irq = opic_ack_irq;
99	pic->pic_establish_irq = distopic_establish_irq;
100	pic->pic_finish_setup = distopic_finish_setup;
101	opicops->flags = OPENPIC_FLAG_DIST;
102	strcpy(pic->pic_name, "openpic");
103	pic_add(pic);
104
105	openpic_set_priority(0, 15);
106
107	for (i=0; i < nrofisus; i++) {
108		for (irq = 0; irq < opicops->irq_per[i]; irq++) {
109			/* make sure to keep disabled */
110			distopic_write(opicops, i,
111			    OPENPIC_DSRC_VECTOR_OFFSET(irq), OPENPIC_IMASK);
112			/* send all interrupts to CPU 0 */
113			distopic_write(opicops, i,
114			    OPENPIC_DSRC_IDEST_OFFSET(irq), 1 << 0);
115		}
116	}
117
118	x = openpic_read(OPENPIC_CONFIG);
119	x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
120	openpic_write(OPENPIC_CONFIG, x);
121
122	openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xff);
123
124	openpic_set_priority(0, 0);
125
126	/* clear all pending interrunts */
127	for (irq = 0; irq < pic->pic_numintrs; irq++) {
128		openpic_read_irq(0);
129		openpic_eoi(0);
130	}
131
132#if 0
133	printf("timebase freq=%d\n", openpic_read(0x10f0));
134#endif
135	return pic;
136
137}
138
139/* Begin distributed openpic code */
140
141static int
142opic_isu_from_irq(struct openpic_ops *opic, int irq, int *realirq)
143{
144	int i;
145
146	for (i=0; i < opic->nrofisus; i++) {
147		if (irq < opic->irq_per[i]) {
148			*realirq = irq;
149			return i;
150		} else
151			irq -= opic->irq_per[i];
152	}
153	return -1;
154}
155
156static u_int
157distopic_read(struct openpic_ops *opic, int isu, int offset)
158{
159	volatile unsigned char *addr = opic->isu[isu] + offset;
160
161	return in32rb(addr);
162}
163
164static void
165distopic_write(struct openpic_ops *opic, int isu, int offset, u_int val)
166{
167	volatile unsigned char *addr = opic->isu[isu] + offset;
168
169	out32rb(addr, val);
170}
171
172static void
173distopic_establish_irq(struct pic_ops *pic, int irq, int type, int pri)
174{
175	struct openpic_ops *opic = (struct openpic_ops *)pic;
176	int isu, realirq = -1, realpri = max(1, min(15, pri));
177	uint32_t x;
178
179	isu = opic_isu_from_irq(opic, irq, &realirq);
180	KASSERT(isu != -1);
181
182	x = irq;
183	x |= OPENPIC_IMASK;
184
185	if ((realirq == 0 && isu == 0) ||
186	    type == IST_EDGE_RISING || type == IST_LEVEL_HIGH)
187		x |= OPENPIC_POLARITY_POSITIVE;
188	else
189		x |= OPENPIC_POLARITY_NEGATIVE;
190
191	if (type == IST_EDGE_FALLING || type == IST_EDGE_RISING)
192		x |= OPENPIC_SENSE_EDGE;
193	else
194		x |= OPENPIC_SENSE_LEVEL;
195
196	x |= realpri << OPENPIC_PRIORITY_SHIFT;
197	distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x);
198
199	aprint_debug("%s: setting IRQ %d to priority %d 0x%x\n", __func__,
200	    irq, realpri, x);
201}
202
203static void
204distopic_enable_irq(struct pic_ops *pic, int irq, int type)
205{
206	struct openpic_ops *opic = (struct openpic_ops *)pic;
207	int isu, realirq = -1;
208	u_int x;
209
210	isu = opic_isu_from_irq(opic, irq, &realirq);
211	KASSERT(isu != -1);
212	x = distopic_read(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq));
213	x &= ~OPENPIC_IMASK;
214	distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x);
215}
216
217static void
218distopic_disable_irq(struct pic_ops *pic, int irq)
219{
220	struct openpic_ops *opic = (struct openpic_ops *)pic;
221	int isu, realirq = -1;
222	u_int x;
223
224	isu = opic_isu_from_irq(opic, irq, &realirq);
225	KASSERT(isu != -1);
226	x = distopic_read(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq));
227	x |= OPENPIC_IMASK;
228	distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x);
229}
230
231static void
232distopic_finish_setup(struct pic_ops *pic)
233{
234	struct openpic_ops *opic = (struct openpic_ops *)pic;
235	uint32_t cpumask = 0;
236	int i, irq;
237
238#ifdef OPENPIC_DISTRIBUTE
239	for (i = 0; i < ncpu; i++)
240		cpumask |= (1 << cpu_info[i].ci_index);
241#else
242	cpumask = 1;
243#endif
244	for (i=0; i < opic->nrofisus; i++) {
245		for (irq = 0; irq < opic->irq_per[i]; irq++) {
246			distopic_write(opic, i, OPENPIC_DSRC_IDEST_OFFSET(irq),
247			    cpumask);
248		}
249	}
250}
251