1/* $NetBSD: tx39ioreg.h,v 1.5 2005/12/11 12:17:34 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31/* 32 * TOSHIBA TX3912/TX3922 IO module 33 */ 34 35#ifndef __TX39IO_PRIVATE 36#error "don't include this file" 37#else /* !__TX39IO_PRIVATE */ 38#define TX39_IOCTRL_REG 0x180 39#define TX39_IOMFIODATAOUT_REG 0x184 40#define TX39_IOMFIODATADIR_REG 0x188 41#define TX39_IOMFIODATAIN_REG 0x18c 42#define TX39_IOMFIODATASEL_REG 0x190 43#define TX39_IOIOPOWERDWN_REG 0x194 44#define TX39_IOMFIOPOWERDWN_REG 0x198 45#ifdef TX392X 46#define TX392X_IODATAINOUT_REG 0x19c 47#endif /* TX392X */ 48 49#define TX39_IO_MFIO_MAX 32 50#ifdef TX391X 51#define TX391X_IO_IO_MAX 7 52#endif /* TX391X */ 53#ifdef TX392X 54#define TX392X_IO_IO_MAX 16 55#endif /* TX392X */ 56 57/* 58 * IO Control Register 59 */ 60#ifdef TX391X 61#define TX391X_IOCTRL_IODEBSEL_SHIFT 24 62#define TX391X_IOCTRL_IODEBSEL_MASK 0x7f 63#define TX391X_IOCTRL_IODEBSEL(cr) \ 64 (((cr) >> TX391X_IOCTRL_IODEBSEL_SHIFT) & \ 65 TX391X_IOCTRL_IODEBSEL_MASK) 66#define TX391X_IOCTRL_IODEBSEL_SET(cr, val) \ 67 ((cr) | (((val) << TX391X_IOCTRL_IODEBSEL_SHIFT) & \ 68 (TX391X_IOCTRL_IODEBSEL_MASK << TX391X_IOCTRL_IODEBSEL_SHIFT))) 69 70#define TX391X_IOCTRL_IODIREC_SHIFT 16 71#define TX391X_IOCTRL_IODIREC_MASK 0x7f 72#define TX391X_IOCTRL_IODIREC(cr) \ 73 (((cr) >> TX391X_IOCTRL_IODIREC_SHIFT) & \ 74 TX391X_IOCTRL_IODIREC_MASK) 75#define TX391X_IOCTRL_IODIREC_SET(cr, val) \ 76 ((cr) | (((val) << TX391X_IOCTRL_IODIREC_SHIFT) & \ 77 (TX391X_IOCTRL_IODIREC_MASK << TX391X_IOCTRL_IODIREC_SHIFT))) 78 79#define TX391X_IOCTRL_IODOUT_SHIFT 8 80#define TX391X_IOCTRL_IODOUT_MASK 0x7f 81#define TX391X_IOCTRL_IODOUT(cr) \ 82 (((cr) >> TX391X_IOCTRL_IODOUT_SHIFT) & \ 83 TX391X_IOCTRL_IODOUT_MASK) 84#define TX391X_IOCTRL_IODOUT_CLR(cr) \ 85 ((cr) &= ~(TX391X_IOCTRL_IODOUT_MASK << TX391X_IOCTRL_IODOUT_SHIFT)) 86#define TX391X_IOCTRL_IODOUT_SET(cr, val) \ 87 ((cr) | (((val) << TX391X_IOCTRL_IODOUT_SHIFT) & \ 88 (TX391X_IOCTRL_IODOUT_MASK << TX391X_IOCTRL_IODOUT_SHIFT))) 89 90#define TX391X_IOCTRL_IODIN_SHIFT 0 91#define TX391X_IOCTRL_IODIN_MASK 0x7f 92#define TX391X_IOCTRL_IODIN(cr) \ 93 (((cr) >> TX391X_IOCTRL_IODIN_SHIFT) & \ 94 TX391X_IOCTRL_IODIN_MASK) 95#endif /* TX391X */ 96 97#ifdef TX392X 98#define TX392X_IOCTRL_IODEBSEL_SHIFT 16 99#define TX392X_IOCTRL_IODEBSEL_MASK 0xffff 100#define TX392X_IOCTRL_IODEBSEL(cr) \ 101 (((cr) >> TX392X_IOCTRL_IODEBSEL_SHIFT) & \ 102 TX392X_IOCTRL_IODEBSEL_MASK) 103#define TX392X_IOCTRL_IODEBSEL_SET(cr, val) \ 104 ((cr) | (((val) << TX392X_IOCTRL_IODEBSEL_SHIFT) & \ 105 (TX392X_IOCTRL_IODEBSEL_MASK << TX392X_IOCTRL_IODEBSEL_SHIFT))) 106 107#define TX392X_IOCTRL_IODIREC_SHIFT 0 108#define TX392X_IOCTRL_IODIREC_MASK 0xffff 109#define TX392X_IOCTRL_IODIREC(cr) \ 110 (((cr) >> TX392X_IOCTRL_IODIREC_SHIFT) & \ 111 TX392X_IOCTRL_IODIREC_MASK) 112#define TX392X_IOCTRL_IODIREC_SET(cr, val) \ 113 ((cr) | (((val) << TX392X_IOCTRL_IODIREC_SHIFT) & \ 114 (TX392X_IOCTRL_IODIREC_MASK << TX392X_IOCTRL_IODIREC_SHIFT))) 115 116#define TX392X_IODATAINOUT_DOUT_SHIFT 16 117#define TX392X_IODATAINOUT_DOUT_MASK 0xffff 118#define TX392X_IODATAINOUT_DOUT(cr) \ 119 (((cr) >> TX392X_IODATAINOUT_DOUT_SHIFT) & \ 120 TX392X_IODATAINOUT_DOUT_MASK) 121#define TX392X_IODATAINOUT_DOUT_SET(cr, val) \ 122 ((cr) | (((val) << TX392X_IODATAINOUT_DOUT_SHIFT) & \ 123 (TX392X_IODATAINOUT_DOUT_MASK << TX392X_IODATAINOUT_DOUT_SHIFT))) 124#define TX392X_IODATAINOUT_DOUT_CLR(cr) \ 125 ((cr) &= ~(TX392X_IODATAINOUT_DOUT_MASK << \ 126 TX392X_IODATAINOUT_DOUT_SHIFT)) 127 128#define TX392X_IODATAINOUT_DIN_SHIFT 0 129#define TX392X_IODATAINOUT_DIN_MASK 0xffff 130#define TX392X_IODATAINOUT_DIN(cr) \ 131 (((cr) >> TX392X_IODATAINOUT_DIN_SHIFT) & \ 132 TX392X_IODATAINOUT_DIN_MASK) 133#define TX392X_IODATAINOUT_DIN_SET(cr, val) \ 134 ((cr) | (((val) << TX392X_IODATAINOUT_DIN_SHIFT) & \ 135 (TX392X_IODATAINOUT_DIN_MASK << TX392X_IODATAINOUT_DIN_SHIFT))) 136#endif /* TX392X */ 137/* 138 * MFIO Data Output Register 139 */ 140#define TX39_IOMFIODATAOUT_MFIODOUT 0 141 142/* 143 * MFIO Data Direction Register 144 */ 145#define TX39_IOMFIODATADIR_MFIODIREC 0 146 147/* 148 * MFIO Data Input Register 149 */ 150#define TX39_IOMFIODATAIN_MFIODIN 0 151 152/* 153 * MFIO Data Select Register 154 */ 155#define TX39_IOMFIODATASEL_MFIOSEL 0 156#define TX39_IOMFIODATASEL_MFIOSEL_RESET 0xf20f0fff 157 158/* 159 * IO Power Down Register 160 */ 161#ifdef TX391X 162#define TX391X_IOIOPOWERDWN_IOPD_SHIFT 0 163#define TX391X_IOIOPOWERDWN_IOPD_MASK 0x7f 164#define TX391X_IOIOPOWERDWN_IOPD_RESET 0x7f 165#define TX391X_IOIOPOWERDWN_IOPD(cr) \ 166 (((cr) >> TX391X_IOIOPOWERDWN_IOPD_SHIFT) & \ 167 TX391X_IOIOPOWERDWN_IOPD_MASK) 168#define TX391X_IOIOPOWERDWN_IOPD_SET(cr, val) \ 169 ((cr) | (((val) << TX391X_IOIOPOWERDWN_IOPD_SHIFT) & \ 170 (TX391X_IOIOPOWERDWN_IOPD_MASK << TX391X_IOIOPOWERDOWN_IOPD_SHIFT))) 171#endif /* TX391X */ 172#ifdef TX392X 173#define TX392X_IOIOPOWERDWN_IOPD_SHIFT 0 174#define TX392X_IOIOPOWERDWN_IOPD_MASK 0xffff 175#define TX392X_IOIOPOWERDWN_IOPD_RESET 0x0fff 176#define TX392X_IOIOPOWERDWN_IOPD(cr) \ 177 (((cr) >> TX392X_IOIOPOWERDWN_IOPD_SHIFT) & \ 178 TX392X_IOIOPOWERDWN_IOPD_MASK) 179#define TX392X_IOIOPOWERDWN_IOPD_SET(cr, val) \ 180 ((cr) | (((val) << TX392X_IOIOPOWERDWN_IOPD_SHIFT) & \ 181 (TX392X_IOIOPOWERDWN_IOPD_MASK << TX392X_IOIOPOWERDOWN_IOPD_SHIFT))) 182#endif /* TX392X */ 183 184 185/* 186 * MFIO Power Down Register 187 */ 188#define TX39_IOMFIOPOWERDWN_MFIOPD 0 189#define TX39_IOMFIOPOWERDWN_MFIOPD_RESET 0xfaf03ffc 190 191/* 192 * MFIO mapping 193 */ 194struct tx39io_mfio_map { 195 const char *std_pin_name; 196 int std_type; 197#define STD_IN 1 198#define STD_OUT 2 199#define STD_INOUT 3 200}; 201 202#ifdef TX391X 203static const struct tx39io_mfio_map 204tx391x_mfio_map[TX39_IO_MFIO_MAX] = { 205 [31] = {"CHIFS", STD_INOUT}, 206 [30] = {"CHICLK", STD_INOUT}, 207 [29] = {"CHIDOUT", STD_OUT}, 208 [28] = {"CHIDIN", STD_IN}, 209 [27] = {"DREQ", STD_IN}, 210 [26] = {"DGRINT", STD_OUT}, 211 [25] = {"BC32K", STD_OUT}, 212 [24] = {"TXD", STD_OUT}, 213 [23] = {"RXD", STD_IN}, 214 [22] = {"CS1", STD_OUT}, 215 [21] = {"CS2", STD_OUT}, 216 [20] = {"CS3", STD_OUT}, 217 [19] = {"MCS0", STD_OUT}, 218 [18] = {"MCS1", STD_OUT}, 219 [17] = {"MCS2", STD_OUT}, 220 [16] = {"MCS3", STD_OUT}, 221 [15] = {"SPICLK", STD_OUT}, 222 [14] = {"SPIOUT", STD_OUT}, 223 [13] = {"SPIN", STD_IN}, 224 [12] = {"SIBMCLK", STD_INOUT}, 225 [11] = {"CARDREG", STD_OUT}, 226 [10] = {"CARDIOWR", STD_OUT}, 227 [9] = {"CARDIORD", STD_OUT}, 228 [8] = {"CARD1CSL", STD_OUT}, 229 [7] = {"CARD1CSH", STD_OUT}, 230 [6] = {"CARD2CSL", STD_OUT}, 231 [5] = {"CARD2CSH", STD_OUT}, 232 [4] = {"CARD1WAIT", STD_IN}, 233 [3] = {"CARD2WAIT", STD_IN}, 234 [2] = {"CARDDIR", STD_OUT}, 235 [1] = {"MFIO[1]", 0}, 236 [0] = {"MFIO[0]", 0} 237}; 238#endif /* TX391X */ 239 240#ifdef TX392X 241static const struct tx39io_mfio_map 242tx392x_mfio_map[TX39_IO_MFIO_MAX] = { 243 [31] = {"CHIFS", STD_INOUT}, 244 [30] = {"CHICLK", STD_INOUT}, 245 [29] = {"CHIDOUT", STD_OUT}, 246 [28] = {"CHIDIN", STD_IN}, 247 [27] = {"DREQ", STD_IN}, 248 [26] = {"DGRINT", STD_OUT}, 249 [25] = {"BC32K", STD_OUT}, 250 [24] = {"TXD", STD_OUT}, 251 [23] = {"RXD", STD_IN}, 252 [22] = {"CS1", STD_OUT}, 253 [21] = {"CS2", STD_OUT}, 254 [20] = {"CS3", STD_OUT}, 255 [19] = {"MCS0", STD_OUT}, 256 [18] = {"MCS1", STD_OUT}, 257 [17] = {"RXPWR", STD_OUT}, 258 [16] = {"IROUT", STD_OUT}, 259 [15] = {"SPICLK", STD_OUT}, 260 [14] = {"SPIOUT", STD_OUT}, 261 [13] = {"SPIN", STD_IN}, 262 [12] = {"SIBMCLK", STD_INOUT}, 263 [11] = {"CARDREG", STD_OUT}, 264 [10] = {"CARDIOWR", STD_OUT}, 265 [9] = {"CARDIORD", STD_OUT}, 266 [8] = {"CARD1CSL", STD_OUT}, 267 [7] = {"CARD1CSH", STD_OUT}, 268 [6] = {"CARD2CSL", STD_OUT}, 269 [5] = {"CARD2CSH", STD_OUT}, 270 [4] = {"CARD1WAIT", STD_IN}, 271 [3] = {"CARD2WAIT", STD_IN}, 272 [2] = {"CARDDIR", STD_OUT}, 273 [1] = {"MCS1WAIT", 0}, 274 [0] = {"MCS0WAIT", 0} 275}; 276#endif /* TX392X */ 277 278#if defined TX391X && defined TX392X 279#define tx39io_get_mfio_map(c) \ 280 (IS_TX391X(c) ? tx391x_mfio_map : tx392x_mfio_map) 281#define tx39io_get_io_max(c) \ 282 (IS_TX391X(c) ? TX391X_IO_IO_MAX : TX392X_IO_IO_MAX) 283#elif defined TX391X 284#define tx39io_get_mfio_map(c) tx391x_mfio_map 285#define tx39io_get_io_max(c) TX391X_IO_IO_MAX 286#elif defined TX392X 287#define tx39io_get_mfio_map(c) tx392x_mfio_map 288#define tx39io_get_io_max(c) TX392X_IO_IO_MAX 289#endif 290 291#endif /* !__TX39IO_PRIVATE */ 292 293