1/* $NetBSD: sti_sgc.c,v 1.20 2010/11/09 12:24:47 skrll Exp $ */ 2 3/* $OpenBSD: sti_sgc.c,v 1.38 2009/02/06 22:51:04 miod Exp $ */ 4 5/* 6 * Copyright (c) 2000-2003 Michael Shalayeff 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30/* 31 * These cards has to be known to work so far: 32 * - HPA1991AGrayscale rev 0.02 (705/35) (byte-wide) 33 * - HPA1991AC19 rev 0.02 (715/33) (byte-wide) 34 * - HPA208LC1280 rev 8.04 (712/80) just works 35 */ 36 37#include <sys/cdefs.h> 38__KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.20 2010/11/09 12:24:47 skrll Exp $"); 39 40#include "opt_cputype.h" 41 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/device.h> 45 46#include <uvm/uvm.h> 47 48#include <sys/bus.h> 49#include <machine/cpu.h> 50#include <machine/iomod.h> 51#include <machine/autoconf.h> 52 53#include <dev/wscons/wsdisplayvar.h> 54#include <dev/wscons/wsconsio.h> 55 56#include <dev/ic/stireg.h> 57#include <dev/ic/stivar.h> 58 59#include <hp700/dev/cpudevs.h> 60#include <hp700/hp700/machdep.h> 61 62#ifdef STIDEBUG 63#define DPRINTF(s) do { \ 64 if (stidebug) \ 65 printf s; \ 66} while(0) 67 68extern int stidebug; 69#else 70#define DPRINTF(s) /* */ 71#endif 72 73#define STI_ROMSIZE (sizeof(struct sti_dd) * 4) 74#define STI_ID_FDDI 0x280b31af /* Medusa FDDI ROM id */ 75 76/* gecko optional graphics */ 77#define STI_GOPT1_REV 0x17 78#define STI_GOPT2_REV 0x70 79#define STI_GOPT3_REV 0xd0 80#define STI_GOPT4_REV 0x00 81#define STI_GOPT5_REV 0x20 82#define STI_GOPT6_REV 0x40 83#define STI_GOPT7_REV 0x30 84 85const char sti_sgc_opt[] = { 86 STI_GOPT1_REV, 87 STI_GOPT2_REV, 88 STI_GOPT3_REV, 89 STI_GOPT4_REV, 90 STI_GOPT5_REV, 91 STI_GOPT6_REV, 92 STI_GOPT7_REV 93}; 94 95int sti_sgc_probe(device_t, cfdata_t, void *); 96void sti_sgc_attach(device_t, device_t, void *); 97 98void sti_sgc_end_attach(device_t); 99 100extern struct cfdriver sti_cd; 101 102CFATTACH_DECL_NEW(sti_gedoens, sizeof(struct sti_softc), sti_sgc_probe, 103 sti_sgc_attach, NULL, NULL); 104 105paddr_t sti_sgc_getrom(struct confargs *); 106 107/* 108 * Locate STI ROM. 109 * On some machines it may not be part of the HPA space. 110 */ 111paddr_t 112sti_sgc_getrom(struct confargs *ca) 113{ 114 paddr_t rom; 115 int pagezero_cookie; 116 117 pagezero_cookie = hp700_pagezero_map(); 118 rom = PAGE0->pd_resv2[1]; 119 hp700_pagezero_unmap(pagezero_cookie); 120 121 if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC) { 122 int i; 123 for (i = sizeof(sti_sgc_opt); i--; ) 124 if (sti_sgc_opt[i] == ca->ca_type.iodc_revision) 125 break; 126 if (i < 0) 127 rom = 0; 128 } 129 130 if (rom < HPPA_IOBEGIN) { 131 if (ca->ca_naddrs > 0) 132 rom = ca->ca_addrs[0].addr; 133 else 134 rom = ca->ca_hpa; 135 } 136 137 return rom; 138} 139 140int 141sti_sgc_probe(device_t parent, cfdata_t cf, void *aux) 142{ 143 struct confargs *ca = aux; 144 bus_space_handle_t romh; 145 paddr_t rom; 146 uint32_t id, romend; 147 u_char devtype; 148 int rv = 0, romunmapped = 0; 149 150 /* due to the graphic nature of this program do probe only one */ 151 if (cf->cf_unit > sti_cd.cd_ndevs) 152 return 0; 153 154 if (ca->ca_type.iodc_type != HPPA_TYPE_FIO) 155 return 0; 156 157 /* these need further checking for the graphics id */ 158 if (ca->ca_type.iodc_sv_model != HPPA_FIO_GSGC && 159 ca->ca_type.iodc_sv_model != HPPA_FIO_SGC) 160 return 0; 161 162 rom = sti_sgc_getrom(ca); 163 DPRINTF(("%s: hpa=%x, rom=%x\n", __func__, (uint)ca->ca_hpa, 164 (uint)rom)); 165 166 /* if it does not map, probably part of the lasi space */ 167 if ((rv = bus_space_map(ca->ca_iot, rom, STI_ROMSIZE, 0, &romh))) { 168 DPRINTF(("%s: can't map rom space (%d)\n", __func__, rv)); 169 170 if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) { 171 romh = rom; 172 romunmapped++; 173 } else { 174 /* in this case nobody has no freaking idea */ 175 return 0; 176 } 177 } 178 179 devtype = bus_space_read_1(ca->ca_iot, romh, 3); 180 181 DPRINTF(("%s: devtype=%d\n", __func__, devtype)); 182 rv = 1; 183 switch (devtype) { 184 case STI_DEVTYPE4: 185 id = bus_space_read_4(ca->ca_iot, romh, STI_DEV4_DD_GRID); 186 break; 187 case STI_DEVTYPE1: 188 id = (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 189 + 3) << 24) | 190 (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 191 + 7) << 16) | 192 (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 193 + 11) << 8) | 194 (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 195 + 15)); 196 break; 197 default: 198 DPRINTF(("%s: unknown type (%x)\n", __func__, devtype)); 199 rv = 0; 200 romend = 0; 201 } 202 203 if (rv && 204 ca->ca_type.iodc_sv_model == HPPA_FIO_SGC && id == STI_ID_FDDI) { 205 DPRINTF(("%s: not a graphics device\n", __func__)); 206 rv = 0; 207 } 208 209 if (ca->ca_naddrs >= sizeof(ca->ca_addrs) / sizeof(ca->ca_addrs[0])) { 210 printf("sti: address list overflow\n"); 211 return 0; 212 } 213 214 ca->ca_addrs[ca->ca_naddrs].addr = rom; 215 ca->ca_addrs[ca->ca_naddrs].size = sti_rom_size(ca->ca_iot, romh); 216 ca->ca_naddrs++; 217 218 if (!romunmapped) 219 bus_space_unmap(ca->ca_iot, romh, STI_ROMSIZE); 220 return rv; 221} 222 223void 224sti_sgc_attach(device_t parent, device_t self, void *aux) 225{ 226 struct sti_softc *sc = device_private(self); 227 struct confargs *ca = aux; 228 bus_space_handle_t romh; 229 hppa_hpa_t consaddr; 230 int pagezero_cookie; 231 paddr_t rom; 232 uint32_t romlen; 233 int rv; 234 int i; 235 236 pagezero_cookie = hp700_pagezero_map(); 237 consaddr = (hppa_hpa_t)PAGE0->mem_cons.pz_hpa; 238 hp700_pagezero_unmap(pagezero_cookie); 239 240 sc->sc_dev = self; 241 sc->sc_enable_rom = NULL; 242 sc->sc_disable_rom = NULL; 243 244 /* we stashed rom addr/len into the last slot during probe */ 245 rom = ca->ca_addrs[ca->ca_naddrs - 1].addr; 246 romlen = ca->ca_addrs[ca->ca_naddrs - 1].size; 247 248 if ((rv = bus_space_map(ca->ca_iot, rom, romlen, 0, &romh))) { 249 if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) 250 romh = rom; 251 else { 252 aprint_error(": can't map rom space (%d)\n", rv); 253 return; 254 } 255 } 256 257 sc->bases[0] = romh; 258 for (i = 1; i < STI_REGION_MAX; i++) 259 sc->bases[i] = ca->ca_hpa; 260 261#ifdef HP7300LC_CPU 262 /* 263 * PCXL2: enable accel I/O for this space, see PCX-L2 ERS "ACCEL_IO". 264 * "pcxl2_ers.{ps,pdf}", (section / chapter . rel. page / abs. page) 265 * 8.7.4 / 8-12 / 92, 11.3.14 / 11-14 / 122 and 14.8 / 14-5 / 203. 266 */ 267 if (hppa_cpu_info->hci_cputype == hpcxl2 268 && ca->ca_hpa >= PCXL2_ACCEL_IO_START 269 && ca->ca_hpa <= PCXL2_ACCEL_IO_END) 270 eaio_l2(PCXL2_ACCEL_IO_ADDR2MASK(ca->ca_hpa)); 271#endif /* HP7300LC_CPU */ 272 273 if (ca->ca_hpa == consaddr) 274 sc->sc_flags |= STI_CONSOLE; 275 if (sti_attach_common(sc, ca->ca_iot, ca->ca_iot, romh, 276 STI_CODEBASE_PA) == 0) 277 config_interrupts(self, sti_sgc_end_attach); 278} 279 280void 281sti_sgc_end_attach(device_t dev) 282{ 283 struct sti_softc *sc = device_private(dev); 284 285 sti_end_attach(sc); 286} 287