1108768Strhodes/* $NetBSD: gemini_machdep.c,v 1.17 2011/06/30 20:09:24 wiz Exp $ */ 2108768Strhodes 3108768Strhodes/* adapted from: 4108768Strhodes * NetBSD: sdp24xx_machdep.c,v 1.4 2008/08/27 11:03:10 matt Exp 5133338Ssimon */ 6108768Strhodes 7108768Strhodes/* 8108768Strhodes * Machine dependent functions for kernel setup for TI OSK5912 board. 9108768Strhodes * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c 10111447Sru * 11108768Strhodes * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. 12159719Sbrueffer * Written by Hiroyuki Bessho for Genetec Corporation. 13159719Sbrueffer * 14159719Sbrueffer * Redistribution and use in source and binary forms, with or without 15159719Sbrueffer * modification, are permitted provided that the following conditions 16159719Sbrueffer * are met: 17111447Sru * 1. Redistributions of source code must retain the above copyright 18111447Sru * notice, this list of conditions and the following disclaimer. 19159719Sbrueffer * 2. Redistributions in binary form must reproduce the above copyright 20159719Sbrueffer * notice, this list of conditions and the following disclaimer in the 21159719Sbrueffer * documentation and/or other materials provided with the distribution. 22159719Sbrueffer * 3. The name of Genetec Corporation may not be used to endorse or 23159719Sbrueffer * promote products derived from this software without specific prior 24159719Sbrueffer * written permission. 25159719Sbrueffer * 26159719Sbrueffer * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 27108768Strhodes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28108768Strhodes * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29108768Strhodes * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 30108768Strhodes * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31111447Sru * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32108768Strhodes * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33133336Ssimon * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34133336Ssimon * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35133336Ssimon * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36133336Ssimon * POSSIBILITY OF SUCH DAMAGE. 37108768Strhodes * 38133336Ssimon * Copyright (c) 2001 Wasabi Systems, Inc. 39111447Sru * All rights reserved. 40111447Sru * 41111447Sru * Written by Jason R. Thorpe for Wasabi Systems, Inc. 42111447Sru * 43111447Sru * Redistribution and use in source and binary forms, with or without 44111447Sru * modification, are permitted provided that the following conditions 45111447Sru * are met: 46111447Sru * 1. Redistributions of source code must retain the above copyright 47111447Sru * notice, this list of conditions and the following disclaimer. 48111447Sru * 2. Redistributions in binary form must reproduce the above copyright 49108768Strhodes * notice, this list of conditions and the following disclaimer in the 50108768Strhodes * documentation and/or other materials provided with the distribution. 51133336Ssimon * 3. All advertising materials mentioning features or use of this software 52111447Sru * must display the following acknowledgement: 53111447Sru * This product includes software developed for the NetBSD Project by 54111447Sru * Wasabi Systems, Inc. 55111447Sru * 4. The name of Wasabi Systems, Inc. may not be used to endorse 56111447Sru * or promote products derived from this software without specific prior 57111447Sru * written permission. 58108768Strhodes * 59108768Strhodes * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 60108768Strhodes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61108768Strhodes * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62108768Strhodes * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 63108768Strhodes * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64108768Strhodes * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65108768Strhodes * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66111447Sru * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67108768Strhodes * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68108768Strhodes * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69108768Strhodes * POSSIBILITY OF SUCH DAMAGE. 70108768Strhodes * 71111447Sru * Copyright (c) 1997,1998 Mark Brinicombe. 72159773Sbrueffer * Copyright (c) 1997,1998 Causality Limited. 73111447Sru * All rights reserved. 74108768Strhodes * 75108768Strhodes * Redistribution and use in source and binary forms, with or without 76108768Strhodes * modification, are permitted provided that the following conditions 77112626Strhodes * are met: 78 * 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 80 * 2. Redistributions in binary form must reproduce the above copyright 81 * notice, this list of conditions and the following disclaimer in the 82 * documentation and/or other materials provided with the distribution. 83 * 3. All advertising materials mentioning features or use of this software 84 * must display the following acknowledgement: 85 * This product includes software developed by Mark Brinicombe 86 * for the NetBSD Project. 87 * 4. The name of the company nor the name of the author may be used to 88 * endorse or promote products derived from this software without specific 89 * prior written permission. 90 * 91 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 92 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 93 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 94 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 95 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 96 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 101 * SUCH DAMAGE. 102 * 103 * Copyright (c) 2007 Microsoft 104 * All rights reserved. 105 * 106 * Redistribution and use in source and binary forms, with or without 107 * modification, are permitted provided that the following conditions 108 * are met: 109 * 1. Redistributions of source code must retain the above copyright 110 * notice, this list of conditions and the following disclaimer. 111 * 2. Redistributions in binary form must reproduce the above copyright 112 * notice, this list of conditions and the following disclaimer in the 113 * documentation and/or other materials provided with the distribution. 114 * 3. All advertising materials mentioning features or use of this software 115 * must display the following acknowledgement: 116 * This product includes software developed by Microsoft 117 * 118 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 119 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 120 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 121 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, 122 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 123 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 124 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 125 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 126 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 127 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 128 * SUCH DAMAGE. 129 */ 130 131#include <sys/cdefs.h> 132__KERNEL_RCSID(0, "$NetBSD: gemini_machdep.c,v 1.17 2011/06/30 20:09:24 wiz Exp $"); 133 134#include "opt_machdep.h" 135#include "opt_ddb.h" 136#include "opt_kgdb.h" 137#include "opt_ipkdb.h" 138#include "opt_md.h" 139#include "opt_com.h" 140#include "opt_gemini.h" 141#include "geminiwdt.h" 142#include "geminiipm.h" 143 144#include <sys/param.h> 145#include <sys/device.h> 146#include <sys/systm.h> 147#include <sys/kernel.h> 148#include <sys/exec.h> 149#include <sys/proc.h> 150#include <sys/msgbuf.h> 151#include <sys/reboot.h> 152#include <sys/termios.h> 153#include <sys/ksyms.h> 154 155#include <uvm/uvm_extern.h> 156 157#include <sys/conf.h> 158#include <dev/cons.h> 159#include <dev/md.h> 160 161#include <machine/db_machdep.h> 162#include <ddb/db_sym.h> 163#include <ddb/db_extern.h> 164#ifdef KGDB 165#include <sys/kgdb.h> 166#endif 167 168#include <machine/bootconfig.h> 169#include <sys/bus.h> 170#include <machine/cpu.h> 171#include <machine/frame.h> 172#include <arm/armreg.h> 173#include <arm/undefined.h> 174 175#include <arm/arm32/machdep.h> 176 177#include <arm/gemini/gemini_reg.h> 178#include <arm/gemini/gemini_var.h> 179#include <arm/gemini/gemini_wdtvar.h> 180#include <arm/gemini/gemini_com.h> 181#include <arm/gemini/lpc_com.h> 182 183#include <evbarm/gemini/gemini.h> 184 185#if defined(VERBOSE_INIT_ARM) 186# define GEMINI_PUTCHAR(c) gemini_putchar(c) 187# define GEMINI_PUTHEX(n) gemini_puthex(n) 188#else /* VERBOSE_INIT_ARM */ 189# define GEMINI_PUTCHAR(c) 190# define GEMINI_PUTHEX(n) 191#endif /* VERBOSE_INIT_ARM */ 192 193/* 194 * Address to call from cpu_reset() to reset the machine. 195 * This is machine architecture dependent as it varies depending 196 * on where the ROM appears when you turn the MMU off. 197 */ 198 199u_int cpu_reset_address = 0; 200 201/* Define various stack sizes in pages */ 202#define IRQ_STACK_SIZE 1 203#define FIQ_STACK_SIZE 1 204#define ABT_STACK_SIZE 1 205#ifdef IPKDB 206#define UND_STACK_SIZE 2 207#else 208#define UND_STACK_SIZE 1 209#endif 210 211BootConfig bootconfig; /* Boot config storage */ 212char *boot_args = NULL; 213char *boot_file = NULL; 214 215/* Physical address of the beginning of SDRAM. */ 216paddr_t physical_start; 217/* Physical address of the first byte after the end of SDRAM. */ 218paddr_t physical_end; 219 220/* Same things, but for the free (unused by the kernel) memory. */ 221static paddr_t physical_freestart, physical_freeend; 222static u_int free_pages; 223 224/* Physical and virtual addresses for some global pages */ 225pv_addr_t fiqstack; 226pv_addr_t irqstack; 227pv_addr_t undstack; 228pv_addr_t abtstack; 229pv_addr_t kernelstack; /* stack for SVC mode */ 230 231/* Physical address of the message buffer. */ 232paddr_t msgbufphys; 233 234extern u_int data_abort_handler_address; 235extern u_int prefetch_abort_handler_address; 236extern u_int undefined_handler_address; 237extern char KERNEL_BASE_phys[]; 238extern char KERNEL_BASE_virt[]; 239extern char etext[], __data_start[], _edata[], __bss_start[], __bss_end__[]; 240extern char _end[]; 241 242#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 243#define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */ 244#define KERNEL_PT_KERNEL_NUM 4 245#define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM) 246 /* Page tables for mapping kernel VM */ 247#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 248#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 249 250pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 251 252 253#if (NGEMINIIPM > 0) 254pv_addr_t ipmq_pt; /* L2 Page table for mapping IPM queues */ 255#if defined(DEBUG) || 1 256unsigned long gemini_ipmq_pbase = GEMINI_IPMQ_PBASE; 257unsigned long gemini_ipmq_vbase = GEMINI_IPMQ_VBASE; 258#endif /* DEBUG */ 259#endif /* NGEMINIIPM > 0 */ 260 261 262/* 263 * Macros to translate between physical and virtual for a subset of the 264 * kernel address space. *Not* for general use. 265 */ 266#define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys) 267 268#define KERN_VTOPHYS(va) \ 269 ((paddr_t)((vaddr_t)va - KERNEL_BASE + GEMINI_DRAM_BASE)) 270#define KERN_PHYSTOV(pa) \ 271 ((vaddr_t)((paddr_t)pa - GEMINI_DRAM_BASE + KERNEL_BASE)) 272 273/* Prototypes */ 274 275void gemini_intr_init(bus_space_tag_t); 276void consinit(void); 277#ifdef KGDB 278static void kgdb_port_init(void); 279#endif 280 281static void setup_real_page_tables(void); 282static void init_clocks(void); 283 284bs_protos(bs_notimpl); 285 286#include "com.h" 287#if NCOM > 0 288#include <dev/ic/comreg.h> 289#include <dev/ic/comvar.h> 290#endif 291 292 293static void gemini_global_reset(void) __attribute__ ((noreturn)); 294static void gemini_cpu1_start(void); 295static void gemini_memchk(void); 296 297static void 298gemini_global_reset(void) 299{ 300#if defined(GEMINI_MASTER) || defined(GEMINI_SINGLE) 301 volatile uint32_t *rp; 302 uint32_t r; 303 304 rp = (volatile uint32_t *) 305 (GEMINI_GLOBAL_VBASE + GEMINI_GLOBAL_RESET_CTL); 306 r = *rp; 307 r |= GLOBAL_RESET_GLOBAL; 308 *rp = r; 309#endif 310 for(;;); 311 /* NOTREACHED */ 312} 313 314static void 315gemini_cpu1_start(void) 316{ 317#ifdef GEMINI_MASTER 318 volatile uint32_t *rp; 319 uint32_t r; 320 321 rp = (volatile uint32_t *) 322 (GEMINI_GLOBAL_VBASE + GEMINI_GLOBAL_RESET_CTL); 323 r = *rp; 324 r &= ~GLOBAL_RESET_CPU1; 325 *rp = r; 326#endif 327} 328 329static void 330gemini_memchk(void) 331{ 332 volatile uint32_t *rp; 333 uint32_t r; 334 uint32_t base; 335 uint32_t size; 336 337 rp = (volatile uint32_t *) 338 (GEMINI_DRAMC_VBASE + GEMINI_DRAMC_RMCR); 339 r = *rp; 340 base = (r & DRAMC_RMCR_RMBAR) >> DRAMC_RMCR_RMBAR_SHFT; 341 size = (r & DRAMC_RMCR_RMSZR) >> DRAMC_RMCR_RMSZR_SHFT; 342#if defined(GEMINI_SINGLE) 343 if (r != 0) 344 panic("%s: RMCR %#x, MEMSIZE %d mismatch\n", 345 __FUNCTION__, r, MEMSIZE); 346#elif defined(GEMINI_MASTER) 347 if (base != MEMSIZE) 348 panic("%s: RMCR %#x, MEMSIZE %d mismatch\n", 349 __FUNCTION__, r, MEMSIZE); 350#elif defined(GEMINI_SLAVE) 351 if (size != MEMSIZE) 352 panic("%s: RMCR %#x, MEMSIZE %d mismatch\n", 353 __FUNCTION__, r, MEMSIZE); 354#endif 355#if defined(VERBOSE_INIT_ARM) || 1 356 printf("DRAM Remap: base=%dMB, size=%dMB\n", base, size); 357#endif 358} 359 360/* 361 * void cpu_reboot(int howto, char *bootstr) 362 * 363 * Reboots the system 364 * 365 * Deal with any syncing, unmounting, dumping and shutdown hooks, 366 * then reset the CPU. 367 */ 368void 369cpu_reboot(int howto, char *bootstr) 370{ 371 extern struct geminitmr_softc *ref_sc; 372 373#ifdef DIAGNOSTIC 374 /* info */ 375 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 376#endif 377 378 /* 379 * If we are still cold then hit the air brakes 380 * and crash to earth fast 381 */ 382 if (cold) { 383 doshutdownhooks(); 384 pmf_system_shutdown(boothowto); 385 printf("The operating system has halted.\n"); 386 printf("Please press any key to reboot.\n\n"); 387 cngetc(); 388 printf("rebooting...\n"); 389 if (ref_sc != NULL) 390 delay(2000); /* cnflush(); */ 391 gemini_global_reset(); 392 /*NOTREACHED*/ 393 } 394 395 /* Disable console buffering */ 396 cnpollc(1); 397 398 /* 399 * If RB_NOSYNC was not specified sync the discs. 400 * Note: Unless cold is set to 1 here, syslogd will die during the 401 * unmount. It looks like syslogd is getting woken up only to find 402 * that it cannot page part of the binary in as the filesystem has 403 * been unmounted. 404 */ 405 if (!(howto & RB_NOSYNC)) 406 bootsync(); 407 408 /* Say NO to interrupts */ 409 splhigh(); 410 411 /* Do a dump if requested. */ 412 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 413 dumpsys(); 414 415 /* Run any shutdown hooks */ 416 doshutdownhooks(); 417 418 pmf_system_shutdown(boothowto); 419 420 /* Make sure IRQ's are disabled */ 421 IRQdisable; 422 423 if (howto & RB_HALT) { 424 printf("The operating system has halted.\n"); 425 printf("Please press any key to reboot.\n\n"); 426 cngetc(); 427 } 428 429 printf("rebooting...\n"); 430 if (ref_sc != NULL) 431 delay(2000); /* cnflush(); */ 432 gemini_global_reset(); 433 /*NOTREACHED*/ 434} 435 436/* 437 * Static device mappings. These peripheral registers are mapped at 438 * fixed virtual addresses very early in initarm() so that we can use 439 * them while booting the kernel, and stay at the same address 440 * throughout whole kernel's life time. 441 * 442 * We use this table twice; once with bootstrap page table, and once 443 * with kernel's page table which we build up in initarm(). 444 * 445 * Since we map these registers into the bootstrap page table using 446 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 447 * registers segment-aligned and segment-rounded in order to avoid 448 * using the 2nd page tables. 449 */ 450 451#define _A(a) ((a) & ~L1_S_OFFSET) 452#define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 453 454static const struct pmap_devmap devmap[] = { 455 /* Global regs */ 456 { 457 .pd_va = _A(GEMINI_GLOBAL_VBASE), 458 .pd_pa = _A(GEMINI_GLOBAL_BASE), 459 .pd_size = _S(L1_S_SIZE), 460 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 461 .pd_cache = PTE_NOCACHE 462 }, 463 464 /* Watchdog */ 465 { 466 .pd_va = _A(GEMINI_WATCHDOG_VBASE), 467 .pd_pa = _A(GEMINI_WATCHDOG_BASE), 468 .pd_size = _S(L1_S_SIZE), 469 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 470 .pd_cache = PTE_NOCACHE 471 }, 472 473 /* UART */ 474 { 475 .pd_va = _A(GEMINI_UART_VBASE), 476 .pd_pa = _A(GEMINI_UART_BASE), 477 .pd_size = _S(L1_S_SIZE), 478 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 479 .pd_cache = PTE_NOCACHE 480 }, 481 482 /* LPCHC */ 483 { 484 .pd_va = _A(GEMINI_LPCHC_VBASE), 485 .pd_pa = _A(GEMINI_LPCHC_BASE), 486 .pd_size = _S(L1_S_SIZE), 487 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 488 .pd_cache = PTE_NOCACHE 489 }, 490 491 /* LPCIO */ 492 { 493 .pd_va = _A(GEMINI_LPCIO_VBASE), 494 .pd_pa = _A(GEMINI_LPCIO_BASE), 495 .pd_size = _S(L1_S_SIZE), 496 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 497 .pd_cache = PTE_NOCACHE 498 }, 499 500 /* Timers */ 501 { 502 .pd_va = _A(GEMINI_TIMER_VBASE), 503 .pd_pa = _A(GEMINI_TIMER_BASE), 504 .pd_size = _S(L1_S_SIZE), 505 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 506 .pd_cache = PTE_NOCACHE 507 }, 508 509 /* DRAM Controller */ 510 { 511 .pd_va = _A(GEMINI_DRAMC_VBASE), 512 .pd_pa = _A(GEMINI_DRAMC_BASE), 513 .pd_size = _S(L1_S_SIZE), 514 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 515 .pd_cache = PTE_NOCACHE 516 }, 517 518#if defined(MEMORY_DISK_DYNAMIC) 519 /* Ramdisk */ 520 { 521 .pd_va = _A(GEMINI_RAMDISK_VBASE), 522 .pd_pa = _A(GEMINI_RAMDISK_PBASE), 523 .pd_size = _S(GEMINI_RAMDISK_SIZE), 524 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 525 .pd_cache = PTE_NOCACHE 526 }, 527#endif 528 529 {0} /* list terminator */ 530}; 531 532#undef _A 533#undef _S 534 535#ifdef DDB 536static void gemini_db_trap(int where) 537{ 538#if NGEMINIWDT > 0 539 static int oldwatchdogstate; 540 541 if (where) { 542 oldwatchdogstate = geminiwdt_enable(0); 543 } else { 544 geminiwdt_enable(oldwatchdogstate); 545 } 546#endif 547} 548#endif 549 550#if defined(VERBOSE_INIT_ARM) || 1 551void gemini_putchar(char c); 552void 553gemini_putchar(char c) 554{ 555 unsigned char *com0addr = (unsigned char *)GEMINI_UART_VBASE; 556 int timo = 150000; 557 558 while ((com0addr[COM_REG_LSR * 4] & LSR_TXRDY) == 0) 559 if (--timo == 0) 560 break; 561 562 com0addr[COM_REG_TXDATA] = c; 563 564 while ((com0addr[COM_REG_LSR * 4] & LSR_TSRE) == 0) 565 if (--timo == 0) 566 break; 567} 568 569void gemini_puthex(unsigned int); 570void 571gemini_puthex(unsigned int val) 572{ 573 char hexc[] = "0123456789abcdef"; 574 575 gemini_putchar('0'); 576 gemini_putchar('x'); 577 gemini_putchar(hexc[(val >> 28) & 0xf]); 578 gemini_putchar(hexc[(val >> 24) & 0xf]); 579 gemini_putchar(hexc[(val >> 20) & 0xf]); 580 gemini_putchar(hexc[(val >> 16) & 0xf]); 581 gemini_putchar(hexc[(val >> 12) & 0xf]); 582 gemini_putchar(hexc[(val >> 8) & 0xf]); 583 gemini_putchar(hexc[(val >> 4) & 0xf]); 584 gemini_putchar(hexc[(val >> 0) & 0xf]); 585} 586#endif /* VERBOSE_INIT_ARM */ 587 588/* 589 * u_int initarm(...) 590 * 591 * Initial entry point on startup. This gets called before main() is 592 * entered. 593 * It should be responsible for setting up everything that must be 594 * in place when main is called. 595 * This includes 596 * Taking a copy of the boot configuration structure. 597 * Initialising the physical console so characters can be printed. 598 * Setting up page tables for the kernel 599 * Relocating the kernel to the bottom of physical memory 600 */ 601u_int 602initarm(void *arg) 603{ 604 GEMINI_PUTCHAR('0'); 605 606 /* 607 * start cpu#1 now 608 */ 609 gemini_cpu1_start(); 610 611 /* 612 * When we enter here, we are using a temporary first level 613 * translation table with section entries in it to cover the OBIO 614 * peripherals and SDRAM. The temporary first level translation table 615 * is at the end of SDRAM. 616 */ 617 618 /* Heads up ... Setup the CPU / MMU / TLB functions. */ 619 GEMINI_PUTCHAR('1'); 620 if (set_cpufuncs()) 621 panic("cpu not recognized!"); 622 623 GEMINI_PUTCHAR('2'); 624 init_clocks(); 625 GEMINI_PUTCHAR('3'); 626 627 /* The console is going to try to map things. Give pmap a devmap. */ 628 pmap_devmap_register(devmap); 629 GEMINI_PUTCHAR('4'); 630 consinit(); 631 GEMINI_PUTCHAR('5'); 632#ifdef KGDB 633 kgdb_port_init(); 634#endif 635 636 /* Talk to the user */ 637 printf("\nNetBSD/evbarm (gemini) booting ...\n"); 638 639#ifdef BOOT_ARGS 640 char mi_bootargs[] = BOOT_ARGS; 641 parse_mi_bootargs(mi_bootargs); 642#endif 643 644#ifdef VERBOSE_INIT_ARM 645 printf("initarm: Configuring system ...\n"); 646#endif 647 648 /* 649 * Set up the variables that define the availability of physical 650 * memory. 651 */ 652 gemini_memchk(); 653 physical_start = GEMINI_DRAM_BASE; 654#define MEMSIZE_BYTES (MEMSIZE * 1024 * 1024) 655 physical_end = (physical_start & ~(0x400000-1)) + MEMSIZE_BYTES; 656 physmem = (physical_end - physical_start) / PAGE_SIZE; 657 658 /* Fake bootconfig structure for the benefit of pmap.c. */ 659 bootconfig.dramblocks = 1; 660 bootconfig.dram[0].address = physical_start; 661 bootconfig.dram[0].pages = physmem; 662 663 /* 664 * Our kernel is at the beginning of memory, so set our free space to 665 * all the memory after the kernel. 666 */ 667 physical_freestart = KERN_VTOPHYS(round_page((vaddr_t) _end)); 668 physical_freeend = physical_end; 669 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 670 671 /* 672 * This is going to do all the hard work of setting up the first and 673 * and second level page tables. Pages of memory will be allocated 674 * and mapped for other structures that are required for system 675 * operation. When it returns, physical_freestart and free_pages will 676 * have been updated to reflect the allocations that were made. In 677 * addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack, 678 * abtstack, undstack, kernelstack, msgbufphys will be set to point to 679 * the memory that was allocated for them. 680 */ 681 setup_real_page_tables(); 682 683 /* 684 * Moved from cpu_startup() as data_abort_handler() references 685 * this during uvm init. 686 */ 687 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va); 688 689#ifdef VERBOSE_INIT_ARM 690 printf("bootstrap done.\n"); 691#endif 692 693 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 694 695 /* 696 * Pages were allocated during the secondary bootstrap for the 697 * stacks for different CPU modes. 698 * We must now set the r13 registers in the different CPU modes to 699 * point to these stacks. 700 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 701 * of the stack memory. 702 */ 703#ifdef VERBOSE_INIT_ARM 704 printf("init subsystems: stacks "); 705#endif 706 707 set_stackptr(PSR_FIQ32_MODE, fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE); 708 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 709 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 710 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 711 712 /* 713 * Well we should set a data abort handler. 714 * Once things get going this will change as we will need a proper 715 * handler. 716 * Until then we will use a handler that just panics but tells us 717 * why. 718 * Initialisation of the vectors will just panic on a data abort. 719 * This just fills in a slightly better one. 720 */ 721#ifdef VERBOSE_INIT_ARM 722 printf("vectors "); 723#endif 724 data_abort_handler_address = (u_int)data_abort_handler; 725 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 726 undefined_handler_address = (u_int)undefinedinstruction_bounce; 727 728 /* Initialise the undefined instruction handlers */ 729#ifdef VERBOSE_INIT_ARM 730 printf("undefined "); 731#endif 732 undefined_init(); 733 734 /* Load memory into UVM. */ 735#ifdef VERBOSE_INIT_ARM 736 printf("page "); 737#endif 738 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 739 740#if (GEMINI_RAM_RESV_PBASE != 0) 741 uvm_page_physload(atop(physical_freestart), atop(GEMINI_RAM_RESV_PBASE), 742 atop(physical_freestart), atop(GEMINI_RAM_RESV_PBASE), 743 VM_FREELIST_DEFAULT); 744 uvm_page_physload(atop(GEMINI_RAM_RESV_PEND), atop(physical_freeend), 745 atop(GEMINI_RAM_RESV_PEND), atop(physical_freeend), 746 VM_FREELIST_DEFAULT); 747#else 748 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 749 atop(physical_freestart), atop(physical_freeend), 750 VM_FREELIST_DEFAULT); 751#endif 752 uvm_page_physload(atop(GEMINI_DRAM_BASE), atop(KERNEL_BASE_phys), 753 atop(GEMINI_DRAM_BASE), atop(KERNEL_BASE_phys), 754 VM_FREELIST_DEFAULT); 755 756 /* Boot strap pmap telling it where the kernel page table is */ 757#ifdef VERBOSE_INIT_ARM 758 printf("pmap "); 759#endif 760 pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE); 761 762#ifdef VERBOSE_INIT_ARM 763 printf("done.\n"); 764#endif 765 766#ifdef IPKDB 767 /* Initialise ipkdb */ 768 ipkdb_init(); 769 if (boothowto & RB_KDB) 770 ipkdb_connect(0); 771#endif 772 773#if defined(MEMORY_DISK_DYNAMIC) 774 md_root_setconf((char *)GEMINI_RAMDISK_VBASE, GEMINI_RAMDISK_SIZE); 775#endif 776 777#ifdef KGDB 778 if (boothowto & RB_KDB) { 779 kgdb_debug_init = 1; 780 kgdb_connect(1); 781 } 782#endif 783 784#ifdef DDB 785 db_trap_callback = gemini_db_trap; 786 db_machine_init(); 787 788 /* Firmware doesn't load symbols. */ 789 ddb_init(0, NULL, NULL); 790 791 if (boothowto & RB_KDB) 792 Debugger(); 793#endif 794 printf("initarm done.\n"); 795 796 /* We return the new stack pointer address */ 797 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 798} 799 800static void 801init_clocks(void) 802{ 803} 804 805#ifndef CONSADDR 806#error Specify the address of the console UART with the CONSADDR option. 807#endif 808#ifndef CONSPEED 809#define CONSPEED 19200 810#endif 811#ifndef CONMODE 812#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 813#endif 814 815static const bus_addr_t consaddr = CONSADDR; 816static const int conspeed = CONSPEED; 817static const int conmode = CONMODE; 818 819#if CONSADDR==0x42000000 820/* 821 * console initialization for obio com console 822 */ 823void 824consinit(void) 825{ 826 static int consinit_called = 0; 827 828 if (consinit_called != 0) 829 return; 830 consinit_called = 1; 831 832 if (comcnattach(&gemini_a4x_bs_tag, consaddr, conspeed, 833 GEMINI_COM_FREQ, COM_TYPE_16550_NOERS, conmode)) 834 panic("Serial console can not be initialized."); 835} 836 837#elif CONSADDR==0x478003f8 838# include <arm/gemini/gemini_lpcvar.h> 839/* 840 * console initialization for lpc com console 841 */ 842void 843consinit(void) 844{ 845 static int consinit_called = 0; 846 bus_space_tag_t iot = &gemini_bs_tag; 847 bus_space_handle_t lpchc_ioh; 848 bus_space_handle_t lpcio_ioh; 849 bus_size_t sz = L1_S_SIZE; 850 gemini_lpc_softc_t lpcsoftc; 851 gemini_lpc_bus_ops_t *ops; 852 void *lpctag = &lpcsoftc; 853 uint32_t r; 854 extern gemini_lpc_bus_ops_t gemini_lpc_bus_ops; 855 856 ops = &gemini_lpc_bus_ops; 857 858 if (consinit_called != 0) 859 return; 860 consinit_called = 1; 861 862 if (bus_space_map(iot, GEMINI_LPCHC_BASE, sz, 0, &lpchc_ioh)) 863 panic("consinit: LPCHC can not be mapped."); 864 865 if (bus_space_map(iot, GEMINI_LPCIO_BASE, sz, 0, &lpcio_ioh)) 866 panic("consinit: LPCIO can not be mapped."); 867 868 /* enable the LPC bus */ 869 r = bus_space_read_4(iot, lpchc_ioh, GEMINI_LPCHC_CSR); 870 r |= LPCHC_CSR_BEN; 871 bus_space_write_4(iot, lpchc_ioh, GEMINI_LPCHC_CSR, r); 872 873 memset(&lpcsoftc, 0, sizeof(lpcsoftc)); 874 lpcsoftc.sc_iot = iot; 875 lpcsoftc.sc_ioh = lpcio_ioh; 876 877 /* activate Serial Port 1 */ 878 (*ops->lpc_pnp_enter)(lpctag); 879 (*ops->lpc_pnp_write)(lpctag, 1, 0x30, 0x01); 880 (*ops->lpc_pnp_exit)(lpctag); 881 882 if (comcnattach(iot, consaddr, conspeed, 883 IT8712F_COM_FREQ, COM_TYPE_NORMAL, conmode)) { 884 panic("Serial console can not be initialized."); 885 } 886 887 bus_space_unmap(iot, lpcio_ioh, sz); 888 bus_space_unmap(iot, lpchc_ioh, sz); 889} 890#else 891# error unknown console 892#endif 893 894#ifdef KGDB 895#ifndef KGDB_DEVADDR 896#error Specify the address of the kgdb UART with the KGDB_DEVADDR option. 897#endif 898#ifndef KGDB_DEVRATE 899#define KGDB_DEVRATE 19200 900#endif 901 902#ifndef KGDB_DEVMODE 903#define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 904#endif 905static const vaddr_t comkgdbaddr = KGDB_DEVADDR; 906static const int comkgdbspeed = KGDB_DEVRATE; 907static const int comkgdbmode = KGDB_DEVMODE; 908 909void 910static kgdb_port_init(void) 911{ 912 static int kgdbsinit_called = 0; 913 914 if (kgdbsinit_called != 0) 915 return; 916 917 kgdbsinit_called = 1; 918 919 bus_space_handle_t bh; 920 if (bus_space_map(&gemini_a4x_bs_tag, comkgdbaddr, 921 GEMINI_UART_SIZE, 0, &bh)) 922 panic("kgdb port can not be mapped."); 923 924 if (com_kgdb_attach(&gemini_a4x_bs_tag, comkgdbaddr, comkgdbspeed, 925 GEMINI_UART_SIZE, COM_TYPE_16550_NOERS, comkgdbmode)) 926 panic("KGDB uart can not be initialized."); 927 928 bus_space_unmap(&gemini_a4x_bs_tag, bh, GEMINI_UART_SIZE); 929} 930#endif 931 932static void 933setup_real_page_tables(void) 934{ 935 /* 936 * We need to allocate some fixed page tables to get the kernel going. 937 * 938 * We are going to allocate our bootstrap pages from the beginning of 939 * the free space that we just calculated. We allocate one page 940 * directory and a number of page tables and store the physical 941 * addresses in the kernel_pt_table array. 942 * 943 * The kernel page directory must be on a 16K boundary. The page 944 * tables must be on 4K boundaries. What we do is allocate the 945 * page directory on the first 16K boundary that we encounter, and 946 * the page tables on 4K boundaries otherwise. Since we allocate 947 * at least 3 L2 page tables, we are guaranteed to encounter at 948 * least one 16K aligned region. 949 */ 950 951#ifdef VERBOSE_INIT_ARM 952 printf("Allocating page tables\n"); 953#endif 954 955 /* 956 * Define a macro to simplify memory allocation. As we allocate the 957 * memory, make sure that we don't walk over our temporary first level 958 * translation table. 959 */ 960#define valloc_pages(var, np) \ 961 (var).pv_pa = physical_freestart; \ 962 physical_freestart += ((np) * PAGE_SIZE); \ 963 if (physical_freestart > (physical_freeend - L1_TABLE_SIZE)) \ 964 panic("initarm: out of memory"); \ 965 free_pages -= (np); \ 966 (var).pv_va = KERN_PHYSTOV((var).pv_pa); \ 967 memset((char *)(var).pv_va, 0, ((np) * PAGE_SIZE)); 968 969 int loop, pt_index; 970 971 pt_index = 0; 972 kernel_l1pt.pv_pa = 0; 973 kernel_l1pt.pv_va = 0; 974#ifdef VERBOSE_INIT_ARM 975 printf("%s: physical_freestart %#lx\n", __func__, physical_freestart); 976#endif 977 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 978 /* Are we 16KB aligned for an L1 ? */ 979 if ((physical_freestart & (L1_TABLE_SIZE - 1)) == 0 980 && kernel_l1pt.pv_pa == 0) { 981 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 982 } else { 983 valloc_pages(kernel_pt_table[pt_index], 984 L2_TABLE_SIZE / PAGE_SIZE); 985 ++pt_index; 986 } 987 } 988 989#if (NGEMINIIPM > 0) 990 valloc_pages(ipmq_pt, L2_TABLE_SIZE / PAGE_SIZE); 991#endif 992 993#ifdef VERBOSE_INIT_ARM 994 pt_index=0; 995 printf("%s: kernel_l1pt: %#lx:%#lx\n", 996 __func__, kernel_l1pt.pv_va, kernel_l1pt.pv_pa); 997 printf("%s: kernel_pt_table:\n", __func__); 998 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 999 printf("\t%#lx:%#lx\n", kernel_pt_table[pt_index].pv_va, 1000 kernel_pt_table[pt_index].pv_pa); 1001 ++pt_index; 1002 } 1003#if (NGEMINIIPM > 0) 1004 printf("%s: ipmq_pt:\n", __func__); 1005 printf("\t%#lx:%#lx\n", ipmq_pt.pv_va, ipmq_pt.pv_pa); 1006#endif 1007#endif 1008 1009 /* This should never be able to happen but better confirm that. */ 1010 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 1011 panic("initarm: Failed to align the kernel page directory"); 1012 1013 /* 1014 * Allocate a page for the system page mapped to V0x00000000 1015 * This page will just contain the system vectors and can be 1016 * shared by all processes. 1017 */ 1018 valloc_pages(systempage, 1); 1019 systempage.pv_va = ARM_VECTORS_HIGH; 1020 1021 /* Allocate stacks for all modes */ 1022 valloc_pages(fiqstack, FIQ_STACK_SIZE); 1023 valloc_pages(irqstack, IRQ_STACK_SIZE); 1024 valloc_pages(abtstack, ABT_STACK_SIZE); 1025 valloc_pages(undstack, UND_STACK_SIZE); 1026 valloc_pages(kernelstack, UPAGES); 1027 1028 /* Allocate the message buffer. */ 1029 pv_addr_t msgbuf; 1030 int msgbuf_pgs = round_page(MSGBUFSIZE) / PAGE_SIZE; 1031 valloc_pages(msgbuf, msgbuf_pgs); 1032 msgbufphys = msgbuf.pv_pa; 1033 1034 /* 1035 * Ok we have allocated physical pages for the primary kernel 1036 * page tables 1037 */ 1038 1039#ifdef VERBOSE_INIT_ARM 1040 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 1041#endif 1042 1043 /* 1044 * Now we start construction of the L1 page table 1045 * We start by mapping the L2 page tables into the L1. 1046 * This means that we can replace L1 mappings later on if necessary 1047 */ 1048 vaddr_t l1_va = kernel_l1pt.pv_va; 1049 paddr_t l1_pa = kernel_l1pt.pv_pa; 1050 1051 /* Map the L2 pages tables in the L1 page table */ 1052 pmap_link_l2pt(l1_va, ARM_VECTORS_HIGH & ~(0x00400000 - 1), 1053 &kernel_pt_table[KERNEL_PT_SYS]); 1054 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 1055 pmap_link_l2pt(l1_va, KERNEL_BASE + loop * 0x00400000, 1056 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 1057 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 1058 pmap_link_l2pt(l1_va, KERNEL_VM_BASE + loop * 0x00400000, 1059 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 1060 1061 /* update the top of the kernel VM */ 1062 pmap_curmaxkvaddr = 1063 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 1064 1065#if (NGEMINIIPM > 0) 1066printf("%s:%d: pmap_link_l2pt ipmq_pt\n", __FUNCTION__, __LINE__); 1067 pmap_link_l2pt(l1_va, GEMINI_IPMQ_VBASE, &ipmq_pt); 1068#endif 1069 1070#ifdef VERBOSE_INIT_ARM 1071 printf("Mapping kernel\n"); 1072#endif 1073 1074 /* Now we fill in the L2 pagetable for the kernel static code/data */ 1075#define round_L_page(x) (((x) + L2_L_OFFSET) & L2_L_FRAME) 1076 size_t textsize = round_L_page(etext - KERNEL_BASE_virt); 1077 size_t totalsize = round_L_page(_end - KERNEL_BASE_virt); 1078 /* offset of kernel in RAM */ 1079 u_int offset = (u_int)KERNEL_BASE_virt - KERNEL_BASE; 1080 1081#ifdef DDB 1082 /* Map text section read-write. */ 1083 offset += pmap_map_chunk(l1_va, 1084 (vaddr_t)KERNEL_BASE + offset, 1085 physical_start + offset, textsize, 1086 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, 1087 PTE_CACHE); 1088#else 1089 /* Map text section read-only. */ 1090 offset += pmap_map_chunk(l1_va, 1091 (vaddr_t)KERNEL_BASE + offset, 1092 physical_start + offset, textsize, 1093 VM_PROT_READ|VM_PROT_EXECUTE, PTE_CACHE); 1094#endif 1095 /* Map data and bss sections read-write. */ 1096 offset += pmap_map_chunk(l1_va, 1097 (vaddr_t)KERNEL_BASE + offset, 1098 physical_start + offset, totalsize - textsize, 1099 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1100 1101#ifdef VERBOSE_INIT_ARM 1102 printf("Constructing L2 page tables\n"); 1103#endif 1104 1105 /* Map the stack pages */ 1106 pmap_map_chunk(l1_va, fiqstack.pv_va, fiqstack.pv_pa, 1107 FIQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1108 pmap_map_chunk(l1_va, irqstack.pv_va, irqstack.pv_pa, 1109 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1110 pmap_map_chunk(l1_va, abtstack.pv_va, abtstack.pv_pa, 1111 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1112 pmap_map_chunk(l1_va, undstack.pv_va, undstack.pv_pa, 1113 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1114 pmap_map_chunk(l1_va, kernelstack.pv_va, kernelstack.pv_pa, 1115 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 1116 1117 pmap_map_chunk(l1_va, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 1118 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 1119 1120 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 1121 pmap_map_chunk(l1_va, kernel_pt_table[loop].pv_va, 1122 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 1123 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1124 } 1125 1126 /* Map the vector page. */ 1127 pmap_map_entry(l1_va, ARM_VECTORS_HIGH, systempage.pv_pa, 1128 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1129 1130#if (NGEMINIIPM > 0) 1131 /* Map the IPM queue l2pt */ 1132 pmap_map_chunk(l1_va, ipmq_pt.pv_va, ipmq_pt.pv_pa, 1133 L2_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1134 1135 /* Map the IPM queue pages */ 1136 pmap_map_chunk(l1_va, GEMINI_IPMQ_VBASE, GEMINI_IPMQ_PBASE, 1137 GEMINI_IPMQ_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 1138 1139#ifdef GEMINI_SLAVE 1140 /* 1141 * Map all memory, incluuding that owned by other core 1142 * take into account the RAM remap, so view in this region 1143 * is consistent with MASTER 1144 */ 1145 pmap_map_chunk(l1_va, 1146 GEMINI_ALLMEM_VBASE, 1147 GEMINI_ALLMEM_PBASE + ((GEMINI_ALLMEM_SIZE - MEMSIZE) * 1024 * 1024), 1148 (GEMINI_ALLMEM_SIZE - MEMSIZE) * 1024 * 1024, 1149 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1150 pmap_map_chunk(l1_va, 1151 GEMINI_ALLMEM_VBASE + GEMINI_BUSBASE * 1024 * 1024, 1152 GEMINI_ALLMEM_PBASE, 1153 (MEMSIZE * 1024 * 1024), 1154 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1155#else 1156 /* Map all memory, incluuding that owned by other core */ 1157 pmap_map_chunk(l1_va, GEMINI_ALLMEM_VBASE, GEMINI_ALLMEM_PBASE, 1158 GEMINI_ALLMEM_SIZE * 1024 * 1024, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1159#endif /* GEMINI_SLAVE */ 1160#endif /* NGEMINIIPM */ 1161 1162 /* 1163 * Map integrated peripherals at same address in first level page 1164 * table so that we can continue to use console. 1165 */ 1166 pmap_devmap_bootstrap(l1_va, devmap); 1167 1168 1169#ifdef VERBOSE_INIT_ARM 1170 /* Tell the user about where all the bits and pieces live. */ 1171 printf("%22s Physical Virtual Num\n", " "); 1172 printf("%22s Starting Ending Starting Ending Pages\n", " "); 1173 1174 static const char mem_fmt[] = 1175 "%20s: 0x%08lx 0x%08lx 0x%08lx 0x%08lx %d\n"; 1176 static const char mem_fmt_nov[] = 1177 "%20s: 0x%08lx 0x%08lx %d\n"; 1178 1179 printf(mem_fmt, "SDRAM", physical_start, physical_end-1, 1180 KERN_PHYSTOV(physical_start), KERN_PHYSTOV(physical_end-1), 1181 physmem); 1182 printf(mem_fmt, "text section", 1183 KERN_VTOPHYS(KERNEL_BASE_virt), KERN_VTOPHYS(etext-1), 1184 (vaddr_t)KERNEL_BASE_virt, (vaddr_t)etext-1, 1185 (int)(textsize / PAGE_SIZE)); 1186 printf(mem_fmt, "data section", 1187 KERN_VTOPHYS(__data_start), KERN_VTOPHYS(_edata), 1188 (vaddr_t)__data_start, (vaddr_t)_edata, 1189 (int)((round_page((vaddr_t)_edata) 1190 - trunc_page((vaddr_t)__data_start)) / PAGE_SIZE)); 1191 printf(mem_fmt, "bss section", 1192 KERN_VTOPHYS(__bss_start), KERN_VTOPHYS(__bss_end__), 1193 (vaddr_t)__bss_start, (vaddr_t)__bss_end__, 1194 (int)((round_page((vaddr_t)__bss_end__) 1195 - trunc_page((vaddr_t)__bss_start)) / PAGE_SIZE)); 1196 printf(mem_fmt, "L1 page directory", 1197 kernel_l1pt.pv_pa, kernel_l1pt.pv_pa + L1_TABLE_SIZE - 1, 1198 kernel_l1pt.pv_va, kernel_l1pt.pv_va + L1_TABLE_SIZE - 1, 1199 L1_TABLE_SIZE / PAGE_SIZE); 1200 printf(mem_fmt, "Exception Vectors", 1201 systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1, 1202 (vaddr_t)ARM_VECTORS_HIGH, (vaddr_t)ARM_VECTORS_HIGH + PAGE_SIZE - 1, 1203 1); 1204 printf(mem_fmt, "FIQ stack", 1205 fiqstack.pv_pa, fiqstack.pv_pa + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 1206 fiqstack.pv_va, fiqstack.pv_va + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 1207 FIQ_STACK_SIZE); 1208 printf(mem_fmt, "IRQ stack", 1209 irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 1210 irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 1211 IRQ_STACK_SIZE); 1212 printf(mem_fmt, "ABT stack", 1213 abtstack.pv_pa, abtstack.pv_pa + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 1214 abtstack.pv_va, abtstack.pv_va + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 1215 ABT_STACK_SIZE); 1216 printf(mem_fmt, "UND stack", 1217 undstack.pv_pa, undstack.pv_pa + (UND_STACK_SIZE * PAGE_SIZE) - 1, 1218 undstack.pv_va, undstack.pv_va + (UND_STACK_SIZE * PAGE_SIZE) - 1, 1219 UND_STACK_SIZE); 1220 printf(mem_fmt, "SVC stack", 1221 kernelstack.pv_pa, kernelstack.pv_pa + (UPAGES * PAGE_SIZE) - 1, 1222 kernelstack.pv_va, kernelstack.pv_va + (UPAGES * PAGE_SIZE) - 1, 1223 UPAGES); 1224 printf(mem_fmt_nov, "Message Buffer", 1225 msgbufphys, msgbufphys + msgbuf_pgs * PAGE_SIZE - 1, msgbuf_pgs); 1226 printf(mem_fmt, "Free Memory", physical_freestart, physical_freeend-1, 1227 KERN_PHYSTOV(physical_freestart), KERN_PHYSTOV(physical_freeend-1), 1228 free_pages); 1229#endif 1230 1231 /* 1232 * Now we have the real page tables in place so we can switch to them. 1233 * Once this is done we will be running with the REAL kernel page 1234 * tables. 1235 */ 1236 1237 /* Switch tables */ 1238#ifdef VERBOSE_INIT_ARM 1239 printf("switching to new L1 page table @%#lx...", l1_pa); 1240#endif 1241 1242 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 1243 cpu_setttb(l1_pa); 1244 cpu_tlb_flushID(); 1245 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 1246 1247#ifdef VERBOSE_INIT_ARM 1248 printf("OK.\n"); 1249#endif 1250} 1251