1/*$NetBSD: at91tctmr.c,v 1.5 2011/07/01 19:31:17 dyoung Exp $*/
2
3/*
4 * AT91 Timer Counter (TC) based clock functions
5 * Copyright (c) 2007, Embedtronics Oy
6 * All rights reserved.
7 *
8 * Based on vx115_clk.c,
9 * Copyright (c) 2006, Jon Sevy <jsevy@cs.drexel.edu>
10 *
11 * Based on epclk.c
12 * Copyright (c) 2004 Jesse Off
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 *    notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 *    notice, this list of conditions and the following disclaimer in the
22 *    documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37/*
38 * Driver for the AT91RM9200 clock tick.
39 * We use Timer 1 for the system clock
40 */
41
42#include <sys/cdefs.h>
43__KERNEL_RCSID(0, "$NetBSD: at91tctmr.c,v 1.5 2011/07/01 19:31:17 dyoung Exp $");
44
45#include <sys/types.h>
46#include <sys/param.h>
47#include <sys/systm.h>
48#include <sys/kernel.h>
49#include <sys/time.h>
50#include <sys/timetc.h>
51#include <sys/device.h>
52
53#include <dev/clock_subr.h>
54
55#include <sys/bus.h>
56#include <machine/intr.h>
57
58#include <arm/cpufunc.h>
59#include <arm/at91/at91reg.h>
60#include <arm/at91/at91var.h>
61#include <arm/at91/at91tcreg.h>
62
63#include <opt_hz.h>     /* for HZ */
64
65
66#define DEBUG_CLK
67#ifdef DEBUG_CLK
68#define DPRINTF(fmt...)  printf(fmt)
69#else
70#define DPRINTF(fmt...)
71#endif
72
73
74static int at91tctmr_match(device_t, cfdata_t, void *);
75static void at91tctmr_attach(device_t, device_t, void *);
76
77void rtcinit(void);
78
79/* callback functions for intr_functions */
80static int at91tctmr_intr(void* arg);
81
82struct at91tctmr_softc {
83	device_t	sc_dev;
84	u_char		*sc_addr;
85	int		sc_pid;
86	int		sc_initialized;
87	uint32_t	sc_timerclock;
88	uint32_t	sc_divider;
89	uint32_t	sc_usec_per_tick;
90};
91
92static struct at91tctmr_softc *at91tctmr_sc = NULL;
93#if 0
94static struct timeval lasttv;
95#endif
96
97
98
99/* Match value for clock timer; running at master clock, want HZ ticks per second  */
100/* NOTE: don't change there without visiting the functions below which      */
101/* convert between timer counts and microseconds                            */
102
103static inline uint32_t
104at91tctmr_count_to_usec(struct at91tctmr_softc *sc, uint32_t count)
105{
106    uint64_t tmp;
107
108    tmp = count;
109    tmp *= 1000000U;
110
111    return (tmp / sc->sc_timerclock);
112}
113
114#if 0
115/* This may only be called when overflow is avoided; typically, */
116/* it will be used when usec < USEC_PER_TICK              */
117static uint32_t
118usec_to_timer_count(uint32_t usec)
119{
120    uint32_t result;
121
122    /* convert specified number of usec to timer ticks, and round up */
123    result = (AT91_SCLK * usec) / 1000000;
124
125    if ((result * 1000000) != (usec * AT91_SCLK))
126    {
127        /* round up */
128        result += 1;
129    }
130
131    return result;
132
133}
134#endif
135
136/* macros to simplify writing to the timer controller */
137static inline u_int32_t
138READ_TC(struct at91tctmr_softc *sc, uint offset)
139{
140	volatile u_int32_t *addr = (void*)(sc->sc_addr + offset);
141	return *addr;
142}
143
144//bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset)
145static inline void
146WRITE_TC(struct at91tctmr_softc *sc, uint offset, u_int32_t value)
147{
148	volatile u_int32_t *addr = (void*)(sc->sc_addr + offset);
149	*addr = value;
150}
151
152
153CFATTACH_DECL_NEW(at91tctmr, sizeof(struct at91tctmr_softc),
154    at91tctmr_match, at91tctmr_attach, NULL, NULL);
155
156#if 0
157static u_int at91tctmr_get_timecount(struct timecounter *);
158
159static struct timecounter at91tctmr_timecounter = {
160	at91tctmr_get_timecount,/* get_timecount */
161	0,                      /* no poll_pps */
162	0xffffffff,		/* counter_mask */
163	COUNTS_PER_SEC,		/* frequency */
164	"at91tctmr",		/* name */
165	100,			/* quality */
166	NULL,			/* prev */
167	NULL,			/* next */
168};
169#endif
170
171static int
172at91tctmr_match(device_t parent, cfdata_t match, void *aux)
173{
174	if (strcmp(match->cf_name, "at91tctmr") == 0)
175		return 2;
176	return 0;
177}
178
179static void
180at91tctmr_attach(device_t parent, device_t self, void *aux)
181{
182    struct at91tctmr_softc *sc = device_private(self);
183    struct at91bus_attach_args *sa = aux;
184
185    aprint_normal("\n");
186
187    sc->sc_dev = self;
188    sc->sc_addr = (void*)sa->sa_addr;
189    sc->sc_pid = sa->sa_pid;
190
191    if (at91tctmr_sc == NULL)
192        at91tctmr_sc = sc;
193
194    at91_peripheral_clock(sc->sc_pid, 1);
195
196    WRITE_TC(sc, TC_CCR, TC_CCR_CLKDIS);
197    WRITE_TC(sc, TC_IDR, -1);	/* make sure interrupts are disabled	*/
198
199    /* find divider */
200    u_int32_t cmr = 0;
201    if (AT91_MSTCLK / 2U / HZ <= 65536) {
202      sc->sc_timerclock = AT91_MSTCLK / 2U;
203      cmr = TC_CMR_TCCLKS_MCK_DIV_2;
204    } else if (AT91_MSTCLK / 8U / HZ <= 65536) {
205      sc->sc_timerclock = AT91_MSTCLK / 8U;
206      cmr = TC_CMR_TCCLKS_MCK_DIV_8;
207    } else if (AT91_MSTCLK / 32U / HZ <= 65536) {
208      sc->sc_timerclock = AT91_MSTCLK / 32U;
209      cmr = TC_CMR_TCCLKS_MCK_DIV_32;
210    } else if (AT91_MSTCLK / 128U / HZ <= 65536) {
211      sc->sc_timerclock = AT91_MSTCLK / 128U;
212      cmr = TC_CMR_TCCLKS_MCK_DIV_128;
213    } else
214      panic("%s: cannot setup timer to reach HZ", device_xname(sc->sc_dev));
215
216    sc->sc_divider = (sc->sc_timerclock + HZ - 1) / HZ; /* round up */
217    sc->sc_usec_per_tick = 1000000UL / (sc->sc_timerclock / sc->sc_divider);
218
219    WRITE_TC(sc, TC_CMR, TC_CMR_WAVE | cmr | TC_CMR_WAVSEL_UP_RC);
220    WRITE_TC(sc, TC_CCR, TC_CCR_CLKEN);
221    WRITE_TC(sc, TC_RC,  sc->sc_divider - 1);
222    WRITE_TC(sc, TC_CCR, TC_CCR_SWTRG);
223
224    sc->sc_initialized = 1;
225
226    DPRINTF("%s: done, tclock=%"PRIu32" div=%"PRIu32" uspertick=%"PRIu32"\n", __FUNCTION__, sc->sc_timerclock, sc->sc_divider, sc->sc_usec_per_tick);
227
228}
229
230/*
231 * at91tctmr_intr:
232 *
233 *Handle the hardclock interrupt.
234 */
235static int
236at91tctmr_intr(void *arg)
237{
238    struct at91tctmr_softc *sc = arg;
239
240    /* make sure it's the kernel timer that generated the interrupt  */
241    /* need to do this since the interrupt line is shared by the    */
242    /* other interval and PWM timers                                */
243    if (READ_TC(sc, TC_SR) & TC_SR_CPCS) {
244        /* call the kernel timer handler */
245        hardclock((struct clockframe*) arg);
246        return 1;
247    } else {
248        /* it's one of the other timers; just pass it on */
249        return 0;
250    }
251}
252
253/*
254 * setstatclockrate:
255 *
256 *Set the rate of the statistics clock.
257 *
258 *We assume that hz is either stathz or profhz, and that neither
259 *will change after being set by cpu_initclocks().  We could
260 *recalculate the intervals here, but that would be a pain.
261 */
262void
263setstatclockrate(int hzz)
264{
265        /* use hardclock */
266	(void)hzz;
267}
268
269/*
270 * cpu_initclocks:
271 *
272 *Initialize the clock and get it going.
273 */
274static void udelay(unsigned int usec);
275
276void
277cpu_initclocks(void)
278{
279    struct at91tctmr_softc *sc = at91tctmr_sc;
280
281    if (!sc || !sc->sc_initialized)
282	panic("%s: driver has not been initialized! (sc=%p)", __FUNCTION__, sc);
283
284    hz = sc->sc_timerclock / sc->sc_divider;
285    stathz = profhz = 0;
286
287    /* set up and enable interval timer 1 as kernel timer, */
288    /* using 32kHz clock source */
289
290    /* register interrupt handler */
291    at91_intr_establish(sc->sc_pid, IPL_CLOCK, INTR_HIGH_LEVEL, at91tctmr_intr, sc);
292
293    /* enable interrupts from timer */
294    WRITE_TC(sc, TC_IER, TC_SR_CPCS);
295}
296
297
298
299
300static void udelay(unsigned int usec)
301{
302    struct at91tctmr_softc *sc = at91tctmr_sc;
303    u_int32_t prev_cvr, cvr, divi = READ_TC(sc, TC_RC), diff;
304    int prev_ticks, ticks, ticks2;
305    unsigned footick = (sc->sc_timerclock * 64ULL / 1000000UL);
306
307    if (usec > 0) {
308      prev_ticks = hardclock_ticks;
309      __insn_barrier();
310      prev_cvr = READ_TC(sc, TC_CV);
311      ticks = hardclock_ticks;
312      __insn_barrier();
313      if (ticks != prev_ticks) {
314	prev_cvr = READ_TC(sc, TC_CV);
315	prev_ticks = ticks;
316      }
317      for (;;) {
318	ticks = hardclock_ticks;
319	__insn_barrier();
320	cvr = READ_TC(sc, TC_CV);
321	ticks2 = hardclock_ticks;
322	__insn_barrier();
323	if (ticks2 != ticks) {
324	  cvr = READ_TC(sc, TC_CV);
325	}
326	diff = (ticks2 - prev_ticks) * divi;
327	if (cvr < prev_cvr) {
328	  if (!diff)
329	    diff = divi;
330	  diff -= prev_cvr - cvr;
331	} else
332	  diff += cvr - prev_cvr;
333	diff = diff * 64 / footick;
334	if (diff) {
335	  if (usec <= diff)
336	    break;
337	  prev_ticks = ticks2;
338	  prev_cvr = (prev_cvr + footick * diff / 64) % divi;
339	  usec -= diff;
340	}
341      }
342    }
343}
344
345
346
347/*
348 * delay:
349 *
350 *Delay for at least N microseconds. Note that due to our coarse clock,
351 *  our resolution is 61 us. But we round up so we'll wait at least as
352 *  long as requested.
353 */
354void
355delay(unsigned int usec)
356{
357    struct at91tctmr_softc *sc = at91tctmr_sc;
358
359#ifdef DEBUG
360    if (sc == NULL) {
361        printf("delay: called before start at91tc\n");
362        return;
363    }
364#endif
365
366    if (usec >= sc->sc_usec_per_tick) {
367        /* have more than 1 tick; just do in ticks */
368        unsigned int ticks = (usec + sc->sc_usec_per_tick - 1) / sc->sc_usec_per_tick;
369        while (ticks-- > 0) {
370	  udelay(sc->sc_usec_per_tick);
371	}
372    } else {
373        /* less than 1 tick; can do as usec */
374        udelay(usec);
375    }
376
377}
378
379