1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22/* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, i.e., the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152*/ 153 154#include "config.h" 155#include "system.h" 156#include "coretypes.h" 157#include "tm.h" 158#include "tree.h" 159#include "rtl.h" 160#include "tm_p.h" 161#include "function.h" 162#include "insn-config.h" 163#include "regs.h" 164#include "hard-reg-set.h" 165#include "flags.h" 166#include "toplev.h" 167#include "recog.h" 168#include "output.h" 169#include "basic-block.h" 170#include "varray.h" 171#include "reload.h" 172#include "ggc.h" 173#include "timevar.h" 174#include "tree-pass.h" 175#include "target.h" 176 177/* We use this array to cache info about insns, because otherwise we 178 spend too much time in stack_regs_mentioned_p. 179 180 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 181 the insn uses stack registers, two indicates the insn does not use 182 stack registers. */ 183static GTY(()) varray_type stack_regs_mentioned_data; 184 185#ifdef STACK_REGS 186 187#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 188 189/* This is the basic stack record. TOP is an index into REG[] such 190 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 191 192 If TOP is -2, REG[] is not yet initialized. Stack initialization 193 consists of placing each live reg in array `reg' and setting `top' 194 appropriately. 195 196 REG_SET indicates which registers are live. */ 197 198typedef struct stack_def 199{ 200 int top; /* index to top stack element */ 201 HARD_REG_SET reg_set; /* set of live registers */ 202 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 203} *stack; 204 205/* This is used to carry information about basic blocks. It is 206 attached to the AUX field of the standard CFG block. */ 207 208typedef struct block_info_def 209{ 210 struct stack_def stack_in; /* Input stack configuration. */ 211 struct stack_def stack_out; /* Output stack configuration. */ 212 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 213 int done; /* True if block already converted. */ 214 int predecessors; /* Number of predecessors that need 215 to be visited. */ 216} *block_info; 217 218#define BLOCK_INFO(B) ((block_info) (B)->aux) 219 220/* Passed to change_stack to indicate where to emit insns. */ 221enum emit_where 222{ 223 EMIT_AFTER, 224 EMIT_BEFORE 225}; 226 227/* The block we're currently working on. */ 228static basic_block current_block; 229 230/* In the current_block, whether we're processing the first register 231 stack or call instruction, i.e. the regstack is currently the 232 same as BLOCK_INFO(current_block)->stack_in. */ 233static bool starting_stack_p; 234 235/* This is the register file for all register after conversion. */ 236static rtx 237 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 238 239#define FP_MODE_REG(regno,mode) \ 240 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 241 242/* Used to initialize uninitialized registers. */ 243static rtx not_a_num; 244 245/* Forward declarations */ 246 247static int stack_regs_mentioned_p (rtx pat); 248static void pop_stack (stack, int); 249static rtx *get_true_reg (rtx *); 250 251static int check_asm_stack_operands (rtx); 252static int get_asm_operand_n_inputs (rtx); 253static rtx stack_result (tree); 254static void replace_reg (rtx *, int); 255static void remove_regno_note (rtx, enum reg_note, unsigned int); 256static int get_hard_regnum (stack, rtx); 257static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); 258static void swap_to_top(rtx, stack, rtx, rtx); 259static bool move_for_stack_reg (rtx, stack, rtx); 260static bool move_nan_for_stack_reg (rtx, stack, rtx); 261static int swap_rtx_condition_1 (rtx); 262static int swap_rtx_condition (rtx); 263static void compare_for_stack_reg (rtx, stack, rtx); 264static bool subst_stack_regs_pat (rtx, stack, rtx); 265static void subst_asm_stack_regs (rtx, stack); 266static bool subst_stack_regs (rtx, stack); 267static void change_stack (rtx, stack, stack, enum emit_where); 268static void print_stack (FILE *, stack); 269static rtx next_flags_user (rtx); 270 271/* Return nonzero if any stack register is mentioned somewhere within PAT. */ 272 273static int 274stack_regs_mentioned_p (rtx pat) 275{ 276 const char *fmt; 277 int i; 278 279 if (STACK_REG_P (pat)) 280 return 1; 281 282 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 284 { 285 if (fmt[i] == 'E') 286 { 287 int j; 288 289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 291 return 1; 292 } 293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 294 return 1; 295 } 296 297 return 0; 298} 299 300/* Return nonzero if INSN mentions stacked registers, else return zero. */ 301 302int 303stack_regs_mentioned (rtx insn) 304{ 305 unsigned int uid, max; 306 int test; 307 308 if (! INSN_P (insn) || !stack_regs_mentioned_data) 309 return 0; 310 311 uid = INSN_UID (insn); 312 max = VARRAY_SIZE (stack_regs_mentioned_data); 313 if (uid >= max) 314 { 315 /* Allocate some extra size to avoid too many reallocs, but 316 do not grow too quickly. */ 317 max = uid + uid / 20; 318 VARRAY_GROW (stack_regs_mentioned_data, max); 319 } 320 321 test = VARRAY_CHAR (stack_regs_mentioned_data, uid); 322 if (test == 0) 323 { 324 /* This insn has yet to be examined. Do so now. */ 325 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 326 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; 327 } 328 329 return test == 1; 330} 331 332static rtx ix86_flags_rtx; 333 334static rtx 335next_flags_user (rtx insn) 336{ 337 /* Search forward looking for the first use of this value. 338 Stop at block boundaries. */ 339 340 while (insn != BB_END (current_block)) 341 { 342 insn = NEXT_INSN (insn); 343 344 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 345 return insn; 346 347 if (CALL_P (insn)) 348 return NULL_RTX; 349 } 350 return NULL_RTX; 351} 352 353/* Reorganize the stack into ascending numbers, before this insn. */ 354 355static void 356straighten_stack (rtx insn, stack regstack) 357{ 358 struct stack_def temp_stack; 359 int top; 360 361 /* If there is only a single register on the stack, then the stack is 362 already in increasing order and no reorganization is needed. 363 364 Similarly if the stack is empty. */ 365 if (regstack->top <= 0) 366 return; 367 368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 369 370 for (top = temp_stack.top = regstack->top; top >= 0; top--) 371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 372 373 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 374} 375 376/* Pop a register from the stack. */ 377 378static void 379pop_stack (stack regstack, int regno) 380{ 381 int top = regstack->top; 382 383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 384 regstack->top--; 385 /* If regno was not at the top of stack then adjust stack. */ 386 if (regstack->reg [top] != regno) 387 { 388 int i; 389 for (i = regstack->top; i >= 0; i--) 390 if (regstack->reg [i] == regno) 391 { 392 int j; 393 for (j = i; j < top; j++) 394 regstack->reg [j] = regstack->reg [j + 1]; 395 break; 396 } 397 } 398} 399 400/* Return a pointer to the REG expression within PAT. If PAT is not a 401 REG, possible enclosed by a conversion rtx, return the inner part of 402 PAT that stopped the search. */ 403 404static rtx * 405get_true_reg (rtx *pat) 406{ 407 for (;;) 408 switch (GET_CODE (*pat)) 409 { 410 case SUBREG: 411 /* Eliminate FP subregister accesses in favor of the 412 actual FP register in use. */ 413 { 414 rtx subreg; 415 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 416 { 417 int regno_off = subreg_regno_offset (REGNO (subreg), 418 GET_MODE (subreg), 419 SUBREG_BYTE (*pat), 420 GET_MODE (*pat)); 421 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 422 GET_MODE (subreg)); 423 default: 424 return pat; 425 } 426 } 427 case FLOAT: 428 case FIX: 429 case FLOAT_EXTEND: 430 pat = & XEXP (*pat, 0); 431 break; 432 433 case FLOAT_TRUNCATE: 434 if (!flag_unsafe_math_optimizations) 435 return pat; 436 pat = & XEXP (*pat, 0); 437 break; 438 } 439} 440 441/* Set if we find any malformed asms in a block. */ 442static bool any_malformed_asm; 443 444/* There are many rules that an asm statement for stack-like regs must 445 follow. Those rules are explained at the top of this file: the rule 446 numbers below refer to that explanation. */ 447 448static int 449check_asm_stack_operands (rtx insn) 450{ 451 int i; 452 int n_clobbers; 453 int malformed_asm = 0; 454 rtx body = PATTERN (insn); 455 456 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 457 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 458 int alt; 459 460 rtx *clobber_reg = 0; 461 int n_inputs, n_outputs; 462 463 /* Find out what the constraints require. If no constraint 464 alternative matches, this asm is malformed. */ 465 extract_insn (insn); 466 constrain_operands (1); 467 alt = which_alternative; 468 469 preprocess_constraints (); 470 471 n_inputs = get_asm_operand_n_inputs (body); 472 n_outputs = recog_data.n_operands - n_inputs; 473 474 if (alt < 0) 475 { 476 malformed_asm = 1; 477 /* Avoid further trouble with this insn. */ 478 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 479 return 0; 480 } 481 482 /* Strip SUBREGs here to make the following code simpler. */ 483 for (i = 0; i < recog_data.n_operands; i++) 484 if (GET_CODE (recog_data.operand[i]) == SUBREG 485 && REG_P (SUBREG_REG (recog_data.operand[i]))) 486 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 487 488 /* Set up CLOBBER_REG. */ 489 490 n_clobbers = 0; 491 492 if (GET_CODE (body) == PARALLEL) 493 { 494 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 495 496 for (i = 0; i < XVECLEN (body, 0); i++) 497 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 498 { 499 rtx clobber = XVECEXP (body, 0, i); 500 rtx reg = XEXP (clobber, 0); 501 502 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 503 reg = SUBREG_REG (reg); 504 505 if (STACK_REG_P (reg)) 506 { 507 clobber_reg[n_clobbers] = reg; 508 n_clobbers++; 509 } 510 } 511 } 512 513 /* Enforce rule #4: Output operands must specifically indicate which 514 reg an output appears in after an asm. "=f" is not allowed: the 515 operand constraints must select a class with a single reg. 516 517 Also enforce rule #5: Output operands must start at the top of 518 the reg-stack: output operands may not "skip" a reg. */ 519 520 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 521 for (i = 0; i < n_outputs; i++) 522 if (STACK_REG_P (recog_data.operand[i])) 523 { 524 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1) 525 { 526 error_for_asm (insn, "output constraint %d must specify a single register", i); 527 malformed_asm = 1; 528 } 529 else 530 { 531 int j; 532 533 for (j = 0; j < n_clobbers; j++) 534 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 535 { 536 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 537 i, reg_names [REGNO (clobber_reg[j])]); 538 malformed_asm = 1; 539 break; 540 } 541 if (j == n_clobbers) 542 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 543 } 544 } 545 546 547 /* Search for first non-popped reg. */ 548 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 549 if (! reg_used_as_output[i]) 550 break; 551 552 /* If there are any other popped regs, that's an error. */ 553 for (; i < LAST_STACK_REG + 1; i++) 554 if (reg_used_as_output[i]) 555 break; 556 557 if (i != LAST_STACK_REG + 1) 558 { 559 error_for_asm (insn, "output regs must be grouped at top of stack"); 560 malformed_asm = 1; 561 } 562 563 /* Enforce rule #2: All implicitly popped input regs must be closer 564 to the top of the reg-stack than any input that is not implicitly 565 popped. */ 566 567 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 568 for (i = n_outputs; i < n_outputs + n_inputs; i++) 569 if (STACK_REG_P (recog_data.operand[i])) 570 { 571 /* An input reg is implicitly popped if it is tied to an 572 output, or if there is a CLOBBER for it. */ 573 int j; 574 575 for (j = 0; j < n_clobbers; j++) 576 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 577 break; 578 579 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 580 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 581 } 582 583 /* Search for first non-popped reg. */ 584 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 585 if (! implicitly_dies[i]) 586 break; 587 588 /* If there are any other popped regs, that's an error. */ 589 for (; i < LAST_STACK_REG + 1; i++) 590 if (implicitly_dies[i]) 591 break; 592 593 if (i != LAST_STACK_REG + 1) 594 { 595 error_for_asm (insn, 596 "implicitly popped regs must be grouped at top of stack"); 597 malformed_asm = 1; 598 } 599 600 /* Enforce rule #3: If any input operand uses the "f" constraint, all 601 output constraints must use the "&" earlyclobber. 602 603 ??? Detect this more deterministically by having constrain_asm_operands 604 record any earlyclobber. */ 605 606 for (i = n_outputs; i < n_outputs + n_inputs; i++) 607 if (recog_op_alt[i][alt].matches == -1) 608 { 609 int j; 610 611 for (j = 0; j < n_outputs; j++) 612 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 613 { 614 error_for_asm (insn, 615 "output operand %d must use %<&%> constraint", j); 616 malformed_asm = 1; 617 } 618 } 619 620 if (malformed_asm) 621 { 622 /* Avoid further trouble with this insn. */ 623 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 624 any_malformed_asm = true; 625 return 0; 626 } 627 628 return 1; 629} 630 631/* Calculate the number of inputs and outputs in BODY, an 632 asm_operands. N_OPERANDS is the total number of operands, and 633 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 634 placed. */ 635 636static int 637get_asm_operand_n_inputs (rtx body) 638{ 639 switch (GET_CODE (body)) 640 { 641 case SET: 642 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS); 643 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 644 645 case ASM_OPERANDS: 646 return ASM_OPERANDS_INPUT_LENGTH (body); 647 648 case PARALLEL: 649 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0)); 650 651 default: 652 gcc_unreachable (); 653 } 654} 655 656/* If current function returns its result in an fp stack register, 657 return the REG. Otherwise, return 0. */ 658 659static rtx 660stack_result (tree decl) 661{ 662 rtx result; 663 664 /* If the value is supposed to be returned in memory, then clearly 665 it is not returned in a stack register. */ 666 if (aggregate_value_p (DECL_RESULT (decl), decl)) 667 return 0; 668 669 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 670 if (result != 0) 671 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 672 decl, true); 673 674 return result != 0 && STACK_REG_P (result) ? result : 0; 675} 676 677 678/* 679 * This section deals with stack register substitution, and forms the second 680 * pass over the RTL. 681 */ 682 683/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 684 the desired hard REGNO. */ 685 686static void 687replace_reg (rtx *reg, int regno) 688{ 689 gcc_assert (regno >= FIRST_STACK_REG); 690 gcc_assert (regno <= LAST_STACK_REG); 691 gcc_assert (STACK_REG_P (*reg)); 692 693 gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT 694 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 695 696 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 697} 698 699/* Remove a note of type NOTE, which must be found, for register 700 number REGNO from INSN. Remove only one such note. */ 701 702static void 703remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) 704{ 705 rtx *note_link, this; 706 707 note_link = ®_NOTES (insn); 708 for (this = *note_link; this; this = XEXP (this, 1)) 709 if (REG_NOTE_KIND (this) == note 710 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 711 { 712 *note_link = XEXP (this, 1); 713 return; 714 } 715 else 716 note_link = &XEXP (this, 1); 717 718 gcc_unreachable (); 719} 720 721/* Find the hard register number of virtual register REG in REGSTACK. 722 The hard register number is relative to the top of the stack. -1 is 723 returned if the register is not found. */ 724 725static int 726get_hard_regnum (stack regstack, rtx reg) 727{ 728 int i; 729 730 gcc_assert (STACK_REG_P (reg)); 731 732 for (i = regstack->top; i >= 0; i--) 733 if (regstack->reg[i] == REGNO (reg)) 734 break; 735 736 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 737} 738 739/* Emit an insn to pop virtual register REG before or after INSN. 740 REGSTACK is the stack state after INSN and is updated to reflect this 741 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 742 is represented as a SET whose destination is the register to be popped 743 and source is the top of stack. A death note for the top of stack 744 cases the movdf pattern to pop. */ 745 746static rtx 747emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) 748{ 749 rtx pop_insn, pop_rtx; 750 int hard_regno; 751 752 /* For complex types take care to pop both halves. These may survive in 753 CLOBBER and USE expressions. */ 754 if (COMPLEX_MODE_P (GET_MODE (reg))) 755 { 756 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 757 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 758 759 pop_insn = NULL_RTX; 760 if (get_hard_regnum (regstack, reg1) >= 0) 761 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 762 if (get_hard_regnum (regstack, reg2) >= 0) 763 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 764 gcc_assert (pop_insn); 765 return pop_insn; 766 } 767 768 hard_regno = get_hard_regnum (regstack, reg); 769 770 gcc_assert (hard_regno >= FIRST_STACK_REG); 771 772 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 773 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 774 775 if (where == EMIT_AFTER) 776 pop_insn = emit_insn_after (pop_rtx, insn); 777 else 778 pop_insn = emit_insn_before (pop_rtx, insn); 779 780 REG_NOTES (pop_insn) 781 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), 782 REG_NOTES (pop_insn)); 783 784 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 785 = regstack->reg[regstack->top]; 786 regstack->top -= 1; 787 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 788 789 return pop_insn; 790} 791 792/* Emit an insn before or after INSN to swap virtual register REG with 793 the top of stack. REGSTACK is the stack state before the swap, and 794 is updated to reflect the swap. A swap insn is represented as a 795 PARALLEL of two patterns: each pattern moves one reg to the other. 796 797 If REG is already at the top of the stack, no insn is emitted. */ 798 799static void 800emit_swap_insn (rtx insn, stack regstack, rtx reg) 801{ 802 int hard_regno; 803 rtx swap_rtx; 804 int tmp, other_reg; /* swap regno temps */ 805 rtx i1; /* the stack-reg insn prior to INSN */ 806 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 807 808 hard_regno = get_hard_regnum (regstack, reg); 809 810 if (hard_regno == FIRST_STACK_REG) 811 return; 812 if (hard_regno == -1) 813 { 814 /* Something failed if the register wasn't on the stack. If we had 815 malformed asms, we zapped the instruction itself, but that didn't 816 produce the same pattern of register sets as before. To prevent 817 further failure, adjust REGSTACK to include REG at TOP. */ 818 gcc_assert (any_malformed_asm); 819 regstack->reg[++regstack->top] = REGNO (reg); 820 return; 821 } 822 gcc_assert (hard_regno >= FIRST_STACK_REG); 823 824 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 825 826 tmp = regstack->reg[other_reg]; 827 regstack->reg[other_reg] = regstack->reg[regstack->top]; 828 regstack->reg[regstack->top] = tmp; 829 830 /* Find the previous insn involving stack regs, but don't pass a 831 block boundary. */ 832 i1 = NULL; 833 if (current_block && insn != BB_HEAD (current_block)) 834 { 835 rtx tmp = PREV_INSN (insn); 836 rtx limit = PREV_INSN (BB_HEAD (current_block)); 837 while (tmp != limit) 838 { 839 if (LABEL_P (tmp) 840 || CALL_P (tmp) 841 || NOTE_INSN_BASIC_BLOCK_P (tmp) 842 || (NONJUMP_INSN_P (tmp) 843 && stack_regs_mentioned (tmp))) 844 { 845 i1 = tmp; 846 break; 847 } 848 tmp = PREV_INSN (tmp); 849 } 850 } 851 852 if (i1 != NULL_RTX 853 && (i1set = single_set (i1)) != NULL_RTX) 854 { 855 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 856 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 857 858 /* If the previous register stack push was from the reg we are to 859 swap with, omit the swap. */ 860 861 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 862 && REG_P (i1src) 863 && REGNO (i1src) == (unsigned) hard_regno - 1 864 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 865 return; 866 867 /* If the previous insn wrote to the reg we are to swap with, 868 omit the swap. */ 869 870 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 871 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 872 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 873 return; 874 } 875 876 /* Avoid emitting the swap if this is the first register stack insn 877 of the current_block. Instead update the current_block's stack_in 878 and let compensate edges take care of this for us. */ 879 if (current_block && starting_stack_p) 880 { 881 BLOCK_INFO (current_block)->stack_in = *regstack; 882 starting_stack_p = false; 883 return; 884 } 885 886 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 887 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 888 889 if (i1) 890 emit_insn_after (swap_rtx, i1); 891 else if (current_block) 892 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 893 else 894 emit_insn_before (swap_rtx, insn); 895} 896 897/* Emit an insns before INSN to swap virtual register SRC1 with 898 the top of stack and virtual register SRC2 with second stack 899 slot. REGSTACK is the stack state before the swaps, and 900 is updated to reflect the swaps. A swap insn is represented as a 901 PARALLEL of two patterns: each pattern moves one reg to the other. 902 903 If SRC1 and/or SRC2 are already at the right place, no swap insn 904 is emitted. */ 905 906static void 907swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2) 908{ 909 struct stack_def temp_stack; 910 int regno, j, k, temp; 911 912 temp_stack = *regstack; 913 914 /* Place operand 1 at the top of stack. */ 915 regno = get_hard_regnum (&temp_stack, src1); 916 gcc_assert (regno >= 0); 917 if (regno != FIRST_STACK_REG) 918 { 919 k = temp_stack.top - (regno - FIRST_STACK_REG); 920 j = temp_stack.top; 921 922 temp = temp_stack.reg[k]; 923 temp_stack.reg[k] = temp_stack.reg[j]; 924 temp_stack.reg[j] = temp; 925 } 926 927 /* Place operand 2 next on the stack. */ 928 regno = get_hard_regnum (&temp_stack, src2); 929 gcc_assert (regno >= 0); 930 if (regno != FIRST_STACK_REG + 1) 931 { 932 k = temp_stack.top - (regno - FIRST_STACK_REG); 933 j = temp_stack.top - 1; 934 935 temp = temp_stack.reg[k]; 936 temp_stack.reg[k] = temp_stack.reg[j]; 937 temp_stack.reg[j] = temp; 938 } 939 940 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 941} 942 943/* Handle a move to or from a stack register in PAT, which is in INSN. 944 REGSTACK is the current stack. Return whether a control flow insn 945 was deleted in the process. */ 946 947static bool 948move_for_stack_reg (rtx insn, stack regstack, rtx pat) 949{ 950 rtx *psrc = get_true_reg (&SET_SRC (pat)); 951 rtx *pdest = get_true_reg (&SET_DEST (pat)); 952 rtx src, dest; 953 rtx note; 954 bool control_flow_insn_deleted = false; 955 956 src = *psrc; dest = *pdest; 957 958 if (STACK_REG_P (src) && STACK_REG_P (dest)) 959 { 960 /* Write from one stack reg to another. If SRC dies here, then 961 just change the register mapping and delete the insn. */ 962 963 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 964 if (note) 965 { 966 int i; 967 968 /* If this is a no-op move, there must not be a REG_DEAD note. */ 969 gcc_assert (REGNO (src) != REGNO (dest)); 970 971 for (i = regstack->top; i >= 0; i--) 972 if (regstack->reg[i] == REGNO (src)) 973 break; 974 975 /* The destination must be dead, or life analysis is borked. */ 976 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 977 978 /* If the source is not live, this is yet another case of 979 uninitialized variables. Load up a NaN instead. */ 980 if (i < 0) 981 return move_nan_for_stack_reg (insn, regstack, dest); 982 983 /* It is possible that the dest is unused after this insn. 984 If so, just pop the src. */ 985 986 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 987 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 988 else 989 { 990 regstack->reg[i] = REGNO (dest); 991 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 992 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 993 } 994 995 control_flow_insn_deleted |= control_flow_insn_p (insn); 996 delete_insn (insn); 997 return control_flow_insn_deleted; 998 } 999 1000 /* The source reg does not die. */ 1001 1002 /* If this appears to be a no-op move, delete it, or else it 1003 will confuse the machine description output patterns. But if 1004 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1005 for REG_UNUSED will not work for deleted insns. */ 1006 1007 if (REGNO (src) == REGNO (dest)) 1008 { 1009 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1010 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1011 1012 control_flow_insn_deleted |= control_flow_insn_p (insn); 1013 delete_insn (insn); 1014 return control_flow_insn_deleted; 1015 } 1016 1017 /* The destination ought to be dead. */ 1018 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1019 1020 replace_reg (psrc, get_hard_regnum (regstack, src)); 1021 1022 regstack->reg[++regstack->top] = REGNO (dest); 1023 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1024 replace_reg (pdest, FIRST_STACK_REG); 1025 } 1026 else if (STACK_REG_P (src)) 1027 { 1028 /* Save from a stack reg to MEM, or possibly integer reg. Since 1029 only top of stack may be saved, emit an exchange first if 1030 needs be. */ 1031 1032 emit_swap_insn (insn, regstack, src); 1033 1034 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1035 if (note) 1036 { 1037 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1038 regstack->top--; 1039 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1040 } 1041 else if ((GET_MODE (src) == XFmode) 1042 && regstack->top < REG_STACK_SIZE - 1) 1043 { 1044 /* A 387 cannot write an XFmode value to a MEM without 1045 clobbering the source reg. The output code can handle 1046 this by reading back the value from the MEM. 1047 But it is more efficient to use a temp register if one is 1048 available. Push the source value here if the register 1049 stack is not full, and then write the value to memory via 1050 a pop. */ 1051 rtx push_rtx; 1052 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1053 1054 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1055 emit_insn_before (push_rtx, insn); 1056 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, 1057 REG_NOTES (insn)); 1058 } 1059 1060 replace_reg (psrc, FIRST_STACK_REG); 1061 } 1062 else 1063 { 1064 gcc_assert (STACK_REG_P (dest)); 1065 1066 /* Load from MEM, or possibly integer REG or constant, into the 1067 stack regs. The actual target is always the top of the 1068 stack. The stack mapping is changed to reflect that DEST is 1069 now at top of stack. */ 1070 1071 /* The destination ought to be dead. */ 1072 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1073 1074 gcc_assert (regstack->top < REG_STACK_SIZE); 1075 1076 regstack->reg[++regstack->top] = REGNO (dest); 1077 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1078 replace_reg (pdest, FIRST_STACK_REG); 1079 } 1080 1081 return control_flow_insn_deleted; 1082} 1083 1084/* A helper function which replaces INSN with a pattern that loads up 1085 a NaN into DEST, then invokes move_for_stack_reg. */ 1086 1087static bool 1088move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest) 1089{ 1090 rtx pat; 1091 1092 dest = FP_MODE_REG (REGNO (dest), SFmode); 1093 pat = gen_rtx_SET (VOIDmode, dest, not_a_num); 1094 PATTERN (insn) = pat; 1095 INSN_CODE (insn) = -1; 1096 1097 return move_for_stack_reg (insn, regstack, pat); 1098} 1099 1100/* Swap the condition on a branch, if there is one. Return true if we 1101 found a condition to swap. False if the condition was not used as 1102 such. */ 1103 1104static int 1105swap_rtx_condition_1 (rtx pat) 1106{ 1107 const char *fmt; 1108 int i, r = 0; 1109 1110 if (COMPARISON_P (pat)) 1111 { 1112 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1113 r = 1; 1114 } 1115 else 1116 { 1117 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1118 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1119 { 1120 if (fmt[i] == 'E') 1121 { 1122 int j; 1123 1124 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1125 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1126 } 1127 else if (fmt[i] == 'e') 1128 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1129 } 1130 } 1131 1132 return r; 1133} 1134 1135static int 1136swap_rtx_condition (rtx insn) 1137{ 1138 rtx pat = PATTERN (insn); 1139 1140 /* We're looking for a single set to cc0 or an HImode temporary. */ 1141 1142 if (GET_CODE (pat) == SET 1143 && REG_P (SET_DEST (pat)) 1144 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1145 { 1146 insn = next_flags_user (insn); 1147 if (insn == NULL_RTX) 1148 return 0; 1149 pat = PATTERN (insn); 1150 } 1151 1152 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1153 with the cc value right now. We may be able to search for one 1154 though. */ 1155 1156 if (GET_CODE (pat) == SET 1157 && GET_CODE (SET_SRC (pat)) == UNSPEC 1158 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1159 { 1160 rtx dest = SET_DEST (pat); 1161 1162 /* Search forward looking for the first use of this value. 1163 Stop at block boundaries. */ 1164 while (insn != BB_END (current_block)) 1165 { 1166 insn = NEXT_INSN (insn); 1167 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1168 break; 1169 if (CALL_P (insn)) 1170 return 0; 1171 } 1172 1173 /* We haven't found it. */ 1174 if (insn == BB_END (current_block)) 1175 return 0; 1176 1177 /* So we've found the insn using this value. If it is anything 1178 other than sahf or the value does not die (meaning we'd have 1179 to search further), then we must give up. */ 1180 pat = PATTERN (insn); 1181 if (GET_CODE (pat) != SET 1182 || GET_CODE (SET_SRC (pat)) != UNSPEC 1183 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1184 || ! dead_or_set_p (insn, dest)) 1185 return 0; 1186 1187 /* Now we are prepared to handle this as a normal cc0 setter. */ 1188 insn = next_flags_user (insn); 1189 if (insn == NULL_RTX) 1190 return 0; 1191 pat = PATTERN (insn); 1192 } 1193 1194 if (swap_rtx_condition_1 (pat)) 1195 { 1196 int fail = 0; 1197 INSN_CODE (insn) = -1; 1198 if (recog_memoized (insn) == -1) 1199 fail = 1; 1200 /* In case the flags don't die here, recurse to try fix 1201 following user too. */ 1202 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1203 { 1204 insn = next_flags_user (insn); 1205 if (!insn || !swap_rtx_condition (insn)) 1206 fail = 1; 1207 } 1208 if (fail) 1209 { 1210 swap_rtx_condition_1 (pat); 1211 return 0; 1212 } 1213 return 1; 1214 } 1215 return 0; 1216} 1217 1218/* Handle a comparison. Special care needs to be taken to avoid 1219 causing comparisons that a 387 cannot do correctly, such as EQ. 1220 1221 Also, a pop insn may need to be emitted. The 387 does have an 1222 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1223 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1224 set up. */ 1225 1226static void 1227compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) 1228{ 1229 rtx *src1, *src2; 1230 rtx src1_note, src2_note; 1231 1232 src1 = get_true_reg (&XEXP (pat_src, 0)); 1233 src2 = get_true_reg (&XEXP (pat_src, 1)); 1234 1235 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1236 registers that die in this insn - move those to stack top first. */ 1237 if ((! STACK_REG_P (*src1) 1238 || (STACK_REG_P (*src2) 1239 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1240 && swap_rtx_condition (insn)) 1241 { 1242 rtx temp; 1243 temp = XEXP (pat_src, 0); 1244 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1245 XEXP (pat_src, 1) = temp; 1246 1247 src1 = get_true_reg (&XEXP (pat_src, 0)); 1248 src2 = get_true_reg (&XEXP (pat_src, 1)); 1249 1250 INSN_CODE (insn) = -1; 1251 } 1252 1253 /* We will fix any death note later. */ 1254 1255 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1256 1257 if (STACK_REG_P (*src2)) 1258 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1259 else 1260 src2_note = NULL_RTX; 1261 1262 emit_swap_insn (insn, regstack, *src1); 1263 1264 replace_reg (src1, FIRST_STACK_REG); 1265 1266 if (STACK_REG_P (*src2)) 1267 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1268 1269 if (src1_note) 1270 { 1271 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1272 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1273 } 1274 1275 /* If the second operand dies, handle that. But if the operands are 1276 the same stack register, don't bother, because only one death is 1277 needed, and it was just handled. */ 1278 1279 if (src2_note 1280 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1281 && REGNO (*src1) == REGNO (*src2))) 1282 { 1283 /* As a special case, two regs may die in this insn if src2 is 1284 next to top of stack and the top of stack also dies. Since 1285 we have already popped src1, "next to top of stack" is really 1286 at top (FIRST_STACK_REG) now. */ 1287 1288 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1289 && src1_note) 1290 { 1291 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1292 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1293 } 1294 else 1295 { 1296 /* The 386 can only represent death of the first operand in 1297 the case handled above. In all other cases, emit a separate 1298 pop and remove the death note from here. */ 1299 1300 /* link_cc0_insns (insn); */ 1301 1302 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1303 1304 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1305 EMIT_AFTER); 1306 } 1307 } 1308} 1309 1310/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1311 is the current register layout. Return whether a control flow insn 1312 was deleted in the process. */ 1313 1314static bool 1315subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) 1316{ 1317 rtx *dest, *src; 1318 bool control_flow_insn_deleted = false; 1319 1320 switch (GET_CODE (pat)) 1321 { 1322 case USE: 1323 /* Deaths in USE insns can happen in non optimizing compilation. 1324 Handle them by popping the dying register. */ 1325 src = get_true_reg (&XEXP (pat, 0)); 1326 if (STACK_REG_P (*src) 1327 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1328 { 1329 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1330 return control_flow_insn_deleted; 1331 } 1332 /* ??? Uninitialized USE should not happen. */ 1333 else 1334 gcc_assert (get_hard_regnum (regstack, *src) != -1); 1335 break; 1336 1337 case CLOBBER: 1338 { 1339 rtx note; 1340 1341 dest = get_true_reg (&XEXP (pat, 0)); 1342 if (STACK_REG_P (*dest)) 1343 { 1344 note = find_reg_note (insn, REG_DEAD, *dest); 1345 1346 if (pat != PATTERN (insn)) 1347 { 1348 /* The fix_truncdi_1 pattern wants to be able to allocate 1349 its own scratch register. It does this by clobbering 1350 an fp reg so that it is assured of an empty reg-stack 1351 register. If the register is live, kill it now. 1352 Remove the DEAD/UNUSED note so we don't try to kill it 1353 later too. */ 1354 1355 if (note) 1356 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1357 else 1358 { 1359 note = find_reg_note (insn, REG_UNUSED, *dest); 1360 gcc_assert (note); 1361 } 1362 remove_note (insn, note); 1363 replace_reg (dest, FIRST_STACK_REG + 1); 1364 } 1365 else 1366 { 1367 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1368 indicates an uninitialized value. Because reload removed 1369 all other clobbers, this must be due to a function 1370 returning without a value. Load up a NaN. */ 1371 1372 if (!note) 1373 { 1374 rtx t = *dest; 1375 if (get_hard_regnum (regstack, t) == -1) 1376 control_flow_insn_deleted 1377 |= move_nan_for_stack_reg (insn, regstack, t); 1378 if (COMPLEX_MODE_P (GET_MODE (t))) 1379 { 1380 t = FP_MODE_REG (REGNO (t) + 1, DFmode); 1381 if (get_hard_regnum (regstack, t) == -1) 1382 control_flow_insn_deleted 1383 |= move_nan_for_stack_reg (insn, regstack, t); 1384 } 1385 } 1386 } 1387 } 1388 break; 1389 } 1390 1391 case SET: 1392 { 1393 rtx *src1 = (rtx *) 0, *src2; 1394 rtx src1_note, src2_note; 1395 rtx pat_src; 1396 1397 dest = get_true_reg (&SET_DEST (pat)); 1398 src = get_true_reg (&SET_SRC (pat)); 1399 pat_src = SET_SRC (pat); 1400 1401 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1402 if (STACK_REG_P (*src) 1403 || (STACK_REG_P (*dest) 1404 && (REG_P (*src) || MEM_P (*src) 1405 || GET_CODE (*src) == CONST_DOUBLE))) 1406 { 1407 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1408 break; 1409 } 1410 1411 switch (GET_CODE (pat_src)) 1412 { 1413 case COMPARE: 1414 compare_for_stack_reg (insn, regstack, pat_src); 1415 break; 1416 1417 case CALL: 1418 { 1419 int count; 1420 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; 1421 --count >= 0;) 1422 { 1423 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1424 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1425 } 1426 } 1427 replace_reg (dest, FIRST_STACK_REG); 1428 break; 1429 1430 case REG: 1431 /* This is a `tstM2' case. */ 1432 gcc_assert (*dest == cc0_rtx); 1433 src1 = src; 1434 1435 /* Fall through. */ 1436 1437 case FLOAT_TRUNCATE: 1438 case SQRT: 1439 case ABS: 1440 case NEG: 1441 /* These insns only operate on the top of the stack. DEST might 1442 be cc0_rtx if we're processing a tstM pattern. Also, it's 1443 possible that the tstM case results in a REG_DEAD note on the 1444 source. */ 1445 1446 if (src1 == 0) 1447 src1 = get_true_reg (&XEXP (pat_src, 0)); 1448 1449 emit_swap_insn (insn, regstack, *src1); 1450 1451 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1452 1453 if (STACK_REG_P (*dest)) 1454 replace_reg (dest, FIRST_STACK_REG); 1455 1456 if (src1_note) 1457 { 1458 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1459 regstack->top--; 1460 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1461 } 1462 1463 replace_reg (src1, FIRST_STACK_REG); 1464 break; 1465 1466 case MINUS: 1467 case DIV: 1468 /* On i386, reversed forms of subM3 and divM3 exist for 1469 MODE_FLOAT, so the same code that works for addM3 and mulM3 1470 can be used. */ 1471 case MULT: 1472 case PLUS: 1473 /* These insns can accept the top of stack as a destination 1474 from a stack reg or mem, or can use the top of stack as a 1475 source and some other stack register (possibly top of stack) 1476 as a destination. */ 1477 1478 src1 = get_true_reg (&XEXP (pat_src, 0)); 1479 src2 = get_true_reg (&XEXP (pat_src, 1)); 1480 1481 /* We will fix any death note later. */ 1482 1483 if (STACK_REG_P (*src1)) 1484 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1485 else 1486 src1_note = NULL_RTX; 1487 if (STACK_REG_P (*src2)) 1488 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1489 else 1490 src2_note = NULL_RTX; 1491 1492 /* If either operand is not a stack register, then the dest 1493 must be top of stack. */ 1494 1495 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1496 emit_swap_insn (insn, regstack, *dest); 1497 else 1498 { 1499 /* Both operands are REG. If neither operand is already 1500 at the top of stack, choose to make the one that is the dest 1501 the new top of stack. */ 1502 1503 int src1_hard_regnum, src2_hard_regnum; 1504 1505 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1506 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1507 gcc_assert (src1_hard_regnum != -1); 1508 gcc_assert (src2_hard_regnum != -1); 1509 1510 if (src1_hard_regnum != FIRST_STACK_REG 1511 && src2_hard_regnum != FIRST_STACK_REG) 1512 emit_swap_insn (insn, regstack, *dest); 1513 } 1514 1515 if (STACK_REG_P (*src1)) 1516 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1517 if (STACK_REG_P (*src2)) 1518 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1519 1520 if (src1_note) 1521 { 1522 rtx src1_reg = XEXP (src1_note, 0); 1523 1524 /* If the register that dies is at the top of stack, then 1525 the destination is somewhere else - merely substitute it. 1526 But if the reg that dies is not at top of stack, then 1527 move the top of stack to the dead reg, as though we had 1528 done the insn and then a store-with-pop. */ 1529 1530 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1531 { 1532 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1533 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1534 } 1535 else 1536 { 1537 int regno = get_hard_regnum (regstack, src1_reg); 1538 1539 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1540 replace_reg (dest, regno); 1541 1542 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1543 = regstack->reg[regstack->top]; 1544 } 1545 1546 CLEAR_HARD_REG_BIT (regstack->reg_set, 1547 REGNO (XEXP (src1_note, 0))); 1548 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1549 regstack->top--; 1550 } 1551 else if (src2_note) 1552 { 1553 rtx src2_reg = XEXP (src2_note, 0); 1554 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1555 { 1556 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1557 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1558 } 1559 else 1560 { 1561 int regno = get_hard_regnum (regstack, src2_reg); 1562 1563 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1564 replace_reg (dest, regno); 1565 1566 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1567 = regstack->reg[regstack->top]; 1568 } 1569 1570 CLEAR_HARD_REG_BIT (regstack->reg_set, 1571 REGNO (XEXP (src2_note, 0))); 1572 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1573 regstack->top--; 1574 } 1575 else 1576 { 1577 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1578 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1579 } 1580 1581 /* Keep operand 1 matching with destination. */ 1582 if (COMMUTATIVE_ARITH_P (pat_src) 1583 && REG_P (*src1) && REG_P (*src2) 1584 && REGNO (*src1) != REGNO (*dest)) 1585 { 1586 int tmp = REGNO (*src1); 1587 replace_reg (src1, REGNO (*src2)); 1588 replace_reg (src2, tmp); 1589 } 1590 break; 1591 1592 case UNSPEC: 1593 switch (XINT (pat_src, 1)) 1594 { 1595 case UNSPEC_FIST: 1596 1597 case UNSPEC_FIST_FLOOR: 1598 case UNSPEC_FIST_CEIL: 1599 1600 /* These insns only operate on the top of the stack. */ 1601 1602 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1603 emit_swap_insn (insn, regstack, *src1); 1604 1605 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1606 1607 if (STACK_REG_P (*dest)) 1608 replace_reg (dest, FIRST_STACK_REG); 1609 1610 if (src1_note) 1611 { 1612 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1613 regstack->top--; 1614 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1615 } 1616 1617 replace_reg (src1, FIRST_STACK_REG); 1618 break; 1619 1620 case UNSPEC_SIN: 1621 case UNSPEC_COS: 1622 case UNSPEC_FRNDINT: 1623 case UNSPEC_F2XM1: 1624 1625 case UNSPEC_FRNDINT_FLOOR: 1626 case UNSPEC_FRNDINT_CEIL: 1627 case UNSPEC_FRNDINT_TRUNC: 1628 case UNSPEC_FRNDINT_MASK_PM: 1629 1630 /* These insns only operate on the top of the stack. */ 1631 1632 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1633 1634 emit_swap_insn (insn, regstack, *src1); 1635 1636 /* Input should never die, it is 1637 replaced with output. */ 1638 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1639 gcc_assert (!src1_note); 1640 1641 if (STACK_REG_P (*dest)) 1642 replace_reg (dest, FIRST_STACK_REG); 1643 1644 replace_reg (src1, FIRST_STACK_REG); 1645 break; 1646 1647 case UNSPEC_FPATAN: 1648 case UNSPEC_FYL2X: 1649 case UNSPEC_FYL2XP1: 1650 /* These insns operate on the top two stack slots. */ 1651 1652 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1653 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1654 1655 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1656 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1657 1658 swap_to_top (insn, regstack, *src1, *src2); 1659 1660 replace_reg (src1, FIRST_STACK_REG); 1661 replace_reg (src2, FIRST_STACK_REG + 1); 1662 1663 if (src1_note) 1664 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1665 if (src2_note) 1666 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1667 1668 /* Pop both input operands from the stack. */ 1669 CLEAR_HARD_REG_BIT (regstack->reg_set, 1670 regstack->reg[regstack->top]); 1671 CLEAR_HARD_REG_BIT (regstack->reg_set, 1672 regstack->reg[regstack->top - 1]); 1673 regstack->top -= 2; 1674 1675 /* Push the result back onto the stack. */ 1676 regstack->reg[++regstack->top] = REGNO (*dest); 1677 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1678 replace_reg (dest, FIRST_STACK_REG); 1679 break; 1680 1681 case UNSPEC_FSCALE_FRACT: 1682 case UNSPEC_FPREM_F: 1683 case UNSPEC_FPREM1_F: 1684 /* These insns operate on the top two stack slots. 1685 first part of double input, double output insn. */ 1686 1687 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1688 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1689 1690 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1691 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1692 1693 /* Inputs should never die, they are 1694 replaced with outputs. */ 1695 gcc_assert (!src1_note); 1696 gcc_assert (!src2_note); 1697 1698 swap_to_top (insn, regstack, *src1, *src2); 1699 1700 /* Push the result back onto stack. Empty stack slot 1701 will be filled in second part of insn. */ 1702 if (STACK_REG_P (*dest)) { 1703 regstack->reg[regstack->top] = REGNO (*dest); 1704 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1705 replace_reg (dest, FIRST_STACK_REG); 1706 } 1707 1708 replace_reg (src1, FIRST_STACK_REG); 1709 replace_reg (src2, FIRST_STACK_REG + 1); 1710 break; 1711 1712 case UNSPEC_FSCALE_EXP: 1713 case UNSPEC_FPREM_U: 1714 case UNSPEC_FPREM1_U: 1715 /* These insns operate on the top two stack slots./ 1716 second part of double input, double output insn. */ 1717 1718 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1719 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1720 1721 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1722 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1723 1724 /* Inputs should never die, they are 1725 replaced with outputs. */ 1726 gcc_assert (!src1_note); 1727 gcc_assert (!src2_note); 1728 1729 swap_to_top (insn, regstack, *src1, *src2); 1730 1731 /* Push the result back onto stack. Fill empty slot from 1732 first part of insn and fix top of stack pointer. */ 1733 if (STACK_REG_P (*dest)) { 1734 regstack->reg[regstack->top - 1] = REGNO (*dest); 1735 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1736 replace_reg (dest, FIRST_STACK_REG + 1); 1737 } 1738 1739 replace_reg (src1, FIRST_STACK_REG); 1740 replace_reg (src2, FIRST_STACK_REG + 1); 1741 break; 1742 1743 case UNSPEC_SINCOS_COS: 1744 case UNSPEC_TAN_ONE: 1745 case UNSPEC_XTRACT_FRACT: 1746 /* These insns operate on the top two stack slots, 1747 first part of one input, double output insn. */ 1748 1749 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1750 1751 emit_swap_insn (insn, regstack, *src1); 1752 1753 /* Input should never die, it is 1754 replaced with output. */ 1755 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1756 gcc_assert (!src1_note); 1757 1758 /* Push the result back onto stack. Empty stack slot 1759 will be filled in second part of insn. */ 1760 if (STACK_REG_P (*dest)) { 1761 regstack->reg[regstack->top + 1] = REGNO (*dest); 1762 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1763 replace_reg (dest, FIRST_STACK_REG); 1764 } 1765 1766 replace_reg (src1, FIRST_STACK_REG); 1767 break; 1768 1769 case UNSPEC_SINCOS_SIN: 1770 case UNSPEC_TAN_TAN: 1771 case UNSPEC_XTRACT_EXP: 1772 /* These insns operate on the top two stack slots, 1773 second part of one input, double output insn. */ 1774 1775 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1776 1777 emit_swap_insn (insn, regstack, *src1); 1778 1779 /* Input should never die, it is 1780 replaced with output. */ 1781 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1782 gcc_assert (!src1_note); 1783 1784 /* Push the result back onto stack. Fill empty slot from 1785 first part of insn and fix top of stack pointer. */ 1786 if (STACK_REG_P (*dest)) { 1787 regstack->reg[regstack->top] = REGNO (*dest); 1788 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1789 replace_reg (dest, FIRST_STACK_REG + 1); 1790 1791 regstack->top++; 1792 } 1793 1794 replace_reg (src1, FIRST_STACK_REG); 1795 break; 1796 1797 case UNSPEC_SAHF: 1798 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1799 The combination matches the PPRO fcomi instruction. */ 1800 1801 pat_src = XVECEXP (pat_src, 0, 0); 1802 gcc_assert (GET_CODE (pat_src) == UNSPEC); 1803 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); 1804 /* Fall through. */ 1805 1806 case UNSPEC_FNSTSW: 1807 /* Combined fcomp+fnstsw generated for doing well with 1808 CSE. When optimizing this would have been broken 1809 up before now. */ 1810 1811 pat_src = XVECEXP (pat_src, 0, 0); 1812 gcc_assert (GET_CODE (pat_src) == COMPARE); 1813 1814 compare_for_stack_reg (insn, regstack, pat_src); 1815 break; 1816 1817 default: 1818 gcc_unreachable (); 1819 } 1820 break; 1821 1822 case IF_THEN_ELSE: 1823 /* This insn requires the top of stack to be the destination. */ 1824 1825 src1 = get_true_reg (&XEXP (pat_src, 1)); 1826 src2 = get_true_reg (&XEXP (pat_src, 2)); 1827 1828 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1829 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1830 1831 /* If the comparison operator is an FP comparison operator, 1832 it is handled correctly by compare_for_stack_reg () who 1833 will move the destination to the top of stack. But if the 1834 comparison operator is not an FP comparison operator, we 1835 have to handle it here. */ 1836 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1837 && REGNO (*dest) != regstack->reg[regstack->top]) 1838 { 1839 /* In case one of operands is the top of stack and the operands 1840 dies, it is safe to make it the destination operand by 1841 reversing the direction of cmove and avoid fxch. */ 1842 if ((REGNO (*src1) == regstack->reg[regstack->top] 1843 && src1_note) 1844 || (REGNO (*src2) == regstack->reg[regstack->top] 1845 && src2_note)) 1846 { 1847 int idx1 = (get_hard_regnum (regstack, *src1) 1848 - FIRST_STACK_REG); 1849 int idx2 = (get_hard_regnum (regstack, *src2) 1850 - FIRST_STACK_REG); 1851 1852 /* Make reg-stack believe that the operands are already 1853 swapped on the stack */ 1854 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1855 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1856 1857 /* Reverse condition to compensate the operand swap. 1858 i386 do have comparison always reversible. */ 1859 PUT_CODE (XEXP (pat_src, 0), 1860 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1861 } 1862 else 1863 emit_swap_insn (insn, regstack, *dest); 1864 } 1865 1866 { 1867 rtx src_note [3]; 1868 int i; 1869 1870 src_note[0] = 0; 1871 src_note[1] = src1_note; 1872 src_note[2] = src2_note; 1873 1874 if (STACK_REG_P (*src1)) 1875 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1876 if (STACK_REG_P (*src2)) 1877 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1878 1879 for (i = 1; i <= 2; i++) 1880 if (src_note [i]) 1881 { 1882 int regno = REGNO (XEXP (src_note[i], 0)); 1883 1884 /* If the register that dies is not at the top of 1885 stack, then move the top of stack to the dead reg. 1886 Top of stack should never die, as it is the 1887 destination. */ 1888 gcc_assert (regno != regstack->reg[regstack->top]); 1889 remove_regno_note (insn, REG_DEAD, regno); 1890 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1891 EMIT_AFTER); 1892 } 1893 } 1894 1895 /* Make dest the top of stack. Add dest to regstack if 1896 not present. */ 1897 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1898 regstack->reg[++regstack->top] = REGNO (*dest); 1899 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1900 replace_reg (dest, FIRST_STACK_REG); 1901 break; 1902 1903 default: 1904 gcc_unreachable (); 1905 } 1906 break; 1907 } 1908 1909 default: 1910 break; 1911 } 1912 1913 return control_flow_insn_deleted; 1914} 1915 1916/* Substitute hard regnums for any stack regs in INSN, which has 1917 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1918 before the insn, and is updated with changes made here. 1919 1920 There are several requirements and assumptions about the use of 1921 stack-like regs in asm statements. These rules are enforced by 1922 record_asm_stack_regs; see comments there for details. Any 1923 asm_operands left in the RTL at this point may be assume to meet the 1924 requirements, since record_asm_stack_regs removes any problem asm. */ 1925 1926static void 1927subst_asm_stack_regs (rtx insn, stack regstack) 1928{ 1929 rtx body = PATTERN (insn); 1930 int alt; 1931 1932 rtx *note_reg; /* Array of note contents */ 1933 rtx **note_loc; /* Address of REG field of each note */ 1934 enum reg_note *note_kind; /* The type of each note */ 1935 1936 rtx *clobber_reg = 0; 1937 rtx **clobber_loc = 0; 1938 1939 struct stack_def temp_stack; 1940 int n_notes; 1941 int n_clobbers; 1942 rtx note; 1943 int i; 1944 int n_inputs, n_outputs; 1945 1946 if (! check_asm_stack_operands (insn)) 1947 return; 1948 1949 /* Find out what the constraints required. If no constraint 1950 alternative matches, that is a compiler bug: we should have caught 1951 such an insn in check_asm_stack_operands. */ 1952 extract_insn (insn); 1953 constrain_operands (1); 1954 alt = which_alternative; 1955 1956 preprocess_constraints (); 1957 1958 n_inputs = get_asm_operand_n_inputs (body); 1959 n_outputs = recog_data.n_operands - n_inputs; 1960 1961 gcc_assert (alt >= 0); 1962 1963 /* Strip SUBREGs here to make the following code simpler. */ 1964 for (i = 0; i < recog_data.n_operands; i++) 1965 if (GET_CODE (recog_data.operand[i]) == SUBREG 1966 && REG_P (SUBREG_REG (recog_data.operand[i]))) 1967 { 1968 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 1969 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1970 } 1971 1972 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 1973 1974 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1975 i++; 1976 1977 note_reg = alloca (i * sizeof (rtx)); 1978 note_loc = alloca (i * sizeof (rtx *)); 1979 note_kind = alloca (i * sizeof (enum reg_note)); 1980 1981 n_notes = 0; 1982 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1983 { 1984 rtx reg = XEXP (note, 0); 1985 rtx *loc = & XEXP (note, 0); 1986 1987 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 1988 { 1989 loc = & SUBREG_REG (reg); 1990 reg = SUBREG_REG (reg); 1991 } 1992 1993 if (STACK_REG_P (reg) 1994 && (REG_NOTE_KIND (note) == REG_DEAD 1995 || REG_NOTE_KIND (note) == REG_UNUSED)) 1996 { 1997 note_reg[n_notes] = reg; 1998 note_loc[n_notes] = loc; 1999 note_kind[n_notes] = REG_NOTE_KIND (note); 2000 n_notes++; 2001 } 2002 } 2003 2004 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2005 2006 n_clobbers = 0; 2007 2008 if (GET_CODE (body) == PARALLEL) 2009 { 2010 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 2011 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *)); 2012 2013 for (i = 0; i < XVECLEN (body, 0); i++) 2014 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2015 { 2016 rtx clobber = XVECEXP (body, 0, i); 2017 rtx reg = XEXP (clobber, 0); 2018 rtx *loc = & XEXP (clobber, 0); 2019 2020 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2021 { 2022 loc = & SUBREG_REG (reg); 2023 reg = SUBREG_REG (reg); 2024 } 2025 2026 if (STACK_REG_P (reg)) 2027 { 2028 clobber_reg[n_clobbers] = reg; 2029 clobber_loc[n_clobbers] = loc; 2030 n_clobbers++; 2031 } 2032 } 2033 } 2034 2035 temp_stack = *regstack; 2036 2037 /* Put the input regs into the desired place in TEMP_STACK. */ 2038 2039 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2040 if (STACK_REG_P (recog_data.operand[i]) 2041 && reg_class_subset_p (recog_op_alt[i][alt].cl, 2042 FLOAT_REGS) 2043 && recog_op_alt[i][alt].cl != FLOAT_REGS) 2044 { 2045 /* If an operand needs to be in a particular reg in 2046 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2047 these constraints are for single register classes, and 2048 reload guaranteed that operand[i] is already in that class, 2049 we can just use REGNO (recog_data.operand[i]) to know which 2050 actual reg this operand needs to be in. */ 2051 2052 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2053 2054 gcc_assert (regno >= 0); 2055 2056 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2057 { 2058 /* recog_data.operand[i] is not in the right place. Find 2059 it and swap it with whatever is already in I's place. 2060 K is where recog_data.operand[i] is now. J is where it 2061 should be. */ 2062 int j, k, temp; 2063 2064 k = temp_stack.top - (regno - FIRST_STACK_REG); 2065 j = (temp_stack.top 2066 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2067 2068 temp = temp_stack.reg[k]; 2069 temp_stack.reg[k] = temp_stack.reg[j]; 2070 temp_stack.reg[j] = temp; 2071 } 2072 } 2073 2074 /* Emit insns before INSN to make sure the reg-stack is in the right 2075 order. */ 2076 2077 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2078 2079 /* Make the needed input register substitutions. Do death notes and 2080 clobbers too, because these are for inputs, not outputs. */ 2081 2082 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2083 if (STACK_REG_P (recog_data.operand[i])) 2084 { 2085 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2086 2087 gcc_assert (regnum >= 0); 2088 2089 replace_reg (recog_data.operand_loc[i], regnum); 2090 } 2091 2092 for (i = 0; i < n_notes; i++) 2093 if (note_kind[i] == REG_DEAD) 2094 { 2095 int regnum = get_hard_regnum (regstack, note_reg[i]); 2096 2097 gcc_assert (regnum >= 0); 2098 2099 replace_reg (note_loc[i], regnum); 2100 } 2101 2102 for (i = 0; i < n_clobbers; i++) 2103 { 2104 /* It's OK for a CLOBBER to reference a reg that is not live. 2105 Don't try to replace it in that case. */ 2106 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2107 2108 if (regnum >= 0) 2109 { 2110 /* Sigh - clobbers always have QImode. But replace_reg knows 2111 that these regs can't be MODE_INT and will assert. Just put 2112 the right reg there without calling replace_reg. */ 2113 2114 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2115 } 2116 } 2117 2118 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2119 2120 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2121 if (STACK_REG_P (recog_data.operand[i])) 2122 { 2123 /* An input reg is implicitly popped if it is tied to an 2124 output, or if there is a CLOBBER for it. */ 2125 int j; 2126 2127 for (j = 0; j < n_clobbers; j++) 2128 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2129 break; 2130 2131 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2132 { 2133 /* recog_data.operand[i] might not be at the top of stack. 2134 But that's OK, because all we need to do is pop the 2135 right number of regs off of the top of the reg-stack. 2136 record_asm_stack_regs guaranteed that all implicitly 2137 popped regs were grouped at the top of the reg-stack. */ 2138 2139 CLEAR_HARD_REG_BIT (regstack->reg_set, 2140 regstack->reg[regstack->top]); 2141 regstack->top--; 2142 } 2143 } 2144 2145 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2146 Note that there isn't any need to substitute register numbers. 2147 ??? Explain why this is true. */ 2148 2149 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2150 { 2151 /* See if there is an output for this hard reg. */ 2152 int j; 2153 2154 for (j = 0; j < n_outputs; j++) 2155 if (STACK_REG_P (recog_data.operand[j]) 2156 && REGNO (recog_data.operand[j]) == (unsigned) i) 2157 { 2158 regstack->reg[++regstack->top] = i; 2159 SET_HARD_REG_BIT (regstack->reg_set, i); 2160 break; 2161 } 2162 } 2163 2164 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2165 input that the asm didn't implicitly pop. If the asm didn't 2166 implicitly pop an input reg, that reg will still be live. 2167 2168 Note that we can't use find_regno_note here: the register numbers 2169 in the death notes have already been substituted. */ 2170 2171 for (i = 0; i < n_outputs; i++) 2172 if (STACK_REG_P (recog_data.operand[i])) 2173 { 2174 int j; 2175 2176 for (j = 0; j < n_notes; j++) 2177 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2178 && note_kind[j] == REG_UNUSED) 2179 { 2180 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2181 EMIT_AFTER); 2182 break; 2183 } 2184 } 2185 2186 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2187 if (STACK_REG_P (recog_data.operand[i])) 2188 { 2189 int j; 2190 2191 for (j = 0; j < n_notes; j++) 2192 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2193 && note_kind[j] == REG_DEAD 2194 && TEST_HARD_REG_BIT (regstack->reg_set, 2195 REGNO (recog_data.operand[i]))) 2196 { 2197 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2198 EMIT_AFTER); 2199 break; 2200 } 2201 } 2202} 2203 2204/* Substitute stack hard reg numbers for stack virtual registers in 2205 INSN. Non-stack register numbers are not changed. REGSTACK is the 2206 current stack content. Insns may be emitted as needed to arrange the 2207 stack for the 387 based on the contents of the insn. Return whether 2208 a control flow insn was deleted in the process. */ 2209 2210static bool 2211subst_stack_regs (rtx insn, stack regstack) 2212{ 2213 rtx *note_link, note; 2214 bool control_flow_insn_deleted = false; 2215 int i; 2216 2217 if (CALL_P (insn)) 2218 { 2219 int top = regstack->top; 2220 2221 /* If there are any floating point parameters to be passed in 2222 registers for this call, make sure they are in the right 2223 order. */ 2224 2225 if (top >= 0) 2226 { 2227 straighten_stack (insn, regstack); 2228 2229 /* Now mark the arguments as dead after the call. */ 2230 2231 while (regstack->top >= 0) 2232 { 2233 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2234 regstack->top--; 2235 } 2236 } 2237 } 2238 2239 /* Do the actual substitution if any stack regs are mentioned. 2240 Since we only record whether entire insn mentions stack regs, and 2241 subst_stack_regs_pat only works for patterns that contain stack regs, 2242 we must check each pattern in a parallel here. A call_value_pop could 2243 fail otherwise. */ 2244 2245 if (stack_regs_mentioned (insn)) 2246 { 2247 int n_operands = asm_noperands (PATTERN (insn)); 2248 if (n_operands >= 0) 2249 { 2250 /* This insn is an `asm' with operands. Decode the operands, 2251 decide how many are inputs, and do register substitution. 2252 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2253 2254 subst_asm_stack_regs (insn, regstack); 2255 return control_flow_insn_deleted; 2256 } 2257 2258 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2259 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2260 { 2261 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2262 { 2263 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2264 XVECEXP (PATTERN (insn), 0, i) 2265 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2266 control_flow_insn_deleted 2267 |= subst_stack_regs_pat (insn, regstack, 2268 XVECEXP (PATTERN (insn), 0, i)); 2269 } 2270 } 2271 else 2272 control_flow_insn_deleted 2273 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2274 } 2275 2276 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2277 REG_UNUSED will already have been dealt with, so just return. */ 2278 2279 if (NOTE_P (insn) || INSN_DELETED_P (insn)) 2280 return control_flow_insn_deleted; 2281 2282 /* If this a noreturn call, we can't insert pop insns after it. 2283 Instead, reset the stack state to empty. */ 2284 if (CALL_P (insn) 2285 && find_reg_note (insn, REG_NORETURN, NULL)) 2286 { 2287 regstack->top = -1; 2288 CLEAR_HARD_REG_SET (regstack->reg_set); 2289 return control_flow_insn_deleted; 2290 } 2291 2292 /* If there is a REG_UNUSED note on a stack register on this insn, 2293 the indicated reg must be popped. The REG_UNUSED note is removed, 2294 since the form of the newly emitted pop insn references the reg, 2295 making it no longer `unset'. */ 2296 2297 note_link = ®_NOTES (insn); 2298 for (note = *note_link; note; note = XEXP (note, 1)) 2299 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2300 { 2301 *note_link = XEXP (note, 1); 2302 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2303 } 2304 else 2305 note_link = &XEXP (note, 1); 2306 2307 return control_flow_insn_deleted; 2308} 2309 2310/* Change the organization of the stack so that it fits a new basic 2311 block. Some registers might have to be popped, but there can never be 2312 a register live in the new block that is not now live. 2313 2314 Insert any needed insns before or after INSN, as indicated by 2315 WHERE. OLD is the original stack layout, and NEW is the desired 2316 form. OLD is updated to reflect the code emitted, i.e., it will be 2317 the same as NEW upon return. 2318 2319 This function will not preserve block_end[]. But that information 2320 is no longer needed once this has executed. */ 2321 2322static void 2323change_stack (rtx insn, stack old, stack new, enum emit_where where) 2324{ 2325 int reg; 2326 int update_end = 0; 2327 2328 /* Stack adjustments for the first insn in a block update the 2329 current_block's stack_in instead of inserting insns directly. 2330 compensate_edges will add the necessary code later. */ 2331 if (current_block 2332 && starting_stack_p 2333 && where == EMIT_BEFORE) 2334 { 2335 BLOCK_INFO (current_block)->stack_in = *new; 2336 starting_stack_p = false; 2337 *old = *new; 2338 return; 2339 } 2340 2341 /* We will be inserting new insns "backwards". If we are to insert 2342 after INSN, find the next insn, and insert before it. */ 2343 2344 if (where == EMIT_AFTER) 2345 { 2346 if (current_block && BB_END (current_block) == insn) 2347 update_end = 1; 2348 insn = NEXT_INSN (insn); 2349 } 2350 2351 /* Pop any registers that are not needed in the new block. */ 2352 2353 /* If the destination block's stack already has a specified layout 2354 and contains two or more registers, use a more intelligent algorithm 2355 to pop registers that minimizes the number number of fxchs below. */ 2356 if (new->top > 0) 2357 { 2358 bool slots[REG_STACK_SIZE]; 2359 int pops[REG_STACK_SIZE]; 2360 int next, dest, topsrc; 2361 2362 /* First pass to determine the free slots. */ 2363 for (reg = 0; reg <= new->top; reg++) 2364 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]); 2365 2366 /* Second pass to allocate preferred slots. */ 2367 topsrc = -1; 2368 for (reg = old->top; reg > new->top; reg--) 2369 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2370 { 2371 dest = -1; 2372 for (next = 0; next <= new->top; next++) 2373 if (!slots[next] && new->reg[next] == old->reg[reg]) 2374 { 2375 /* If this is a preference for the new top of stack, record 2376 the fact by remembering it's old->reg in topsrc. */ 2377 if (next == new->top) 2378 topsrc = reg; 2379 slots[next] = true; 2380 dest = next; 2381 break; 2382 } 2383 pops[reg] = dest; 2384 } 2385 else 2386 pops[reg] = reg; 2387 2388 /* Intentionally, avoid placing the top of stack in it's correct 2389 location, if we still need to permute the stack below and we 2390 can usefully place it somewhere else. This is the case if any 2391 slot is still unallocated, in which case we should place the 2392 top of stack there. */ 2393 if (topsrc != -1) 2394 for (reg = 0; reg < new->top; reg++) 2395 if (!slots[reg]) 2396 { 2397 pops[topsrc] = reg; 2398 slots[new->top] = false; 2399 slots[reg] = true; 2400 break; 2401 } 2402 2403 /* Third pass allocates remaining slots and emits pop insns. */ 2404 next = new->top; 2405 for (reg = old->top; reg > new->top; reg--) 2406 { 2407 dest = pops[reg]; 2408 if (dest == -1) 2409 { 2410 /* Find next free slot. */ 2411 while (slots[next]) 2412 next--; 2413 dest = next--; 2414 } 2415 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2416 EMIT_BEFORE); 2417 } 2418 } 2419 else 2420 { 2421 /* The following loop attempts to maximize the number of times we 2422 pop the top of the stack, as this permits the use of the faster 2423 ffreep instruction on platforms that support it. */ 2424 int live, next; 2425 2426 live = 0; 2427 for (reg = 0; reg <= old->top; reg++) 2428 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2429 live++; 2430 2431 next = live; 2432 while (old->top >= live) 2433 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top])) 2434 { 2435 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next])) 2436 next--; 2437 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2438 EMIT_BEFORE); 2439 } 2440 else 2441 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2442 EMIT_BEFORE); 2443 } 2444 2445 if (new->top == -2) 2446 { 2447 /* If the new block has never been processed, then it can inherit 2448 the old stack order. */ 2449 2450 new->top = old->top; 2451 memcpy (new->reg, old->reg, sizeof (new->reg)); 2452 } 2453 else 2454 { 2455 /* This block has been entered before, and we must match the 2456 previously selected stack order. */ 2457 2458 /* By now, the only difference should be the order of the stack, 2459 not their depth or liveliness. */ 2460 2461 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2462 gcc_unreachable (); 2463 win: 2464 gcc_assert (old->top == new->top); 2465 2466 /* If the stack is not empty (new->top != -1), loop here emitting 2467 swaps until the stack is correct. 2468 2469 The worst case number of swaps emitted is N + 2, where N is the 2470 depth of the stack. In some cases, the reg at the top of 2471 stack may be correct, but swapped anyway in order to fix 2472 other regs. But since we never swap any other reg away from 2473 its correct slot, this algorithm will converge. */ 2474 2475 if (new->top != -1) 2476 do 2477 { 2478 /* Swap the reg at top of stack into the position it is 2479 supposed to be in, until the correct top of stack appears. */ 2480 2481 while (old->reg[old->top] != new->reg[new->top]) 2482 { 2483 for (reg = new->top; reg >= 0; reg--) 2484 if (new->reg[reg] == old->reg[old->top]) 2485 break; 2486 2487 gcc_assert (reg != -1); 2488 2489 emit_swap_insn (insn, old, 2490 FP_MODE_REG (old->reg[reg], DFmode)); 2491 } 2492 2493 /* See if any regs remain incorrect. If so, bring an 2494 incorrect reg to the top of stack, and let the while loop 2495 above fix it. */ 2496 2497 for (reg = new->top; reg >= 0; reg--) 2498 if (new->reg[reg] != old->reg[reg]) 2499 { 2500 emit_swap_insn (insn, old, 2501 FP_MODE_REG (old->reg[reg], DFmode)); 2502 break; 2503 } 2504 } while (reg >= 0); 2505 2506 /* At this point there must be no differences. */ 2507 2508 for (reg = old->top; reg >= 0; reg--) 2509 gcc_assert (old->reg[reg] == new->reg[reg]); 2510 } 2511 2512 if (update_end) 2513 BB_END (current_block) = PREV_INSN (insn); 2514} 2515 2516/* Print stack configuration. */ 2517 2518static void 2519print_stack (FILE *file, stack s) 2520{ 2521 if (! file) 2522 return; 2523 2524 if (s->top == -2) 2525 fprintf (file, "uninitialized\n"); 2526 else if (s->top == -1) 2527 fprintf (file, "empty\n"); 2528 else 2529 { 2530 int i; 2531 fputs ("[ ", file); 2532 for (i = 0; i <= s->top; ++i) 2533 fprintf (file, "%d ", s->reg[i]); 2534 fputs ("]\n", file); 2535 } 2536} 2537 2538/* This function was doing life analysis. We now let the regular live 2539 code do it's job, so we only need to check some extra invariants 2540 that reg-stack expects. Primary among these being that all registers 2541 are initialized before use. 2542 2543 The function returns true when code was emitted to CFG edges and 2544 commit_edge_insertions needs to be called. */ 2545 2546static int 2547convert_regs_entry (void) 2548{ 2549 int inserted = 0; 2550 edge e; 2551 edge_iterator ei; 2552 2553 /* Load something into each stack register live at function entry. 2554 Such live registers can be caused by uninitialized variables or 2555 functions not returning values on all paths. In order to keep 2556 the push/pop code happy, and to not scrog the register stack, we 2557 must put something in these registers. Use a QNaN. 2558 2559 Note that we are inserting converted code here. This code is 2560 never seen by the convert_regs pass. */ 2561 2562 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 2563 { 2564 basic_block block = e->dest; 2565 block_info bi = BLOCK_INFO (block); 2566 int reg, top = -1; 2567 2568 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2569 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2570 { 2571 rtx init; 2572 2573 bi->stack_in.reg[++top] = reg; 2574 2575 init = gen_rtx_SET (VOIDmode, 2576 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2577 not_a_num); 2578 insert_insn_on_edge (init, e); 2579 inserted = 1; 2580 } 2581 2582 bi->stack_in.top = top; 2583 } 2584 2585 return inserted; 2586} 2587 2588/* Construct the desired stack for function exit. This will either 2589 be `empty', or the function return value at top-of-stack. */ 2590 2591static void 2592convert_regs_exit (void) 2593{ 2594 int value_reg_low, value_reg_high; 2595 stack output_stack; 2596 rtx retvalue; 2597 2598 retvalue = stack_result (current_function_decl); 2599 value_reg_low = value_reg_high = -1; 2600 if (retvalue) 2601 { 2602 value_reg_low = REGNO (retvalue); 2603 value_reg_high = value_reg_low 2604 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1; 2605 } 2606 2607 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2608 if (value_reg_low == -1) 2609 output_stack->top = -1; 2610 else 2611 { 2612 int reg; 2613 2614 output_stack->top = value_reg_high - value_reg_low; 2615 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2616 { 2617 output_stack->reg[value_reg_high - reg] = reg; 2618 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2619 } 2620 } 2621} 2622 2623/* Copy the stack info from the end of edge E's source block to the 2624 start of E's destination block. */ 2625 2626static void 2627propagate_stack (edge e) 2628{ 2629 stack src_stack = &BLOCK_INFO (e->src)->stack_out; 2630 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2631 int reg; 2632 2633 /* Preserve the order of the original stack, but check whether 2634 any pops are needed. */ 2635 dest_stack->top = -1; 2636 for (reg = 0; reg <= src_stack->top; ++reg) 2637 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2638 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2639} 2640 2641 2642/* Adjust the stack of edge E's source block on exit to match the stack 2643 of it's target block upon input. The stack layouts of both blocks 2644 should have been defined by now. */ 2645 2646static bool 2647compensate_edge (edge e, FILE *file) 2648{ 2649 basic_block source = e->src, target = e->dest; 2650 stack target_stack = &BLOCK_INFO (target)->stack_in; 2651 stack source_stack = &BLOCK_INFO (source)->stack_out; 2652 struct stack_def regstack; 2653 int reg; 2654 2655 if (file) 2656 fprintf (file, "Edge %d->%d: ", source->index, target->index); 2657 2658 gcc_assert (target_stack->top != -2); 2659 2660 /* Check whether stacks are identical. */ 2661 if (target_stack->top == source_stack->top) 2662 { 2663 for (reg = target_stack->top; reg >= 0; --reg) 2664 if (target_stack->reg[reg] != source_stack->reg[reg]) 2665 break; 2666 2667 if (reg == -1) 2668 { 2669 if (file) 2670 fprintf (file, "no changes needed\n"); 2671 return false; 2672 } 2673 } 2674 2675 if (file) 2676 { 2677 fprintf (file, "correcting stack to "); 2678 print_stack (file, target_stack); 2679 } 2680 2681 /* Abnormal calls may appear to have values live in st(0), but the 2682 abnormal return path will not have actually loaded the values. */ 2683 if (e->flags & EDGE_ABNORMAL_CALL) 2684 { 2685 /* Assert that the lifetimes are as we expect -- one value 2686 live at st(0) on the end of the source block, and no 2687 values live at the beginning of the destination block. 2688 For complex return values, we may have st(1) live as well. */ 2689 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2690 gcc_assert (target_stack->top == -1); 2691 return false; 2692 } 2693 2694 /* Handle non-call EH edges specially. The normal return path have 2695 values in registers. These will be popped en masse by the unwind 2696 library. */ 2697 if (e->flags & EDGE_EH) 2698 { 2699 gcc_assert (target_stack->top == -1); 2700 return false; 2701 } 2702 2703 /* We don't support abnormal edges. Global takes care to 2704 avoid any live register across them, so we should never 2705 have to insert instructions on such edges. */ 2706 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2707 2708 /* Make a copy of source_stack as change_stack is destructive. */ 2709 regstack = *source_stack; 2710 2711 /* It is better to output directly to the end of the block 2712 instead of to the edge, because emit_swap can do minimal 2713 insn scheduling. We can do this when there is only one 2714 edge out, and it is not abnormal. */ 2715 if (EDGE_COUNT (source->succs) == 1) 2716 { 2717 current_block = source; 2718 change_stack (BB_END (source), ®stack, target_stack, 2719 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2720 } 2721 else 2722 { 2723 rtx seq, after; 2724 2725 current_block = NULL; 2726 start_sequence (); 2727 2728 /* ??? change_stack needs some point to emit insns after. */ 2729 after = emit_note (NOTE_INSN_DELETED); 2730 2731 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2732 2733 seq = get_insns (); 2734 end_sequence (); 2735 2736 insert_insn_on_edge (seq, e); 2737 return true; 2738 } 2739 return false; 2740} 2741 2742/* Traverse all non-entry edges in the CFG, and emit the necessary 2743 edge compensation code to change the stack from stack_out of the 2744 source block to the stack_in of the destination block. */ 2745 2746static bool 2747compensate_edges (FILE *file) 2748{ 2749 bool inserted = false; 2750 basic_block bb; 2751 2752 starting_stack_p = false; 2753 2754 FOR_EACH_BB (bb) 2755 if (bb != ENTRY_BLOCK_PTR) 2756 { 2757 edge e; 2758 edge_iterator ei; 2759 2760 FOR_EACH_EDGE (e, ei, bb->succs) 2761 inserted |= compensate_edge (e, file); 2762 } 2763 return inserted; 2764} 2765 2766/* Select the better of two edges E1 and E2 to use to determine the 2767 stack layout for their shared destination basic block. This is 2768 typically the more frequently executed. The edge E1 may be NULL 2769 (in which case E2 is returned), but E2 is always non-NULL. */ 2770 2771static edge 2772better_edge (edge e1, edge e2) 2773{ 2774 if (!e1) 2775 return e2; 2776 2777 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) 2778 return e1; 2779 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) 2780 return e2; 2781 2782 if (e1->count > e2->count) 2783 return e1; 2784 if (e1->count < e2->count) 2785 return e2; 2786 2787 /* Prefer critical edges to minimize inserting compensation code on 2788 critical edges. */ 2789 2790 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2791 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2792 2793 /* Avoid non-deterministic behavior. */ 2794 return (e1->src->index < e2->src->index) ? e1 : e2; 2795} 2796 2797/* Convert stack register references in one block. */ 2798 2799static void 2800convert_regs_1 (FILE *file, basic_block block) 2801{ 2802 struct stack_def regstack; 2803 block_info bi = BLOCK_INFO (block); 2804 int reg; 2805 rtx insn, next; 2806 bool control_flow_insn_deleted = false; 2807 2808 any_malformed_asm = false; 2809 2810 /* Choose an initial stack layout, if one hasn't already been chosen. */ 2811 if (bi->stack_in.top == -2) 2812 { 2813 edge e, beste = NULL; 2814 edge_iterator ei; 2815 2816 /* Select the best incoming edge (typically the most frequent) to 2817 use as a template for this basic block. */ 2818 FOR_EACH_EDGE (e, ei, block->preds) 2819 if (BLOCK_INFO (e->src)->done) 2820 beste = better_edge (beste, e); 2821 2822 if (beste) 2823 propagate_stack (beste); 2824 else 2825 { 2826 /* No predecessors. Create an arbitrary input stack. */ 2827 bi->stack_in.top = -1; 2828 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2829 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2830 bi->stack_in.reg[++bi->stack_in.top] = reg; 2831 } 2832 } 2833 2834 if (file) 2835 { 2836 fprintf (file, "\nBasic block %d\nInput stack: ", block->index); 2837 print_stack (file, &bi->stack_in); 2838 } 2839 2840 /* Process all insns in this block. Keep track of NEXT so that we 2841 don't process insns emitted while substituting in INSN. */ 2842 current_block = block; 2843 next = BB_HEAD (block); 2844 regstack = bi->stack_in; 2845 starting_stack_p = true; 2846 2847 do 2848 { 2849 insn = next; 2850 next = NEXT_INSN (insn); 2851 2852 /* Ensure we have not missed a block boundary. */ 2853 gcc_assert (next); 2854 if (insn == BB_END (block)) 2855 next = NULL; 2856 2857 /* Don't bother processing unless there is a stack reg 2858 mentioned or if it's a CALL_INSN. */ 2859 if (stack_regs_mentioned (insn) 2860 || CALL_P (insn)) 2861 { 2862 if (file) 2863 { 2864 fprintf (file, " insn %d input stack: ", 2865 INSN_UID (insn)); 2866 print_stack (file, ®stack); 2867 } 2868 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2869 starting_stack_p = false; 2870 } 2871 } 2872 while (next); 2873 2874 if (file) 2875 { 2876 fprintf (file, "Expected live registers ["); 2877 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2878 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 2879 fprintf (file, " %d", reg); 2880 fprintf (file, " ]\nOutput stack: "); 2881 print_stack (file, ®stack); 2882 } 2883 2884 insn = BB_END (block); 2885 if (JUMP_P (insn)) 2886 insn = PREV_INSN (insn); 2887 2888 /* If the function is declared to return a value, but it returns one 2889 in only some cases, some registers might come live here. Emit 2890 necessary moves for them. */ 2891 2892 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2893 { 2894 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 2895 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 2896 { 2897 rtx set; 2898 2899 if (file) 2900 fprintf (file, "Emitting insn initializing reg %d\n", reg); 2901 2902 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); 2903 insn = emit_insn_after (set, insn); 2904 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2905 } 2906 } 2907 2908 /* Amongst the insns possibly deleted during the substitution process above, 2909 might have been the only trapping insn in the block. We purge the now 2910 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 2911 called at the end of convert_regs. The order in which we process the 2912 blocks ensures that we never delete an already processed edge. 2913 2914 Note that, at this point, the CFG may have been damaged by the emission 2915 of instructions after an abnormal call, which moves the basic block end 2916 (and is the reason why we call fixup_abnormal_edges later). So we must 2917 be sure that the trapping insn has been deleted before trying to purge 2918 dead edges, otherwise we risk purging valid edges. 2919 2920 ??? We are normally supposed not to delete trapping insns, so we pretend 2921 that the insns deleted above don't actually trap. It would have been 2922 better to detect this earlier and avoid creating the EH edge in the first 2923 place, still, but we don't have enough information at that time. */ 2924 2925 if (control_flow_insn_deleted) 2926 purge_dead_edges (block); 2927 2928 /* Something failed if the stack lives don't match. If we had malformed 2929 asms, we zapped the instruction itself, but that didn't produce the 2930 same pattern of register kills as before. */ 2931 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); 2932 gcc_assert (any_malformed_asm); 2933 win: 2934 bi->stack_out = regstack; 2935 bi->done = true; 2936} 2937 2938/* Convert registers in all blocks reachable from BLOCK. */ 2939 2940static void 2941convert_regs_2 (FILE *file, basic_block block) 2942{ 2943 basic_block *stack, *sp; 2944 2945 /* We process the blocks in a top-down manner, in a way such that one block 2946 is only processed after all its predecessors. The number of predecessors 2947 of every block has already been computed. */ 2948 2949 stack = xmalloc (sizeof (*stack) * n_basic_blocks); 2950 sp = stack; 2951 2952 *sp++ = block; 2953 2954 do 2955 { 2956 edge e; 2957 edge_iterator ei; 2958 2959 block = *--sp; 2960 2961 /* Processing BLOCK is achieved by convert_regs_1, which may purge 2962 some dead EH outgoing edge after the deletion of the trapping 2963 insn inside the block. Since the number of predecessors of 2964 BLOCK's successors was computed based on the initial edge set, 2965 we check the necessity to process some of these successors 2966 before such an edge deletion may happen. However, there is 2967 a pitfall: if BLOCK is the only predecessor of a successor and 2968 the edge between them happens to be deleted, the successor 2969 becomes unreachable and should not be processed. The problem 2970 is that there is no way to preventively detect this case so we 2971 stack the successor in all cases and hand over the task of 2972 fixing up the discrepancy to convert_regs_1. */ 2973 2974 FOR_EACH_EDGE (e, ei, block->succs) 2975 if (! (e->flags & EDGE_DFS_BACK)) 2976 { 2977 BLOCK_INFO (e->dest)->predecessors--; 2978 if (!BLOCK_INFO (e->dest)->predecessors) 2979 *sp++ = e->dest; 2980 } 2981 2982 convert_regs_1 (file, block); 2983 } 2984 while (sp != stack); 2985 2986 free (stack); 2987} 2988 2989/* Traverse all basic blocks in a function, converting the register 2990 references in each insn from the "flat" register file that gcc uses, 2991 to the stack-like registers the 387 uses. */ 2992 2993static void 2994convert_regs (FILE *file) 2995{ 2996 int inserted; 2997 basic_block b; 2998 edge e; 2999 edge_iterator ei; 3000 3001 /* Initialize uninitialized registers on function entry. */ 3002 inserted = convert_regs_entry (); 3003 3004 /* Construct the desired stack for function exit. */ 3005 convert_regs_exit (); 3006 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 3007 3008 /* ??? Future: process inner loops first, and give them arbitrary 3009 initial stacks which emit_swap_insn can modify. This ought to 3010 prevent double fxch that often appears at the head of a loop. */ 3011 3012 /* Process all blocks reachable from all entry points. */ 3013 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 3014 convert_regs_2 (file, e->dest); 3015 3016 /* ??? Process all unreachable blocks. Though there's no excuse 3017 for keeping these even when not optimizing. */ 3018 FOR_EACH_BB (b) 3019 { 3020 block_info bi = BLOCK_INFO (b); 3021 3022 if (! bi->done) 3023 convert_regs_2 (file, b); 3024 } 3025 3026 inserted |= compensate_edges (file); 3027 3028 clear_aux_for_blocks (); 3029 3030 fixup_abnormal_edges (); 3031 if (inserted) 3032 commit_edge_insertions (); 3033 3034 if (file) 3035 fputc ('\n', file); 3036} 3037 3038/* Convert register usage from "flat" register file usage to a "stack 3039 register file. FILE is the dump file, if used. 3040 3041 Construct a CFG and run life analysis. Then convert each insn one 3042 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3043 code duplication created when the converter inserts pop insns on 3044 the edges. */ 3045 3046bool 3047reg_to_stack (FILE *file) 3048{ 3049 basic_block bb; 3050 int i; 3051 int max_uid; 3052 3053 /* Clean up previous run. */ 3054 stack_regs_mentioned_data = 0; 3055 3056 /* See if there is something to do. Flow analysis is quite 3057 expensive so we might save some compilation time. */ 3058 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3059 if (regs_ever_live[i]) 3060 break; 3061 if (i > LAST_STACK_REG) 3062 return false; 3063 3064 /* Ok, floating point instructions exist. If not optimizing, 3065 build the CFG and run life analysis. 3066 Also need to rebuild life when superblock scheduling is done 3067 as it don't update liveness yet. */ 3068 if (!optimize 3069 || ((flag_sched2_use_superblocks || flag_sched2_use_traces) 3070 && flag_schedule_insns_after_reload)) 3071 { 3072 count_or_remove_death_notes (NULL, 1); 3073 life_analysis (file, PROP_DEATH_NOTES); 3074 } 3075 mark_dfs_back_edges (); 3076 3077 /* Set up block info for each basic block. */ 3078 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3079 FOR_EACH_BB (bb) 3080 { 3081 block_info bi = BLOCK_INFO (bb); 3082 edge_iterator ei; 3083 edge e; 3084 int reg; 3085 3086 FOR_EACH_EDGE (e, ei, bb->preds) 3087 if (!(e->flags & EDGE_DFS_BACK) 3088 && e->src != ENTRY_BLOCK_PTR) 3089 bi->predecessors++; 3090 3091 /* Set current register status at last instruction `uninitialized'. */ 3092 bi->stack_in.top = -2; 3093 3094 /* Copy live_at_end and live_at_start into temporaries. */ 3095 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3096 { 3097 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg)) 3098 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3099 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg)) 3100 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3101 } 3102 } 3103 3104 /* Create the replacement registers up front. */ 3105 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3106 { 3107 enum machine_mode mode; 3108 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 3109 mode != VOIDmode; 3110 mode = GET_MODE_WIDER_MODE (mode)) 3111 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3112 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 3113 mode != VOIDmode; 3114 mode = GET_MODE_WIDER_MODE (mode)) 3115 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3116 } 3117 3118 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3119 3120 /* A QNaN for initializing uninitialized variables. 3121 3122 ??? We can't load from constant memory in PIC mode, because 3123 we're inserting these instructions before the prologue and 3124 the PIC register hasn't been set up. In that case, fall back 3125 on zero, which we can get from `ldz'. */ 3126 3127 if (flag_pic) 3128 not_a_num = CONST0_RTX (SFmode); 3129 else 3130 { 3131 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); 3132 not_a_num = force_const_mem (SFmode, not_a_num); 3133 } 3134 3135 /* Allocate a cache for stack_regs_mentioned. */ 3136 max_uid = get_max_uid (); 3137 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, 3138 "stack_regs_mentioned cache"); 3139 3140 convert_regs (file); 3141 3142 free_aux_for_blocks (); 3143 return true; 3144} 3145#endif /* STACK_REGS */ 3146 3147static bool 3148gate_handle_stack_regs (void) 3149{ 3150#ifdef STACK_REGS 3151 return 1; 3152#else 3153 return 0; 3154#endif 3155} 3156 3157/* Convert register usage from flat register file usage to a stack 3158 register file. */ 3159static void 3160rest_of_handle_stack_regs (void) 3161{ 3162#ifdef STACK_REGS 3163 if (reg_to_stack (dump_file) && optimize) 3164 { 3165 if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK 3166 | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0)) 3167 && (flag_reorder_blocks || flag_reorder_blocks_and_partition)) 3168 { 3169 reorder_basic_blocks (0); 3170 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK); 3171 } 3172 } 3173#endif 3174} 3175 3176struct tree_opt_pass pass_stack_regs = 3177{ 3178 "stack", /* name */ 3179 gate_handle_stack_regs, /* gate */ 3180 rest_of_handle_stack_regs, /* execute */ 3181 NULL, /* sub */ 3182 NULL, /* next */ 3183 0, /* static_pass_number */ 3184 TV_REG_STACK, /* tv_id */ 3185 0, /* properties_required */ 3186 0, /* properties_provided */ 3187 0, /* properties_destroyed */ 3188 0, /* todo_flags_start */ 3189 TODO_dump_func | 3190 TODO_ggc_collect, /* todo_flags_finish */ 3191 'k' /* letter */ 3192}; 3193 3194#include "gt-reg-stack.h" 3195