1/* Target macros for the FRV port of GCC. 2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005 3 Free Software Foundation, Inc. 4 Contributed by Red Hat Inc. 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify it 9 under the terms of the GNU General Public License as published 10 by the Free Software Foundation; either version 2, or (at your 11 option) any later version. 12 13 GCC is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING. If not, write to the Free 20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 21 02110-1301, USA. */ 22 23#ifndef __FRV_H__ 24#define __FRV_H__ 25 26/* Frv general purpose macros. */ 27/* Align an address. */ 28#define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1)) 29 30/* Return true if a value is inside a range. */ 31#define IN_RANGE_P(VALUE, LOW, HIGH) \ 32 ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \ 33 && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH)))) 34 35 36/* Driver configuration. */ 37 38/* A C expression which determines whether the option `-CHAR' takes arguments. 39 The value should be the number of arguments that option takes-zero, for many 40 options. 41 42 By default, this macro is defined to handle the standard options properly. 43 You need not define it unless you wish to add additional options which take 44 arguments. 45 46 Defined in svr4.h. */ 47#undef SWITCH_TAKES_ARG 48#define SWITCH_TAKES_ARG(CHAR) \ 49 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G') 50 51/* A C expression which determines whether the option `-NAME' takes arguments. 52 The value should be the number of arguments that option takes-zero, for many 53 options. This macro rather than `SWITCH_TAKES_ARG' is used for 54 multi-character option names. 55 56 By default, this macro is defined as `DEFAULT_WORD_SWITCH_TAKES_ARG', which 57 handles the standard options properly. You need not define 58 `WORD_SWITCH_TAKES_ARG' unless you wish to add additional options which take 59 arguments. Any redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and 60 then check for additional options. 61 62 Defined in svr4.h. */ 63#undef WORD_SWITCH_TAKES_ARG 64 65/* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with 66 FDPIC which multilib to use depends on whether FDPIC is in use or 67 not. The trick we use is to introduce -multilib-library-pic as a 68 pseudo-flag that selects the library-pic multilib, and map fpic 69 and fPIC to it only if fdpic is not selected. Also, if fdpic is 70 selected and no PIC/PIE options are present, we imply -fPIE. 71 Otherwise, if -fpic or -fPIC are enabled and we're optimizing for 72 speed, or if we have -On with n>=3, enable inlining of PLTs. As 73 for -mgprel-ro, we want to enable it by default, but not for -fpic or 74 -fpie. */ 75 76#define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \ 77"%{mno-pack:\ 78 %{!mhard-float:-msoft-float}\ 79 %{!mmedia:-mno-media}}\ 80 %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\ 81 %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\ 82 %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \ 83 %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \ 84 %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \ 85 %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \ 86" 87#ifndef SUBTARGET_DRIVER_SELF_SPECS 88# define SUBTARGET_DRIVER_SELF_SPECS 89#endif 90 91/* A C string constant that tells the GCC driver program options to pass to 92 the assembler. It can also specify how to translate options you give to GNU 93 CC into options for GCC to pass to the assembler. See the file `sun3.h' 94 for an example of this. 95 96 Do not define this macro if it does not need to do anything. 97 98 Defined in svr4.h. */ 99#undef ASM_SPEC 100#define ASM_SPEC "\ 101%{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \ 102%{mtomcat-stats} \ 103%{!mno-eflags: \ 104 %{mcpu=*} \ 105 %{mgpr-*} %{mfpr-*} \ 106 %{msoft-float} %{mhard-float} \ 107 %{mdword} %{mno-dword} \ 108 %{mdouble} %{mno-double} \ 109 %{mmedia} %{mno-media} \ 110 %{mmuladd} %{mno-muladd} \ 111 %{mpack} %{mno-pack} \ 112 %{mno-fdpic:-mnopic} %{mfdpic} \ 113 %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}" 114 115/* Another C string constant used much like `LINK_SPEC'. The difference 116 between the two is that `STARTFILE_SPEC' is used at the very beginning of 117 the command given to the linker. 118 119 If this macro is not defined, a default is provided that loads the standard 120 C startup file from the usual place. See `gcc.c'. 121 122 Defined in svr4.h. */ 123#undef STARTFILE_SPEC 124#define STARTFILE_SPEC "crt0%O%s frvbegin%O%s" 125 126/* Another C string constant used much like `LINK_SPEC'. The difference 127 between the two is that `ENDFILE_SPEC' is used at the very end of the 128 command given to the linker. 129 130 Do not define this macro if it does not need to do anything. 131 132 Defined in svr4.h. */ 133#undef ENDFILE_SPEC 134#define ENDFILE_SPEC "frvend%O%s" 135 136 137#define MASK_DEFAULT_FRV \ 138 (MASK_MEDIA \ 139 | MASK_DOUBLE \ 140 | MASK_MULADD \ 141 | MASK_DWORD \ 142 | MASK_PACK) 143 144#define MASK_DEFAULT_FR500 \ 145 (MASK_MEDIA | MASK_DWORD | MASK_PACK) 146 147#define MASK_DEFAULT_FR550 \ 148 (MASK_MEDIA | MASK_DWORD | MASK_PACK) 149 150#define MASK_DEFAULT_FR450 \ 151 (MASK_GPR_32 \ 152 | MASK_FPR_32 \ 153 | MASK_MEDIA \ 154 | MASK_SOFT_FLOAT \ 155 | MASK_DWORD \ 156 | MASK_PACK) 157 158#define MASK_DEFAULT_FR400 \ 159 (MASK_GPR_32 \ 160 | MASK_FPR_32 \ 161 | MASK_MEDIA \ 162 | MASK_ACC_4 \ 163 | MASK_SOFT_FLOAT \ 164 | MASK_DWORD \ 165 | MASK_PACK) 166 167#define MASK_DEFAULT_SIMPLE \ 168 (MASK_GPR_32 | MASK_SOFT_FLOAT) 169 170/* A C string constant that tells the GCC driver program options to pass to 171 `cc1'. It can also specify how to translate options you give to GCC into 172 options for GCC to pass to the `cc1'. 173 174 Do not define this macro if it does not need to do anything. */ 175/* For ABI compliance, we need to put bss data into the normal data section. */ 176#define CC1_SPEC "%{G*}" 177 178/* A C string constant that tells the GCC driver program options to pass to 179 the linker. It can also specify how to translate options you give to GCC 180 into options for GCC to pass to the linker. 181 182 Do not define this macro if it does not need to do anything. 183 184 Defined in svr4.h. */ 185/* Override the svr4.h version with one that dispenses without the svr4 186 shared library options, notably -G. */ 187#undef LINK_SPEC 188#define LINK_SPEC "\ 189%{h*} %{v:-V} \ 190%{b} \ 191%{mfdpic:-melf32frvfd -z text} \ 192%{static:-dn -Bstatic} \ 193%{shared:-Bdynamic} \ 194%{symbolic:-Bsymbolic} \ 195%{G*} \ 196%{YP,*} \ 197%{Qy:} %{!Qn:-Qy}" 198 199/* Another C string constant used much like `LINK_SPEC'. The difference 200 between the two is that `LIB_SPEC' is used at the end of the command given 201 to the linker. 202 203 If this macro is not defined, a default is provided that loads the standard 204 C library from the usual place. See `gcc.c'. 205 206 Defined in svr4.h. */ 207 208#undef LIB_SPEC 209#define LIB_SPEC "--start-group -lc -lsim --end-group" 210 211#ifndef CPU_TYPE 212#define CPU_TYPE FRV_CPU_FR500 213#endif 214 215/* Run-time target specifications */ 216 217#define TARGET_CPU_CPP_BUILTINS() \ 218 do \ 219 { \ 220 int issue_rate; \ 221 \ 222 builtin_define ("__frv__"); \ 223 builtin_assert ("machine=frv"); \ 224 \ 225 issue_rate = frv_issue_rate (); \ 226 if (issue_rate > 1) \ 227 builtin_define_with_int_value ("__FRV_VLIW__", issue_rate); \ 228 builtin_define_with_int_value ("__FRV_GPR__", NUM_GPRS); \ 229 builtin_define_with_int_value ("__FRV_FPR__", NUM_FPRS); \ 230 builtin_define_with_int_value ("__FRV_ACC__", NUM_ACCS); \ 231 \ 232 switch (frv_cpu_type) \ 233 { \ 234 case FRV_CPU_GENERIC: \ 235 builtin_define ("__CPU_GENERIC__"); \ 236 break; \ 237 case FRV_CPU_FR550: \ 238 builtin_define ("__CPU_FR550__"); \ 239 break; \ 240 case FRV_CPU_FR500: \ 241 case FRV_CPU_TOMCAT: \ 242 builtin_define ("__CPU_FR500__"); \ 243 break; \ 244 case FRV_CPU_FR450: \ 245 builtin_define ("__CPU_FR450__"); \ 246 break; \ 247 case FRV_CPU_FR405: \ 248 builtin_define ("__CPU_FR405__"); \ 249 break; \ 250 case FRV_CPU_FR400: \ 251 builtin_define ("__CPU_FR400__"); \ 252 break; \ 253 case FRV_CPU_FR300: \ 254 case FRV_CPU_SIMPLE: \ 255 builtin_define ("__CPU_FR300__"); \ 256 break; \ 257 } \ 258 \ 259 if (TARGET_HARD_FLOAT) \ 260 builtin_define ("__FRV_HARD_FLOAT__"); \ 261 if (TARGET_DWORD) \ 262 builtin_define ("__FRV_DWORD__"); \ 263 if (TARGET_FDPIC) \ 264 builtin_define ("__FRV_FDPIC__"); \ 265 if (flag_leading_underscore > 0) \ 266 builtin_define ("__FRV_UNDERSCORE__"); \ 267 } \ 268 while (0) 269 270 271#define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA) 272 273#define NUM_GPRS (TARGET_GPR_32? 32 : 64) 274#define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64) 275#define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8) 276 277/* X is a valid accumulator number if (X & ACC_MASK) == X. */ 278#define ACC_MASK \ 279 (!TARGET_MEDIA ? 0 \ 280 : TARGET_ACC_4 ? 3 \ 281 : frv_cpu_type == FRV_CPU_FR450 ? 11 \ 282 : 7) 283 284/* Macros to identify the blend of media instructions available. Revision 1 285 is the one found on the FR500. Revision 2 includes the changes made for 286 the FR400. 287 288 Treat the generic processor as a revision 1 machine for now, for 289 compatibility with earlier releases. */ 290 291#define TARGET_MEDIA_REV1 \ 292 (TARGET_MEDIA \ 293 && (frv_cpu_type == FRV_CPU_GENERIC \ 294 || frv_cpu_type == FRV_CPU_FR500)) 295 296#define TARGET_MEDIA_REV2 \ 297 (TARGET_MEDIA \ 298 && (frv_cpu_type == FRV_CPU_FR400 \ 299 || frv_cpu_type == FRV_CPU_FR405 \ 300 || frv_cpu_type == FRV_CPU_FR450 \ 301 || frv_cpu_type == FRV_CPU_FR550)) 302 303#define TARGET_MEDIA_FR450 \ 304 (frv_cpu_type == FRV_CPU_FR450) 305 306#define TARGET_FR500_FR550_BUILTINS \ 307 (frv_cpu_type == FRV_CPU_FR500 \ 308 || frv_cpu_type == FRV_CPU_FR550) 309 310#define TARGET_FR405_BUILTINS \ 311 (frv_cpu_type == FRV_CPU_FR405 \ 312 || frv_cpu_type == FRV_CPU_FR450) 313 314#ifndef HAVE_AS_TLS 315#define HAVE_AS_TLS 0 316#endif 317 318/* This macro is a C statement to print on `stderr' a string describing the 319 particular machine description choice. Every machine description should 320 define `TARGET_VERSION'. For example: 321 322 #ifdef MOTOROLA 323 #define TARGET_VERSION \ 324 fprintf (stderr, " (68k, Motorola syntax)"); 325 #else 326 #define TARGET_VERSION \ 327 fprintf (stderr, " (68k, MIT syntax)"); 328 #endif */ 329#define TARGET_VERSION fprintf (stderr, _(" (frv)")) 330 331/* Sometimes certain combinations of command options do not make sense on a 332 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to 333 take account of this. This macro, if defined, is executed once just after 334 all the command options have been parsed. 335 336 Don't use this macro to turn on various extra optimizations for `-O'. That 337 is what `OPTIMIZATION_OPTIONS' is for. */ 338 339#define OVERRIDE_OPTIONS frv_override_options () 340 341/* Some machines may desire to change what optimizations are performed for 342 various optimization levels. This macro, if defined, is executed once just 343 after the optimization level is determined and before the remainder of the 344 command options have been parsed. Values set in this macro are used as the 345 default values for the other command line options. 346 347 LEVEL is the optimization level specified; 2 if `-O2' is specified, 1 if 348 `-O' is specified, and 0 if neither is specified. 349 350 SIZE is nonzero if `-Os' is specified, 0 otherwise. 351 352 You should not use this macro to change options that are not 353 machine-specific. These should uniformly selected by the same optimization 354 level on all supported machines. Use this macro to enable machine-specific 355 optimizations. 356 357 *Do not examine `write_symbols' in this macro!* The debugging options are 358 *not supposed to alter the generated code. */ 359#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) frv_optimization_options (LEVEL, SIZE) 360 361 362/* Define this macro if debugging can be performed even without a frame 363 pointer. If this macro is defined, GCC will turn on the 364 `-fomit-frame-pointer' option whenever `-O' is specified. */ 365/* Frv needs a specific frame layout that includes the frame pointer. */ 366 367#define CAN_DEBUG_WITHOUT_FP 368 369#define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0) 370 371/* Small Data Area Support. */ 372/* Maximum size of variables that go in .sdata/.sbss. 373 The -msdata=foo switch also controls how small variables are handled. */ 374#ifndef SDATA_DEFAULT_SIZE 375#define SDATA_DEFAULT_SIZE 8 376#endif 377 378 379/* Storage Layout */ 380 381/* Define this macro to have the value 1 if the most significant bit in a byte 382 has the lowest number; otherwise define it to have the value zero. This 383 means that bit-field instructions count from the most significant bit. If 384 the machine has no bit-field instructions, then this must still be defined, 385 but it doesn't matter which value it is defined to. This macro need not be 386 a constant. 387 388 This macro does not affect the way structure fields are packed into bytes or 389 words; that is controlled by `BYTES_BIG_ENDIAN'. */ 390#define BITS_BIG_ENDIAN 1 391 392/* Define this macro to have the value 1 if the most significant byte in a word 393 has the lowest number. This macro need not be a constant. */ 394#define BYTES_BIG_ENDIAN 1 395 396/* Define this macro to have the value 1 if, in a multiword object, the most 397 significant word has the lowest number. This applies to both memory 398 locations and registers; GCC fundamentally assumes that the order of 399 words in memory is the same as the order in registers. This macro need not 400 be a constant. */ 401#define WORDS_BIG_ENDIAN 1 402 403/* Number of storage units in a word; normally 4. */ 404#define UNITS_PER_WORD 4 405 406/* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and 407 which has the specified mode and signedness is to be stored in a register. 408 This macro is only called when TYPE is a scalar type. 409 410 On most RISC machines, which only have operations that operate on a full 411 register, define this macro to set M to `word_mode' if M is an integer mode 412 narrower than `BITS_PER_WORD'. In most cases, only integer modes should be 413 widened because wider-precision floating-point operations are usually more 414 expensive than their narrower counterparts. 415 416 For most machines, the macro definition does not change UNSIGNEDP. However, 417 some machines, have instructions that preferentially handle either signed or 418 unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit 419 loads from memory and 32-bit add instructions sign-extend the result to 64 420 bits. On such machines, set UNSIGNEDP according to which kind of extension 421 is more efficient. 422 423 Do not define this macro if it would never modify MODE. */ 424#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 425 do \ 426 { \ 427 if (GET_MODE_CLASS (MODE) == MODE_INT \ 428 && GET_MODE_SIZE (MODE) < 4) \ 429 (MODE) = SImode; \ 430 } \ 431 while (0) 432 433/* Normal alignment required for function parameters on the stack, in bits. 434 All stack parameters receive at least this much alignment regardless of data 435 type. On most machines, this is the same as the size of an integer. */ 436#define PARM_BOUNDARY 32 437 438/* Define this macro if you wish to preserve a certain alignment for the stack 439 pointer. The definition is a C expression for the desired alignment 440 (measured in bits). 441 442 If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the 443 specified boundary. If `PUSH_ROUNDING' is defined and specifies a less 444 strict alignment than `STACK_BOUNDARY', the stack may be momentarily 445 unaligned while pushing arguments. */ 446#define STACK_BOUNDARY 64 447 448/* Alignment required for a function entry point, in bits. */ 449#define FUNCTION_BOUNDARY 128 450 451/* Biggest alignment that any data type can require on this machine, 452 in bits. */ 453#define BIGGEST_ALIGNMENT 64 454 455/* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for 456 some reason. */ 457#ifdef IN_TARGET_LIBS 458#define BIGGEST_FIELD_ALIGNMENT 64 459#else 460/* An expression for the alignment of a structure field FIELD if the 461 alignment computed in the usual way is COMPUTED. GCC uses this 462 value instead of the value in `BIGGEST_ALIGNMENT' or 463 `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */ 464#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 465 frv_adjust_field_align (FIELD, COMPUTED) 466#endif 467 468/* If defined, a C expression to compute the alignment for a static variable. 469 TYPE is the data type, and ALIGN is the alignment that the object 470 would ordinarily have. The value of this macro is used instead of that 471 alignment to align the object. 472 473 If this macro is not defined, then ALIGN is used. 474 475 One use of this macro is to increase alignment of medium-size data to make 476 it all fit in fewer cache lines. Another is to cause character arrays to be 477 word-aligned so that `strcpy' calls that copy constants to character arrays 478 can be done inline. */ 479#define DATA_ALIGNMENT(TYPE, ALIGN) \ 480 (TREE_CODE (TYPE) == ARRAY_TYPE \ 481 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 482 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 483 484/* If defined, a C expression to compute the alignment given to a constant that 485 is being placed in memory. CONSTANT is the constant and ALIGN is the 486 alignment that the object would ordinarily have. The value of this macro is 487 used instead of that alignment to align the object. 488 489 If this macro is not defined, then ALIGN is used. 490 491 The typical use of this macro is to increase alignment for string constants 492 to be word aligned so that `strcpy' calls that copy constants can be done 493 inline. */ 494#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 495 (TREE_CODE (EXP) == STRING_CST \ 496 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 497 498/* Define this macro to be the value 1 if instructions will fail to work if 499 given data not on the nominal alignment. If instructions will merely go 500 slower in that case, define this macro as 0. */ 501#define STRICT_ALIGNMENT 1 502 503/* Define this if you wish to imitate the way many other C compilers handle 504 alignment of bitfields and the structures that contain them. 505 506 The behavior is that the type written for a bit-field (`int', `short', or 507 other integer type) imposes an alignment for the entire structure, as if the 508 structure really did contain an ordinary field of that type. In addition, 509 the bit-field is placed within the structure so that it would fit within such 510 a field, not crossing a boundary for it. 511 512 Thus, on most machines, a bit-field whose type is written as `int' would not 513 cross a four-byte boundary, and would force four-byte alignment for the 514 whole structure. (The alignment used may not be four bytes; it is 515 controlled by the other alignment parameters.) 516 517 If the macro is defined, its definition should be a C expression; a nonzero 518 value for the expression enables this behavior. 519 520 Note that if this macro is not defined, or its value is zero, some bitfields 521 may cross more than one alignment boundary. The compiler can support such 522 references if there are `insv', `extv', and `extzv' insns that can directly 523 reference memory. 524 525 The other known way of making bitfields work is to define 526 `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every 527 structure can be accessed with fullwords. 528 529 Unless the machine has bit-field instructions or you define 530 `STRUCTURE_SIZE_BOUNDARY' that way, you must define 531 `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value. 532 533 If your aim is to make GCC use the same conventions for laying out 534 bitfields as are used by another compiler, here is how to investigate what 535 the other compiler does. Compile and run this program: 536 537 struct foo1 538 { 539 char x; 540 char :0; 541 char y; 542 }; 543 544 struct foo2 545 { 546 char x; 547 int :0; 548 char y; 549 }; 550 551 main () 552 { 553 printf ("Size of foo1 is %d\n", 554 sizeof (struct foo1)); 555 printf ("Size of foo2 is %d\n", 556 sizeof (struct foo2)); 557 exit (0); 558 } 559 560 If this prints 2 and 5, then the compiler's behavior is what you would get 561 from `PCC_BITFIELD_TYPE_MATTERS'. 562 563 Defined in svr4.h. */ 564#define PCC_BITFIELD_TYPE_MATTERS 1 565 566 567/* Layout of Source Language Data Types. */ 568 569#define CHAR_TYPE_SIZE 8 570#define SHORT_TYPE_SIZE 16 571#define INT_TYPE_SIZE 32 572#define LONG_TYPE_SIZE 32 573#define LONG_LONG_TYPE_SIZE 64 574#define FLOAT_TYPE_SIZE 32 575#define DOUBLE_TYPE_SIZE 64 576#define LONG_DOUBLE_TYPE_SIZE 64 577 578/* An expression whose value is 1 or 0, according to whether the type `char' 579 should be signed or unsigned by default. The user can always override this 580 default with the options `-fsigned-char' and `-funsigned-char'. */ 581#define DEFAULT_SIGNED_CHAR 1 582 583 584/* General purpose registers. */ 585#define GPR_FIRST 0 /* First gpr */ 586#define GPR_LAST (GPR_FIRST + 63) /* Last gpr */ 587#define GPR_R0 GPR_FIRST /* R0, constant 0 */ 588#define GPR_FP (GPR_FIRST + 2) /* Frame pointer */ 589#define GPR_SP (GPR_FIRST + 1) /* Stack pointer */ 590 /* small data register */ 591#define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) 592#define PIC_REGNO (GPR_FIRST + (TARGET_FDPIC?15:17)) /* PIC register. */ 593#define FDPIC_FPTR_REGNO (GPR_FIRST + 14) /* uClinux PIC function pointer register. */ 594#define FDPIC_REGNO (GPR_FIRST + 15) /* uClinux PIC register. */ 595 596#define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO) 597 598#define FPR_FIRST 64 /* First FP reg */ 599#define FPR_LAST 127 /* Last FP reg */ 600 601#define GPR_TEMP_NUM frv_condexec_temps /* # gprs to reserve for temps */ 602 603/* We reserve the last CR and CCR in each category to be used as a reload 604 register to reload the CR/CCR registers. This is a kludge. */ 605#define CC_FIRST 128 /* First ICC/FCC reg */ 606#define CC_LAST 135 /* Last ICC/FCC reg */ 607#define ICC_FIRST (CC_FIRST + 4) /* First ICC reg */ 608#define ICC_LAST (CC_FIRST + 7) /* Last ICC reg */ 609#define ICC_TEMP (CC_FIRST + 7) /* Temporary ICC reg */ 610#define FCC_FIRST (CC_FIRST) /* First FCC reg */ 611#define FCC_LAST (CC_FIRST + 3) /* Last FCC reg */ 612 613/* Amount to shift a value to locate a ICC or FCC register in the CCR 614 register and shift it to the bottom 4 bits. */ 615#define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2) 616 617/* Mask to isolate a single ICC/FCC value. */ 618#define CC_MASK 0xf 619 620/* Masks to isolate the various bits in an ICC field. */ 621#define ICC_MASK_N 0x8 /* negative */ 622#define ICC_MASK_Z 0x4 /* zero */ 623#define ICC_MASK_V 0x2 /* overflow */ 624#define ICC_MASK_C 0x1 /* carry */ 625 626/* Mask to isolate the N/Z flags in an ICC. */ 627#define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z) 628 629/* Mask to isolate the Z/C flags in an ICC. */ 630#define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C) 631 632/* Masks to isolate the various bits in a FCC field. */ 633#define FCC_MASK_E 0x8 /* equal */ 634#define FCC_MASK_L 0x4 /* less than */ 635#define FCC_MASK_G 0x2 /* greater than */ 636#define FCC_MASK_U 0x1 /* unordered */ 637 638/* For CCR registers, the machine wants CR4..CR7 to be used for integer 639 code and CR0..CR3 to be used for floating point. */ 640#define CR_FIRST 136 /* First CCR */ 641#define CR_LAST 143 /* Last CCR */ 642#define CR_NUM (CR_LAST-CR_FIRST+1) /* # of CCRs (8) */ 643#define ICR_FIRST (CR_FIRST + 4) /* First integer CCR */ 644#define ICR_LAST (CR_FIRST + 7) /* Last integer CCR */ 645#define ICR_TEMP ICR_LAST /* Temp integer CCR */ 646#define FCR_FIRST (CR_FIRST + 0) /* First float CCR */ 647#define FCR_LAST (CR_FIRST + 3) /* Last float CCR */ 648 649/* Amount to shift a value to locate a CR register in the CCCR special purpose 650 register and shift it to the bottom 2 bits. */ 651#define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1) 652 653/* Mask to isolate a single CR value. */ 654#define CR_MASK 0x3 655 656#define ACC_FIRST 144 /* First acc register */ 657#define ACC_LAST 155 /* Last acc register */ 658 659#define ACCG_FIRST 156 /* First accg register */ 660#define ACCG_LAST 167 /* Last accg register */ 661 662#define AP_FIRST 168 /* fake argument pointer */ 663 664#define SPR_FIRST 169 665#define SPR_LAST 172 666#define LR_REGNO (SPR_FIRST) 667#define LCR_REGNO (SPR_FIRST + 1) 668#define IACC_FIRST (SPR_FIRST + 2) 669#define IACC_LAST (SPR_FIRST + 3) 670 671#define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST) 672#define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM) 673#define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST) 674#define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST) 675#define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST) 676#define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST) 677#define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST) 678#define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST) 679#define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST) 680#define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST) 681#define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST) 682#define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST) 683 684#define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 685#define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 686#define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 687#define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 688#define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 689#define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 690#define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 691#define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 692#define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 693#define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 694#define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 695 696#define MAX_STACK_IMMEDIATE_OFFSET 2047 697 698 699/* Register Basics. */ 700 701/* Number of hardware registers known to the compiler. They receive numbers 0 702 through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number 703 really is assigned the number `FIRST_PSEUDO_REGISTER'. */ 704#define FIRST_PSEUDO_REGISTER (SPR_LAST + 1) 705 706/* The first/last register that can contain the arguments to a function. */ 707#define FIRST_ARG_REGNUM (GPR_FIRST + 8) 708#define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1) 709 710/* Registers used by the exception handling functions. These should be 711 registers that are not otherwise used by the calling sequence. */ 712#define FIRST_EH_REGNUM 14 713#define LAST_EH_REGNUM 15 714 715/* Scratch registers used in the prologue, epilogue and thunks. 716 OFFSET_REGNO is for loading constant addends that are too big for a 717 single instruction. TEMP_REGNO is used for transferring SPRs to and from 718 the stack, and various other activities. */ 719#define OFFSET_REGNO 4 720#define TEMP_REGNO 5 721 722/* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer, 723 which is sometimes used to set up the frame pointer. */ 724#define OLD_SP_REGNO 6 725 726/* Registers used in the epilogue. STACKADJ_REGNO stores the exception 727 handler's stack adjustment. */ 728#define STACKADJ_REGNO 6 729 730/* Registers used in thunks. JMP_REGNO is used for loading the target 731 address. */ 732#define JUMP_REGNO 6 733 734#define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \ 735 (N) + FIRST_EH_REGNUM : INVALID_REGNUM) 736#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO) 737#define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx) 738 739#define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO) 740 741/* An initializer that says which registers are used for fixed purposes all 742 throughout the compiled code and are therefore not available for general 743 allocation. These would include the stack pointer, the frame pointer 744 (except on machines where that can be used as a general register when no 745 frame pointer is needed), the program counter on machines where that is 746 considered one of the addressable registers, and any other numbered register 747 with a standard use. 748 749 This information is expressed as a sequence of numbers, separated by commas 750 and surrounded by braces. The Nth number is 1 if register N is fixed, 0 751 otherwise. 752 753 The table initialized from this macro, and the table initialized by the 754 following one, may be overridden at run time either automatically, by the 755 actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the 756 command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */ 757 758/* gr0 -- Hard Zero 759 gr1 -- Stack Pointer 760 gr2 -- Frame Pointer 761 gr3 -- Hidden Parameter 762 gr16 -- Small Data reserved 763 gr17 -- Pic reserved 764 gr28 -- OS reserved 765 gr29 -- OS reserved 766 gr30 -- OS reserved 767 gr31 -- OS reserved 768 cr3 -- reserved to reload FCC registers. 769 cr7 -- reserved to reload ICC registers. */ 770#define FIXED_REGISTERS \ 771{ /* Integer Registers */ \ 772 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \ 773 0, 0, 0, 0, 0, 0, 0, 0, /* 008-015, gr8 - gr15 */ \ 774 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ 775 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ 776 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \ 777 0, 0, 0, 0, 0, 0, 0, 0, /* 040-040, gr48 - gr47 */ \ 778 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ 779 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ 780 /* Float Registers */ \ 781 0, 0, 0, 0, 0, 0, 0, 0, /* 064-071, fr0 - fr7 */ \ 782 0, 0, 0, 0, 0, 0, 0, 0, /* 072-079, fr8 - fr15 */ \ 783 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ 784 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ 785 0, 0, 0, 0, 0, 0, 0, 0, /* 096-103, fr32 - fr39 */ \ 786 0, 0, 0, 0, 0, 0, 0, 0, /* 104-111, fr48 - fr47 */ \ 787 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ 788 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ 789 /* Condition Code Registers */ \ 790 0, 0, 0, 0, /* 128-131, fcc0 - fcc3 */ \ 791 0, 0, 0, 1, /* 132-135, icc0 - icc3 */ \ 792 /* Conditional execution Registers (CCR) */ \ 793 0, 0, 0, 0, 0, 0, 0, 1, /* 136-143, cr0 - cr7 */ \ 794 /* Accumulators */ \ 795 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ 796 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ 797 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ 798 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ 799 /* Other registers */ \ 800 1, /* 168, AP - fake arg ptr */ \ 801 0, /* 169, LR - Link register*/ \ 802 0, /* 170, LCR - Loop count reg*/ \ 803 1, 1 /* 171-172, iacc0 */ \ 804} 805 806/* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in 807 general) by function calls as well as for fixed registers. This macro 808 therefore identifies the registers that are not available for general 809 allocation of values that must live across function calls. 810 811 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically 812 saves it on function entry and restores it on function exit, if the register 813 is used within the function. */ 814#define CALL_USED_REGISTERS \ 815{ /* Integer Registers */ \ 816 1, 1, 1, 1, 1, 1, 1, 1, /* 000-007, gr0 - gr7 */ \ 817 1, 1, 1, 1, 1, 1, 1, 1, /* 008-015, gr8 - gr15 */ \ 818 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ 819 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ 820 1, 1, 1, 1, 1, 1, 1, 1, /* 032-039, gr32 - gr39 */ \ 821 1, 1, 1, 1, 1, 1, 1, 1, /* 040-040, gr48 - gr47 */ \ 822 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ 823 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ 824 /* Float Registers */ \ 825 1, 1, 1, 1, 1, 1, 1, 1, /* 064-071, fr0 - fr7 */ \ 826 1, 1, 1, 1, 1, 1, 1, 1, /* 072-079, fr8 - fr15 */ \ 827 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ 828 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ 829 1, 1, 1, 1, 1, 1, 1, 1, /* 096-103, fr32 - fr39 */ \ 830 1, 1, 1, 1, 1, 1, 1, 1, /* 104-111, fr48 - fr47 */ \ 831 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ 832 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ 833 /* Condition Code Registers */ \ 834 1, 1, 1, 1, /* 128-131, fcc0 - fcc3 */ \ 835 1, 1, 1, 1, /* 132-135, icc0 - icc3 */ \ 836 /* Conditional execution Registers (CCR) */ \ 837 1, 1, 1, 1, 1, 1, 1, 1, /* 136-143, cr0 - cr7 */ \ 838 /* Accumulators */ \ 839 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ 840 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ 841 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ 842 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ 843 /* Other registers */ \ 844 1, /* 168, AP - fake arg ptr */ \ 845 1, /* 169, LR - Link register*/ \ 846 1, /* 170, LCR - Loop count reg */ \ 847 1, 1 /* 171-172, iacc0 */ \ 848} 849 850/* Zero or more C statements that may conditionally modify two variables 851 `fixed_regs' and `call_used_regs' (both of type `char []') after they have 852 been initialized from the two preceding macros. 853 854 This is necessary in case the fixed or call-clobbered registers depend on 855 target flags. 856 857 You need not define this macro if it has no work to do. 858 859 If the usage of an entire class of registers depends on the target flags, 860 you may indicate this to GCC by using this macro to modify `fixed_regs' and 861 `call_used_regs' to 1 for each of the registers in the classes which should 862 not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return 863 `NO_REGS' if it is called with a letter for a class that shouldn't be used. 864 865 (However, if this class is not included in `GENERAL_REGS' and all of the 866 insn patterns whose constraints permit this class are controlled by target 867 switches, then GCC will automatically avoid using these registers when the 868 target switches are opposed to them.) */ 869 870#define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage () 871 872 873/* Order of allocation of registers. */ 874 875/* If defined, an initializer for a vector of integers, containing the numbers 876 of hard registers in the order in which GCC should prefer to use them 877 (from most preferred to least). 878 879 If this macro is not defined, registers are used lowest numbered first (all 880 else being equal). 881 882 One use of this macro is on machines where the highest numbered registers 883 must always be saved and the save-multiple-registers instruction supports 884 only sequences of consecutive registers. On such machines, define 885 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered 886 allocatable register first. */ 887 888/* On the FRV, allocate GR16 and GR17 after other saved registers so that we 889 have a better chance of allocating 2 registers at a time and can use the 890 double word load/store instructions in the prologue. */ 891#define REG_ALLOC_ORDER \ 892{ \ 893 /* volatile registers */ \ 894 GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \ 895 GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \ 896 GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \ 897 GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \ 898 GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \ 899 GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \ 900 GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \ 901 \ 902 FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \ 903 FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \ 904 FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \ 905 FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \ 906 FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \ 907 FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \ 908 FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \ 909 FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \ 910 \ 911 ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \ 912 FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \ 913 CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \ 914 CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \ 915 \ 916 /* saved registers */ \ 917 GPR_FIRST + 18, GPR_FIRST + 19, \ 918 GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \ 919 GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \ 920 GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \ 921 GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \ 922 GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \ 923 GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \ 924 GPR_FIRST + 16, GPR_FIRST + 17, \ 925 \ 926 FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \ 927 FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \ 928 FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \ 929 FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \ 930 FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \ 931 FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \ 932 FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \ 933 FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \ 934 \ 935 /* special or fixed registers */ \ 936 GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \ 937 GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \ 938 ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \ 939 ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \ 940 ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \ 941 ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \ 942 ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \ 943 ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \ 944 AP_FIRST, LR_REGNO, LCR_REGNO, \ 945 IACC_FIRST + 0, IACC_FIRST + 1 \ 946} 947 948 949/* How Values Fit in Registers. */ 950 951/* A C expression for the number of consecutive hard registers, starting at 952 register number REGNO, required to hold a value of mode MODE. 953 954 On a machine where all registers are exactly one word, a suitable definition 955 of this macro is 956 957 #define HARD_REGNO_NREGS(REGNO, MODE) \ 958 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \ 959 / UNITS_PER_WORD)) */ 960 961/* On the FRV, make the CC modes take 3 words in the integer registers, so that 962 we can build the appropriate instructions to properly reload the values. */ 963#define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE) 964 965/* A C expression that is nonzero if it is permissible to store a value of mode 966 MODE in hard register number REGNO (or in several registers starting with 967 that one). For a machine where all registers are equivalent, a suitable 968 definition is 969 970 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 971 972 It is not necessary for this macro to check for the numbers of fixed 973 registers, because the allocation mechanism considers them to be always 974 occupied. 975 976 On some machines, double-precision values must be kept in even/odd register 977 pairs. The way to implement that is to define this macro to reject odd 978 register numbers for such modes. 979 980 The minimum requirement for a mode to be OK in a register is that the 981 `movMODE' instruction pattern support moves between the register and any 982 other hard register for which the mode is OK; and that moving a value into 983 the register and back out not alter it. 984 985 Since the same instruction used to move `SImode' will work for all narrower 986 integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK' 987 to distinguish between these modes, provided you define patterns `movhi', 988 etc., to take advantage of this. This is useful because of the interaction 989 between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for 990 all integer modes to be tieable. 991 992 Many machines have special registers for floating point arithmetic. Often 993 people assume that floating point machine modes are allowed only in floating 994 point registers. This is not true. Any registers that can hold integers 995 can safely *hold* a floating point machine mode, whether or not floating 996 arithmetic can be done on it in those registers. Integer move instructions 997 can be used to move the values. 998 999 On some machines, though, the converse is true: fixed-point machine modes 1000 may not go in floating registers. This is true if the floating registers 1001 normalize any value stored in them, because storing a non-floating value 1002 there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject 1003 fixed-point machine modes in floating registers. But if the floating 1004 registers do not automatically normalize, if you can store any bit pattern 1005 in one and retrieve it unchanged without a trap, then any machine mode may 1006 go in a floating register, so you can define this macro to say so. 1007 1008 The primary significance of special floating registers is rather that they 1009 are the registers acceptable in floating point arithmetic instructions. 1010 However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by 1011 writing the proper constraints for those instructions. 1012 1013 On some machines, the floating registers are especially slow to access, so 1014 that it is better to store a value in a stack frame than in such a register 1015 if floating point arithmetic is not being done. As long as the floating 1016 registers are not in class `GENERAL_REGS', they will not be used unless some 1017 pattern's constraint asks for one. */ 1018#define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE) 1019 1020/* A C expression that is nonzero if it is desirable to choose register 1021 allocation so as to avoid move instructions between a value of mode MODE1 1022 and a value of mode MODE2. 1023 1024 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are 1025 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be 1026 zero. */ 1027#define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2) 1028 1029/* Define this macro if the compiler should avoid copies to/from CCmode 1030 registers. You should only define this macro if support fo copying to/from 1031 CCmode is incomplete. */ 1032#define AVOID_CCMODE_COPIES 1033 1034 1035/* Register Classes. */ 1036 1037/* An enumeral type that must be defined with all the register class names as 1038 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last 1039 register class, followed by one more enumeral value, `LIM_REG_CLASSES', 1040 which is not a register class but rather tells how many classes there are. 1041 1042 Each register class has a number, which is the value of casting the class 1043 name to type `int'. The number serves as an index in many of the tables 1044 described below. */ 1045enum reg_class 1046{ 1047 NO_REGS, 1048 ICC_REGS, 1049 FCC_REGS, 1050 CC_REGS, 1051 ICR_REGS, 1052 FCR_REGS, 1053 CR_REGS, 1054 LCR_REG, 1055 LR_REG, 1056 GR8_REGS, 1057 GR9_REGS, 1058 GR89_REGS, 1059 FDPIC_REGS, 1060 FDPIC_FPTR_REGS, 1061 FDPIC_CALL_REGS, 1062 SPR_REGS, 1063 QUAD_ACC_REGS, 1064 EVEN_ACC_REGS, 1065 ACC_REGS, 1066 ACCG_REGS, 1067 QUAD_FPR_REGS, 1068 FEVEN_REGS, 1069 FPR_REGS, 1070 QUAD_REGS, 1071 EVEN_REGS, 1072 GPR_REGS, 1073 ALL_REGS, 1074 LIM_REG_CLASSES 1075}; 1076 1077#define GENERAL_REGS GPR_REGS 1078 1079/* The number of distinct register classes, defined as follows: 1080 1081 #define N_REG_CLASSES (int) LIM_REG_CLASSES */ 1082#define N_REG_CLASSES ((int) LIM_REG_CLASSES) 1083 1084/* An initializer containing the names of the register classes as C string 1085 constants. These names are used in writing some of the debugging dumps. */ 1086#define REG_CLASS_NAMES { \ 1087 "NO_REGS", \ 1088 "ICC_REGS", \ 1089 "FCC_REGS", \ 1090 "CC_REGS", \ 1091 "ICR_REGS", \ 1092 "FCR_REGS", \ 1093 "CR_REGS", \ 1094 "LCR_REG", \ 1095 "LR_REG", \ 1096 "GR8_REGS", \ 1097 "GR9_REGS", \ 1098 "GR89_REGS", \ 1099 "FDPIC_REGS", \ 1100 "FDPIC_FPTR_REGS", \ 1101 "FDPIC_CALL_REGS", \ 1102 "SPR_REGS", \ 1103 "QUAD_ACC_REGS", \ 1104 "EVEN_ACC_REGS", \ 1105 "ACC_REGS", \ 1106 "ACCG_REGS", \ 1107 "QUAD_FPR_REGS", \ 1108 "FEVEN_REGS", \ 1109 "FPR_REGS", \ 1110 "QUAD_REGS", \ 1111 "EVEN_REGS", \ 1112 "GPR_REGS", \ 1113 "ALL_REGS" \ 1114} 1115 1116/* An initializer containing the contents of the register classes, as integers 1117 which are bit masks. The Nth integer specifies the contents of class N. 1118 The way the integer MASK is interpreted is that register R is in the class 1119 if `MASK & (1 << R)' is 1. 1120 1121 When the machine has more than 32 registers, an integer does not suffice. 1122 Then the integers are replaced by sub-initializers, braced groupings 1123 containing several integers. Each sub-initializer must be suitable as an 1124 initializer for the type `HARD_REG_SET' which is defined in 1125 `hard-reg-set.h'. */ 1126#define REG_CLASS_CONTENTS \ 1127{ /* gr0-gr31 gr32-gr63 fr0-fr31 fr32-fr-63 cc/ccr/acc ap/spr */ \ 1128 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* NO_REGS */\ 1129 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000f0,0x0}, /* ICC_REGS */\ 1130 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000000f,0x0}, /* FCC_REGS */\ 1131 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000ff,0x0}, /* CC_REGS */\ 1132 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000f000,0x0}, /* ICR_REGS */\ 1133 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000f00,0x0}, /* FCR_REGS */\ 1134 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000ff00,0x0}, /* CR_REGS */\ 1135 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x400}, /* LCR_REGS */\ 1136 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x200}, /* LR_REGS */\ 1137 { 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR8_REGS */\ 1138 { 0x00000200,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR9_REGS */\ 1139 { 0x00000300,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR89_REGS */\ 1140 { 0x00008000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_REGS */\ 1141 { 0x00004000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_FPTR_REGS */\ 1142 { 0x0000c000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_CALL_REGS */\ 1143 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x1e00}, /* SPR_REGS */\ 1144 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* QUAD_ACC */\ 1145 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* EVEN_ACC */\ 1146 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* ACC_REGS */\ 1147 { 0x00000000,0x00000000,0x00000000,0x00000000,0xf0000000,0xff}, /* ACCG_REGS*/\ 1148 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* QUAD_FPR */\ 1149 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FEVEN_REG*/\ 1150 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FPR_REGS */\ 1151 { 0x0ffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* QUAD_REGS*/\ 1152 { 0xfffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* EVEN_REGS*/\ 1153 { 0xffffffff,0xffffffff,0x00000000,0x00000000,0x00000000,0x100}, /* GPR_REGS */\ 1154 { 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\ 1155} 1156 1157/* A C expression whose value is a register class containing hard register 1158 REGNO. In general there is more than one such class; choose a class which 1159 is "minimal", meaning that no smaller class also contains the register. */ 1160 1161extern enum reg_class regno_reg_class[]; 1162#define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO] 1163 1164/* A macro whose definition is the name of the class to which a valid base 1165 register must belong. A base register is one used in an address which is 1166 the register value plus a displacement. */ 1167#define BASE_REG_CLASS GPR_REGS 1168 1169/* A macro whose definition is the name of the class to which a valid index 1170 register must belong. An index register is one used in an address where its 1171 value is either multiplied by a scale factor or added to another register 1172 (as well as added to a displacement). */ 1173#define INDEX_REG_CLASS GPR_REGS 1174 1175/* A C expression which defines the machine-dependent operand constraint 1176 letters for register classes. If CHAR is such a letter, the value should be 1177 the register class corresponding to it. Otherwise, the value should be 1178 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS', 1179 will not be passed to this macro; you do not need to handle it. 1180 1181 The following letters are unavailable, due to being used as 1182 constraints: 1183 '0'..'9' 1184 '<', '>' 1185 'E', 'F', 'G', 'H' 1186 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P' 1187 'Q', 'R', 'S', 'T', 'U' 1188 'V', 'X' 1189 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ 1190 1191extern enum reg_class reg_class_from_letter[]; 1192#define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)] 1193 1194/* A C expression which is nonzero if register number NUM is suitable for use 1195 as a base register in operand addresses. It may be either a suitable hard 1196 register or a pseudo register that has been allocated such a hard register. */ 1197#define REGNO_OK_FOR_BASE_P(NUM) \ 1198 ((NUM) < FIRST_PSEUDO_REGISTER \ 1199 ? GPR_P (NUM) \ 1200 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) 1201 1202/* A C expression which is nonzero if register number NUM is suitable for use 1203 as an index register in operand addresses. It may be either a suitable hard 1204 register or a pseudo register that has been allocated such a hard register. 1205 1206 The difference between an index register and a base register is that the 1207 index register may be scaled. If an address involves the sum of two 1208 registers, neither one of them scaled, then either one may be labeled the 1209 "base" and the other the "index"; but whichever labeling is used must fit 1210 the machine's constraints of which registers may serve in each capacity. 1211 The compiler will try both labelings, looking for one that is valid, and 1212 will reload one or both registers only if neither labeling works. */ 1213#define REGNO_OK_FOR_INDEX_P(NUM) \ 1214 ((NUM) < FIRST_PSEUDO_REGISTER \ 1215 ? GPR_P (NUM) \ 1216 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) 1217 1218/* A C expression that places additional restrictions on the register class to 1219 use when it is necessary to copy value X into a register in class CLASS. 1220 The value is a register class; perhaps CLASS, or perhaps another, smaller 1221 class. On many machines, the following definition is safe: 1222 1223 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS 1224 1225 Sometimes returning a more restrictive class makes better code. For 1226 example, on the 68000, when X is an integer constant that is in range for a 1227 `moveq' instruction, the value of this macro is always `DATA_REGS' as long 1228 as CLASS includes the data registers. Requiring a data register guarantees 1229 that a `moveq' will be used. 1230 1231 If X is a `const_double', by returning `NO_REGS' you can force X into a 1232 memory constant. This is useful on certain machines where immediate 1233 floating values cannot be loaded into certain kinds of registers. 1234 1235 This declaration must be present. */ 1236#define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS 1237 1238#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1239 frv_secondary_reload_class (CLASS, MODE, X, TRUE) 1240 1241#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1242 frv_secondary_reload_class (CLASS, MODE, X, FALSE) 1243 1244/* A C expression whose value is nonzero if pseudos that have been assigned to 1245 registers of class CLASS would likely be spilled because registers of CLASS 1246 are needed for spill registers. 1247 1248 The default value of this macro returns 1 if CLASS has exactly one register 1249 and zero otherwise. On most machines, this default should be used. Only 1250 define this macro to some other expression if pseudo allocated by 1251 `local-alloc.c' end up in memory because their hard registers were needed 1252 for spill registers. If this macro returns nonzero for those classes, those 1253 pseudos will only be allocated by `global.c', which knows how to reallocate 1254 the pseudo to another register. If there would not be another register 1255 available for reallocation, you should not change the definition of this 1256 macro since the only effect of such a definition would be to slow down 1257 register allocation. */ 1258#define CLASS_LIKELY_SPILLED_P(CLASS) frv_class_likely_spilled_p (CLASS) 1259 1260/* A C expression for the maximum number of consecutive registers of 1261 class CLASS needed to hold a value of mode MODE. 1262 1263 This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value 1264 of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of 1265 `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS. 1266 1267 This macro helps control the handling of multiple-word values in 1268 the reload pass. 1269 1270 This declaration is required. */ 1271#define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE) 1272 1273#define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x))) 1274 1275/* 6 bit signed immediate. */ 1276#define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31) 1277/* 10 bit signed immediate. */ 1278#define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511) 1279/* Unused */ 1280#define CONST_OK_FOR_K(VALUE) 0 1281/* 16 bit signed immediate. */ 1282#define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767) 1283/* 16 bit unsigned immediate. */ 1284#define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535) 1285/* 12 bit signed immediate that is negative. */ 1286#define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1) 1287/* Zero */ 1288#define CONST_OK_FOR_O(VALUE) ((VALUE) == 0) 1289/* 12 bit signed immediate that is negative. */ 1290#define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047) 1291 1292/* A C expression that defines the machine-dependent operand constraint letters 1293 (`I', `J', `K', .. 'P') that specify particular ranges of integer values. 1294 If C is one of those letters, the expression should check that VALUE, an 1295 integer, is in the appropriate range and return 1 if so, 0 otherwise. If C 1296 is not one of those letters, the value should be 0 regardless of VALUE. */ 1297#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 1298 ( (C) == 'I' ? CONST_OK_FOR_I (VALUE) \ 1299 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \ 1300 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ 1301 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ 1302 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ 1303 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ 1304 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \ 1305 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \ 1306 : 0) 1307 1308 1309/* A C expression that defines the machine-dependent operand constraint letters 1310 (`G', `H') that specify particular ranges of `const_double' values. 1311 1312 If C is one of those letters, the expression should check that VALUE, an RTX 1313 of code `const_double', is in the appropriate range and return 1 if so, 0 1314 otherwise. If C is not one of those letters, the value should be 0 1315 regardless of VALUE. 1316 1317 `const_double' is used for all floating-point constants and for `DImode' 1318 fixed-point constants. A given letter can accept either or both kinds of 1319 values. It can use `GET_MODE' to distinguish between these kinds. */ 1320 1321#define CONST_DOUBLE_OK_FOR_G(VALUE) \ 1322 ((GET_MODE (VALUE) == VOIDmode \ 1323 && CONST_DOUBLE_LOW (VALUE) == 0 \ 1324 && CONST_DOUBLE_HIGH (VALUE) == 0) \ 1325 || ((GET_MODE (VALUE) == SFmode \ 1326 || GET_MODE (VALUE) == DFmode) \ 1327 && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))) 1328 1329#define CONST_DOUBLE_OK_FOR_H(VALUE) 0 1330 1331#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 1332 ( (C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \ 1333 : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \ 1334 : 0) 1335 1336/* A C expression that defines the optional machine-dependent constraint 1337 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific 1338 types of operands, usually memory references, for the target machine. 1339 Normally this macro will not be defined. If it is required for a particular 1340 target machine, it should return 1 if VALUE corresponds to the operand type 1341 represented by the constraint letter C. If C is not defined as an extra 1342 constraint, the value returned should be 0 regardless of VALUE. 1343 1344 For example, on the ROMP, load instructions cannot have their output in r0 1345 if the memory reference contains a symbolic address. Constraint letter `Q' 1346 is defined as representing a memory address that does *not* contain a 1347 symbolic address. An alternative is specified with a `Q' constraint on the 1348 input and `r' on the output. The next alternative specifies `m' on the 1349 input and a register class that does not include r0 on the output. */ 1350 1351/* 12-bit relocations. */ 1352#define EXTRA_CONSTRAINT_FOR_Q(VALUE) \ 1353 (got12_operand (VALUE, GET_MODE (VALUE))) 1354 1355/* Double word memory ops that take one instruction. */ 1356#define EXTRA_CONSTRAINT_FOR_R(VALUE) \ 1357 (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE))) 1358 1359/* SYMBOL_REF */ 1360#define EXTRA_CONSTRAINT_FOR_S(VALUE) \ 1361 (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode)) 1362 1363/* Double word memory ops that take two instructions. */ 1364#define EXTRA_CONSTRAINT_FOR_T(VALUE) \ 1365 (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE))) 1366 1367/* Memory operand for conditional execution. */ 1368#define EXTRA_CONSTRAINT_FOR_U(VALUE) \ 1369 (condexec_memory_operand (VALUE, GET_MODE (VALUE))) 1370 1371#define EXTRA_CONSTRAINT(VALUE, C) \ 1372 ( (C) == 'Q' ? EXTRA_CONSTRAINT_FOR_Q (VALUE) \ 1373 : (C) == 'R' ? EXTRA_CONSTRAINT_FOR_R (VALUE) \ 1374 : (C) == 'S' ? EXTRA_CONSTRAINT_FOR_S (VALUE) \ 1375 : (C) == 'T' ? EXTRA_CONSTRAINT_FOR_T (VALUE) \ 1376 : (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \ 1377 : 0) 1378 1379#define CONSTRAINT_LEN(C, STR) \ 1380 ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR))) 1381 1382#define REG_CLASS_FROM_CONSTRAINT(C, STR) \ 1383 (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \ 1384 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \ 1385 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \ 1386 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \ 1387 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \ 1388 REG_CLASS_FROM_LETTER ((C))) 1389 1390 1391/* Basic Stack Layout. */ 1392 1393/* Structure to describe information about a saved range of registers */ 1394 1395typedef struct frv_stack_regs { 1396 const char * name; /* name of the register ranges */ 1397 int first; /* first register in the range */ 1398 int last; /* last register in the range */ 1399 int size_1word; /* # of bytes to be stored via 1 word stores */ 1400 int size_2words; /* # of bytes to be stored via 2 word stores */ 1401 unsigned char field_p; /* true if the registers are a single SPR */ 1402 unsigned char dword_p; /* true if we can do dword stores */ 1403 unsigned char special_p; /* true if the regs have a fixed save loc. */ 1404} frv_stack_regs_t; 1405 1406/* Register ranges to look into saving. */ 1407#define STACK_REGS_GPR 0 /* Gprs (normally gr16..gr31, gr48..gr63) */ 1408#define STACK_REGS_FPR 1 /* Fprs (normally fr16..fr31, fr48..fr63) */ 1409#define STACK_REGS_LR 2 /* LR register */ 1410#define STACK_REGS_CC 3 /* CCrs (normally not saved) */ 1411#define STACK_REGS_LCR 5 /* lcr register */ 1412#define STACK_REGS_STDARG 6 /* stdarg registers */ 1413#define STACK_REGS_STRUCT 7 /* structure return (gr3) */ 1414#define STACK_REGS_FP 8 /* FP register */ 1415#define STACK_REGS_MAX 9 /* # of register ranges */ 1416 1417/* Values for save_p field. */ 1418#define REG_SAVE_NO_SAVE 0 /* register not saved */ 1419#define REG_SAVE_1WORD 1 /* save the register */ 1420#define REG_SAVE_2WORDS 2 /* save register and register+1 */ 1421 1422/* Structure used to define the frv stack. */ 1423 1424typedef struct frv_stack { 1425 int total_size; /* total bytes allocated for stack */ 1426 int vars_size; /* variable save area size */ 1427 int parameter_size; /* outgoing parameter size */ 1428 int stdarg_size; /* size of regs needed to be saved for stdarg */ 1429 int regs_size; /* size of the saved registers */ 1430 int regs_size_1word; /* # of bytes to be stored via 1 word stores */ 1431 int regs_size_2words; /* # of bytes to be stored via 2 word stores */ 1432 int header_size; /* size of the old FP, struct ret., LR save */ 1433 int pretend_size; /* size of pretend args */ 1434 int vars_offset; /* offset to save local variables from new SP*/ 1435 int regs_offset; /* offset to save registers from new SP */ 1436 /* register range information */ 1437 frv_stack_regs_t regs[STACK_REGS_MAX]; 1438 /* offset to store each register */ 1439 int reg_offset[FIRST_PSEUDO_REGISTER]; 1440 /* whether to save register (& reg+1) */ 1441 unsigned char save_p[FIRST_PSEUDO_REGISTER]; 1442} frv_stack_t; 1443 1444/* Define this macro if pushing a word onto the stack moves the stack pointer 1445 to a smaller address. */ 1446#define STACK_GROWS_DOWNWARD 1 1447 1448/* Define this macro to nonzero if the addresses of local variable slots 1449 are at negative offsets from the frame pointer. */ 1450#define FRAME_GROWS_DOWNWARD 1 1451 1452/* Offset from the frame pointer to the first local variable slot to be 1453 allocated. 1454 1455 If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the 1456 first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by 1457 adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */ 1458#define STARTING_FRAME_OFFSET 0 1459 1460/* Offset from the stack pointer register to the first location at which 1461 outgoing arguments are placed. If not specified, the default value of zero 1462 is used. This is the proper value for most machines. 1463 1464 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first 1465 location at which outgoing arguments are placed. */ 1466#define STACK_POINTER_OFFSET 0 1467 1468/* Offset from the argument pointer register to the first argument's address. 1469 On some machines it may depend on the data type of the function. 1470 1471 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first 1472 argument's address. */ 1473#define FIRST_PARM_OFFSET(FUNDECL) 0 1474 1475/* A C expression whose value is RTL representing the address in a stack frame 1476 where the pointer to the caller's frame is stored. Assume that FRAMEADDR is 1477 an RTL expression for the address of the stack frame itself. 1478 1479 If you don't define this macro, the default is to return the value of 1480 FRAMEADDR--that is, the stack frame address is also the address of the stack 1481 word that points to the previous frame. */ 1482#define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR) 1483 1484/* A C expression whose value is RTL representing the value of the return 1485 address for the frame COUNT steps up from the current frame, after the 1486 prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame 1487 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is 1488 defined. 1489 1490 The value of the expression must always be the correct address when COUNT is 1491 zero, but may be `NULL_RTX' if there is not way to determine the return 1492 address of other frames. */ 1493#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR) 1494 1495#define RETURN_POINTER_REGNUM LR_REGNO 1496 1497/* A C expression whose value is RTL representing the location of the incoming 1498 return address at the beginning of any function, before the prologue. This 1499 RTL is either a `REG', indicating that the return value is saved in `REG', 1500 or a `MEM' representing a location in the stack. 1501 1502 You only need to define this macro if you want to support call frame 1503 debugging information like that provided by DWARF 2. */ 1504#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM) 1505 1506 1507/* Register That Address the Stack Frame. */ 1508 1509/* The register number of the stack pointer register, which must also be a 1510 fixed register according to `FIXED_REGISTERS'. On most machines, the 1511 hardware determines which register this is. */ 1512#define STACK_POINTER_REGNUM (GPR_FIRST + 1) 1513 1514/* The register number of the frame pointer register, which is used to access 1515 automatic variables in the stack frame. On some machines, the hardware 1516 determines which register this is. On other machines, you can choose any 1517 register you wish for this purpose. */ 1518#define FRAME_POINTER_REGNUM (GPR_FIRST + 2) 1519 1520/* The register number of the arg pointer register, which is used to access the 1521 function's argument list. On some machines, this is the same as the frame 1522 pointer register. On some machines, the hardware determines which register 1523 this is. On other machines, you can choose any register you wish for this 1524 purpose. If this is not the same register as the frame pointer register, 1525 then you must mark it as a fixed register according to `FIXED_REGISTERS', or 1526 arrange to be able to eliminate it. */ 1527 1528/* On frv this is a fake register that is eliminated in 1529 terms of either the frame pointer or stack pointer. */ 1530#define ARG_POINTER_REGNUM AP_FIRST 1531 1532/* Register numbers used for passing a function's static chain pointer. If 1533 register windows are used, the register number as seen by the called 1534 function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as 1535 seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers 1536 are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined. 1537 1538 The static chain register need not be a fixed register. 1539 1540 If the static chain is passed in memory, these macros should not be defined; 1541 instead, the next two macros should be defined. */ 1542#define STATIC_CHAIN_REGNUM (GPR_FIRST + 7) 1543#define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7) 1544 1545 1546/* Eliminating the Frame Pointer and the Arg Pointer. */ 1547 1548/* A C expression which is nonzero if a function must have and use a frame 1549 pointer. This expression is evaluated in the reload pass. If its value is 1550 nonzero the function will have a frame pointer. 1551 1552 The expression can in principle examine the current function and decide 1553 according to the facts, but on most machines the constant 0 or the constant 1554 1 suffices. Use 0 when the machine allows code to be generated with no 1555 frame pointer, and doing so saves some time or space. Use 1 when there is 1556 no possible advantage to avoiding a frame pointer. 1557 1558 In certain cases, the compiler does not know how to produce valid code 1559 without a frame pointer. The compiler recognizes those cases and 1560 automatically gives the function a frame pointer regardless of what 1561 `FRAME_POINTER_REQUIRED' says. You don't need to worry about them. 1562 1563 In a function that does not require a frame pointer, the frame pointer 1564 register can be allocated for ordinary usage, unless you mark it as a fixed 1565 register. See `FIXED_REGISTERS' for more information. */ 1566#define FRAME_POINTER_REQUIRED frv_frame_pointer_required () 1567 1568/* If defined, this macro specifies a table of register pairs used to eliminate 1569 unneeded registers that point into the stack frame. If it is not defined, 1570 the only elimination attempted by the compiler is to replace references to 1571 the frame pointer with references to the stack pointer. 1572 1573 The definition of this macro is a list of structure initializations, each of 1574 which specifies an original and replacement register. 1575 1576 On some machines, the position of the argument pointer is not known until 1577 the compilation is completed. In such a case, a separate hard register must 1578 be used for the argument pointer. This register can be eliminated by 1579 replacing it with either the frame pointer or the argument pointer, 1580 depending on whether or not the frame pointer has been eliminated. 1581 1582 In this case, you might specify: 1583 #define ELIMINABLE_REGS \ 1584 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1585 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1586 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 1587 1588 Note that the elimination of the argument pointer with the stack pointer is 1589 specified first since that is the preferred elimination. */ 1590 1591#define ELIMINABLE_REGS \ 1592{ \ 1593 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1594 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1595 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \ 1596} 1597 1598/* A C expression that returns nonzero if the compiler is allowed to try to 1599 replace register number FROM with register number TO. This macro need only 1600 be defined if `ELIMINABLE_REGS' is defined, and will usually be the constant 1601 1, since most of the cases preventing register elimination are things that 1602 the compiler already knows about. */ 1603 1604#define CAN_ELIMINATE(FROM, TO) \ 1605 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 1606 ? ! frame_pointer_needed \ 1607 : 1) 1608 1609/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the 1610 initial difference between the specified pair of registers. This macro must 1611 be defined if `ELIMINABLE_REGS' is defined. */ 1612 1613#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1614 (OFFSET) = frv_initial_elimination_offset (FROM, TO) 1615 1616 1617/* Passing Function Arguments on the Stack. */ 1618 1619/* If defined, the maximum amount of space required for outgoing arguments will 1620 be computed and placed into the variable 1621 `current_function_outgoing_args_size'. No space will be pushed onto the 1622 stack for each call; instead, the function prologue should increase the 1623 stack frame size by this amount. 1624 1625 Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not 1626 proper. */ 1627#define ACCUMULATE_OUTGOING_ARGS 1 1628 1629/* A C expression that should indicate the number of bytes of its own arguments 1630 that a function pops on returning, or 0 if the function pops no arguments 1631 and the caller must therefore pop them all after the function returns. 1632 1633 FUNDECL is a C variable whose value is a tree node that describes the 1634 function in question. Normally it is a node of type `FUNCTION_DECL' that 1635 describes the declaration of the function. From this it is possible to 1636 obtain the DECL_ATTRIBUTES of the function. 1637 1638 FUNTYPE is a C variable whose value is a tree node that describes the 1639 function in question. Normally it is a node of type `FUNCTION_TYPE' that 1640 describes the data type of the function. From this it is possible to obtain 1641 the data types of the value and arguments (if known). 1642 1643 When a call to a library function is being considered, FUNTYPE will contain 1644 an identifier node for the library function. Thus, if you need to 1645 distinguish among various library functions, you can do so by their names. 1646 Note that "library function" in this context means a function used to 1647 perform arithmetic, whose name is known specially in the compiler and was 1648 not mentioned in the C code being compiled. 1649 1650 STACK-SIZE is the number of bytes of arguments passed on the stack. If a 1651 variable number of bytes is passed, it is zero, and argument popping will 1652 always be the responsibility of the calling function. 1653 1654 On the VAX, all functions always pop their arguments, so the definition of 1655 this macro is STACK-SIZE. On the 68000, using the standard calling 1656 convention, no functions pop their arguments, so the value of the macro is 1657 always 0 in this case. But an alternative calling convention is available 1658 in which functions that take a fixed number of arguments pop them but other 1659 functions (such as `printf') pop nothing (the caller pops all). When this 1660 convention is in use, FUNTYPE is examined to determine whether a function 1661 takes a fixed number of arguments. */ 1662#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0 1663 1664 1665/* The number of register assigned to holding function arguments. */ 1666 1667#define FRV_NUM_ARG_REGS 6 1668 1669#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1670 frv_function_arg (&CUM, MODE, TYPE, NAMED, FALSE) 1671 1672/* Define this macro if the target machine has "register windows", so that the 1673 register in which a function sees an arguments is not necessarily the same 1674 as the one in which the caller passed the argument. 1675 1676 For such machines, `FUNCTION_ARG' computes the register in which the caller 1677 passes the value, and `FUNCTION_INCOMING_ARG' should be defined in a similar 1678 fashion to tell the function being called where the arguments will arrive. 1679 1680 If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves both 1681 purposes. */ 1682 1683#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 1684 frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE) 1685 1686/* A C type for declaring a variable that is used as the first argument of 1687 `FUNCTION_ARG' and other related values. For some target machines, the type 1688 `int' suffices and can hold the number of bytes of argument so far. 1689 1690 There is no need to record in `CUMULATIVE_ARGS' anything about the arguments 1691 that have been passed on the stack. The compiler has other variables to 1692 keep track of that. For target machines on which all arguments are passed 1693 on the stack, there is no need to store anything in `CUMULATIVE_ARGS'; 1694 however, the data structure must exist and should not be empty, so use 1695 `int'. */ 1696#define CUMULATIVE_ARGS int 1697 1698/* A C statement (sans semicolon) for initializing the variable CUM for the 1699 state at the beginning of the argument list. The variable has type 1700 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type 1701 of the function which will receive the args, or 0 if the args are to a 1702 compiler support library function. The value of INDIRECT is nonzero when 1703 processing an indirect call, for example a call through a function pointer. 1704 The value of INDIRECT is zero for a call to an explicitly named function, a 1705 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find 1706 arguments for the function being compiled. 1707 1708 When processing a call to a compiler support library function, LIBNAME 1709 identifies which one. It is a `symbol_ref' rtx which contains the name of 1710 the function, as a string. LIBNAME is 0 when an ordinary C function call is 1711 being processed. Thus, each time this macro is called, either LIBNAME or 1712 FNTYPE is nonzero, but never both of them at once. */ 1713 1714#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1715 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE) 1716 1717/* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the 1718 arguments for the function being compiled. If this macro is undefined, 1719 `INIT_CUMULATIVE_ARGS' is used instead. 1720 1721 The value passed for LIBNAME is always 0, since library routines with 1722 special calling conventions are never compiled with GCC. The argument 1723 LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */ 1724 1725#define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \ 1726 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE) 1727 1728/* A C statement (sans semicolon) to update the summarizer variable CUM to 1729 advance past an argument in the argument list. The values MODE, TYPE and 1730 NAMED describe that argument. Once this is done, the variable CUM is 1731 suitable for analyzing the *following* argument with `FUNCTION_ARG', etc. 1732 1733 This macro need not do anything if the argument in question was passed on 1734 the stack. The compiler knows how to track the amount of stack space used 1735 for arguments without any special help. */ 1736#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1737 frv_function_arg_advance (&CUM, MODE, TYPE, NAMED) 1738 1739/* If defined, a C expression that gives the alignment boundary, in bits, of an 1740 argument with the specified mode and type. If it is not defined, 1741 `PARM_BOUNDARY' is used for all arguments. */ 1742 1743#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 1744 frv_function_arg_boundary (MODE, TYPE) 1745 1746/* A C expression that is nonzero if REGNO is the number of a hard register in 1747 which function arguments are sometimes passed. This does *not* include 1748 implicit arguments such as the static chain and the structure-value address. 1749 On many machines, no registers can be used for this purpose since all 1750 function arguments are pushed on the stack. */ 1751#define FUNCTION_ARG_REGNO_P(REGNO) \ 1752 ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM)) 1753 1754 1755/* How Scalar Function Values are Returned. */ 1756 1757/* The number of the hard register that is used to return a scalar value from a 1758 function call. */ 1759#define RETURN_VALUE_REGNUM (GPR_FIRST + 8) 1760 1761/* A C expression to create an RTX representing the place where a function 1762 returns a value of data type VALTYPE. VALTYPE is a tree node representing a 1763 data type. Write `TYPE_MODE (VALTYPE)' to get the machine mode used to 1764 represent that type. On many machines, only the mode is relevant. 1765 (Actually, on most machines, scalar values are returned in the same place 1766 regardless of mode). 1767 1768 If `TARGET_PROMOTE_FUNCTION_RETURN' is defined to return true, you 1769 must apply the same promotion rules specified in `PROMOTE_MODE' if 1770 VALTYPE is a scalar type. 1771 1772 If the precise function being called is known, FUNC is a tree node 1773 (`FUNCTION_DECL') for it; otherwise, FUNC is a null pointer. This makes it 1774 possible to use a different value-returning convention for specific 1775 functions when all their calls are known. 1776 1777 `FUNCTION_VALUE' is not used for return vales with aggregate data types, 1778 because these are returned in another way. See 1779 `TARGET_STRUCT_VALUE_RTX' and related macros, below. */ 1780#define FUNCTION_VALUE(VALTYPE, FUNC) \ 1781 gen_rtx_REG (TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM) 1782 1783/* A C expression to create an RTX representing the place where a library 1784 function returns a value of mode MODE. 1785 1786 Note that "library function" in this context means a compiler support 1787 routine, used to perform arithmetic, whose name is known specially by the 1788 compiler and was not mentioned in the C code being compiled. 1789 1790 The definition of `LIBRARY_VALUE' need not be concerned aggregate data 1791 types, because none of the library functions returns such types. */ 1792#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM) 1793 1794/* A C expression that is nonzero if REGNO is the number of a hard register in 1795 which the values of called function may come back. 1796 1797 A register whose use for returning values is limited to serving as the 1798 second of a pair (for a value of type `double', say) need not be recognized 1799 by this macro. So for most machines, this definition suffices: 1800 1801 #define FUNCTION_VALUE_REGNO_P(N) ((N) == RETURN) 1802 1803 If the machine has register windows, so that the caller and the called 1804 function use different registers for the return value, this macro should 1805 recognize only the caller's register numbers. */ 1806#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM) 1807 1808 1809/* How Large Values are Returned. */ 1810 1811/* The number of the register that is used to to pass the structure 1812 value address. */ 1813#define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3) 1814 1815 1816/* Function Entry and Exit. */ 1817 1818/* Define this macro as a C expression that is nonzero if the return 1819 instruction or the function epilogue ignores the value of the stack pointer; 1820 in other words, if it is safe to delete an instruction to adjust the stack 1821 pointer before a return from the function. 1822 1823 Note that this macro's value is relevant only for functions for which frame 1824 pointers are maintained. It is never safe to delete a final stack 1825 adjustment in a function that has no frame pointer, and the compiler knows 1826 this regardless of `EXIT_IGNORE_STACK'. */ 1827#define EXIT_IGNORE_STACK 1 1828 1829/* Generating Code for Profiling. */ 1830 1831/* A C statement or compound statement to output to FILE some assembler code to 1832 call the profiling subroutine `mcount'. Before calling, the assembler code 1833 must load the address of a counter variable into a register where `mcount' 1834 expects to find the address. The name of this variable is `LP' followed by 1835 the number LABELNO, so you would generate the name using `LP%d' in a 1836 `fprintf'. 1837 1838 The details of how the address should be passed to `mcount' are determined 1839 by your operating system environment, not by GCC. To figure them out, 1840 compile a small program for profiling using the system's installed C 1841 compiler and look at the assembler code that results. 1842 1843 This declaration must be present, but it can be an abort if profiling is 1844 not implemented. */ 1845 1846#define FUNCTION_PROFILER(FILE, LABELNO) 1847 1848 1849/* Implementing the Varargs Macros. */ 1850 1851/* Implement the stdarg/varargs va_start macro. STDARG_P is nonzero if this 1852 is stdarg.h instead of varargs.h. VALIST is the tree of the va_list 1853 variable to initialize. NEXTARG is the machine independent notion of the 1854 'next' argument after the variable arguments. If not defined, a standard 1855 implementation will be defined that works for arguments passed on the stack. */ 1856 1857#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \ 1858 (frv_expand_builtin_va_start(VALIST, NEXTARG)) 1859 1860 1861/* Trampolines for Nested Functions. */ 1862 1863/* A C expression for the size in bytes of the trampoline, as an integer. */ 1864#define TRAMPOLINE_SIZE frv_trampoline_size () 1865 1866/* Alignment required for trampolines, in bits. 1867 1868 If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for 1869 aligning trampolines. */ 1870#define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32) 1871 1872/* A C statement to initialize the variable parts of a trampoline. ADDR is an 1873 RTX for the address of the trampoline; FNADDR is an RTX for the address of 1874 the nested function; STATIC_CHAIN is an RTX for the static chain value that 1875 should be passed to the function when it is called. */ 1876#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \ 1877 frv_initialize_trampoline (ADDR, FNADDR, STATIC_CHAIN) 1878 1879/* Define this macro if trampolines need a special subroutine to do their work. 1880 The macro should expand to a series of `asm' statements which will be 1881 compiled with GCC. They go in a library function named 1882 `__transfer_from_trampoline'. 1883 1884 If you need to avoid executing the ordinary prologue code of a compiled C 1885 function when you jump to the subroutine, you can do so by placing a special 1886 label of your own in the assembler code. Use one `asm' statement to 1887 generate an assembler label, and another to make the label global. Then 1888 trampolines can use that label to jump directly to your special assembler 1889 code. */ 1890 1891#ifdef __FRV_UNDERSCORE__ 1892#define TRAMPOLINE_TEMPLATE_NAME "___trampoline_template" 1893#else 1894#define TRAMPOLINE_TEMPLATE_NAME "__trampoline_template" 1895#endif 1896 1897#define Twrite _write 1898 1899#if ! __FRV_FDPIC__ 1900#define TRANSFER_FROM_TRAMPOLINE \ 1901extern int Twrite (int, const void *, unsigned); \ 1902 \ 1903void \ 1904__trampoline_setup (short * addr, int size, int fnaddr, int sc) \ 1905{ \ 1906 extern short __trampoline_template[]; \ 1907 short * to = addr; \ 1908 short * from = &__trampoline_template[0]; \ 1909 int i; \ 1910 \ 1911 if (size < 20) \ 1912 { \ 1913 Twrite (2, "__trampoline_setup bad size\n", \ 1914 sizeof ("__trampoline_setup bad size\n") - 1); \ 1915 exit (-1); \ 1916 } \ 1917 \ 1918 to[0] = from[0]; \ 1919 to[1] = (short)(fnaddr); \ 1920 to[2] = from[2]; \ 1921 to[3] = (short)(sc); \ 1922 to[4] = from[4]; \ 1923 to[5] = (short)(fnaddr >> 16); \ 1924 to[6] = from[6]; \ 1925 to[7] = (short)(sc >> 16); \ 1926 to[8] = from[8]; \ 1927 to[9] = from[9]; \ 1928 \ 1929 for (i = 0; i < 20; i++) \ 1930 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ 1931} \ 1932 \ 1933__asm__("\n" \ 1934 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ 1935 "\t.text\n" \ 1936 TRAMPOLINE_TEMPLATE_NAME ":\n" \ 1937 "\tsetlos #0, gr6\n" /* jump register */ \ 1938 "\tsetlos #0, gr7\n" /* static chain */ \ 1939 "\tsethi #0, gr6\n" \ 1940 "\tsethi #0, gr7\n" \ 1941 "\tjmpl @(gr0,gr6)\n"); 1942#else 1943#define TRANSFER_FROM_TRAMPOLINE \ 1944extern int Twrite (int, const void *, unsigned); \ 1945 \ 1946void \ 1947__trampoline_setup (addr, size, fnaddr, sc) \ 1948 short * addr; \ 1949 int size; \ 1950 int fnaddr; \ 1951 int sc; \ 1952{ \ 1953 extern short __trampoline_template[]; \ 1954 short * from = &__trampoline_template[0]; \ 1955 int i; \ 1956 short **desc = (short **)addr; \ 1957 short * to = addr + 4; \ 1958 \ 1959 if (size != 32) \ 1960 { \ 1961 Twrite (2, "__trampoline_setup bad size\n", \ 1962 sizeof ("__trampoline_setup bad size\n") - 1); \ 1963 exit (-1); \ 1964 } \ 1965 \ 1966 /* Create a function descriptor with the address of the code below 1967 and NULL as the FDPIC value. We don't need the real GOT value 1968 here, since we don't use it, so we use NULL, that is just as 1969 good. */ \ 1970 desc[0] = to; \ 1971 desc[1] = NULL; \ 1972 size -= 8; \ 1973 \ 1974 to[0] = from[0]; \ 1975 to[1] = (short)(fnaddr); \ 1976 to[2] = from[2]; \ 1977 to[3] = (short)(sc); \ 1978 to[4] = from[4]; \ 1979 to[5] = (short)(fnaddr >> 16); \ 1980 to[6] = from[6]; \ 1981 to[7] = (short)(sc >> 16); \ 1982 to[8] = from[8]; \ 1983 to[9] = from[9]; \ 1984 to[10] = from[10]; \ 1985 to[11] = from[11]; \ 1986 \ 1987 for (i = 0; i < size; i++) \ 1988 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ 1989} \ 1990 \ 1991__asm__("\n" \ 1992 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ 1993 "\t.text\n" \ 1994 TRAMPOLINE_TEMPLATE_NAME ":\n" \ 1995 "\tsetlos #0, gr6\n" /* Jump register. */ \ 1996 "\tsetlos #0, gr7\n" /* Static chain. */ \ 1997 "\tsethi #0, gr6\n" \ 1998 "\tsethi #0, gr7\n" \ 1999 "\tldd @(gr6,gr0),gr14\n" \ 2000 "\tjmpl @(gr14,gr0)\n" \ 2001 ); 2002#endif 2003 2004 2005/* Addressing Modes. */ 2006 2007/* A C expression that is 1 if the RTX X is a constant which is a valid 2008 address. On most machines, this can be defined as `CONSTANT_P (X)', but a 2009 few machines are more restrictive in which constant addresses are supported. 2010 2011 `CONSTANT_P' accepts integer-values expressions whose values are not 2012 explicitly known, such as `symbol_ref', `label_ref', and `high' expressions 2013 and `const' arithmetic expressions, in addition to `const_int' and 2014 `const_double' expressions. */ 2015#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) 2016 2017/* A number, the maximum number of registers that can appear in a valid memory 2018 address. Note that it is up to you to specify a value equal to the maximum 2019 number that `GO_IF_LEGITIMATE_ADDRESS' would ever accept. */ 2020#define MAX_REGS_PER_ADDRESS 2 2021 2022/* A C compound statement with a conditional `goto LABEL;' executed if X (an 2023 RTX) is a legitimate memory address on the target machine for a memory 2024 operand of mode MODE. 2025 2026 It usually pays to define several simpler macros to serve as subroutines for 2027 this one. Otherwise it may be too complicated to understand. 2028 2029 This macro must exist in two variants: a strict variant and a non-strict 2030 one. The strict variant is used in the reload pass. It must be defined so 2031 that any pseudo-register that has not been allocated a hard register is 2032 considered a memory reference. In contexts where some kind of register is 2033 required, a pseudo-register with no hard register must be rejected. 2034 2035 The non-strict variant is used in other passes. It must be defined to 2036 accept all pseudo-registers in every context where some kind of register is 2037 required. 2038 2039 Compiler source files that want to use the strict variant of this macro 2040 define the macro `REG_OK_STRICT'. You should use an `#ifdef REG_OK_STRICT' 2041 conditional to define the strict variant in that case and the non-strict 2042 variant otherwise. 2043 2044 Subroutines to check for acceptable registers for various purposes (one for 2045 base registers, one for index registers, and so on) are typically among the 2046 subroutines used to define `GO_IF_LEGITIMATE_ADDRESS'. Then only these 2047 subroutine macros need have two variants; the higher levels of macros may be 2048 the same whether strict or not. 2049 2050 Normally, constant addresses which are the sum of a `symbol_ref' and an 2051 integer are stored inside a `const' RTX to mark them as constant. 2052 Therefore, there is no need to recognize such sums specifically as 2053 legitimate addresses. Normally you would simply recognize any `const' as 2054 legitimate. 2055 2056 Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant sums that 2057 are not marked with `const'. It assumes that a naked `plus' indicates 2058 indexing. If so, then you *must* reject such naked constant sums as 2059 illegitimate addresses, so that none of them will be given to 2060 `PRINT_OPERAND_ADDRESS'. 2061 2062 On some machines, whether a symbolic address is legitimate depends on the 2063 section that the address refers to. On these machines, define the macro 2064 `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and 2065 then check for it here. When you see a `const', you will have to look 2066 inside it to find the `symbol_ref' in order to determine the section. 2067 2068 The best way to modify the name string is by adding text to the beginning, 2069 with suitable punctuation to prevent any ambiguity. Allocate the new name 2070 in `saveable_obstack'. You will have to modify `ASM_OUTPUT_LABELREF' to 2071 remove and decode the added text and output the name accordingly, and define 2072 `(* targetm.strip_name_encoding)' to access the original name string. 2073 2074 You can check the information stored here into the `symbol_ref' in the 2075 definitions of the macros `GO_IF_LEGITIMATE_ADDRESS' and 2076 `PRINT_OPERAND_ADDRESS'. */ 2077 2078#ifdef REG_OK_STRICT 2079#define REG_OK_STRICT_P 1 2080#else 2081#define REG_OK_STRICT_P 0 2082#endif 2083 2084#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ 2085 do \ 2086 { \ 2087 if (frv_legitimate_address_p (MODE, X, REG_OK_STRICT_P, \ 2088 FALSE, FALSE)) \ 2089 goto LABEL; \ 2090 } \ 2091 while (0) 2092 2093/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for 2094 use as a base register. For hard registers, it should always accept those 2095 which the hardware permits and reject the others. Whether the macro accepts 2096 or rejects pseudo registers must be controlled by `REG_OK_STRICT' as 2097 described above. This usually requires two variant definitions, of which 2098 `REG_OK_STRICT' controls the one actually used. */ 2099#ifdef REG_OK_STRICT 2100#define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X)) 2101#else 2102#define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X)) 2103#endif 2104 2105/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for 2106 use as an index register. 2107 2108 The difference between an index register and a base register is that the 2109 index register may be scaled. If an address involves the sum of two 2110 registers, neither one of them scaled, then either one may be labeled the 2111 "base" and the other the "index"; but whichever labeling is used must fit 2112 the machine's constraints of which registers may serve in each capacity. 2113 The compiler will try both labelings, looking for one that is valid, and 2114 will reload one or both registers only if neither labeling works. */ 2115#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) 2116 2117#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 2118do { \ 2119 rtx new_x = frv_legitimize_address (X, OLDX, MODE); \ 2120 if (new_x) \ 2121 { \ 2122 (X) = new_x; \ 2123 goto WIN; \ 2124 } \ 2125} while (0) 2126 2127#define FIND_BASE_TERM frv_find_base_term 2128 2129/* A C statement or compound statement with a conditional `goto LABEL;' 2130 executed if memory address X (an RTX) can have different meanings depending 2131 on the machine mode of the memory reference it is used for or if the address 2132 is valid for some modes but not others. 2133 2134 Autoincrement and autodecrement addresses typically have mode-dependent 2135 effects because the amount of the increment or decrement is the size of the 2136 operand being addressed. Some machines have other mode-dependent addresses. 2137 Many RISC machines have no mode-dependent addresses. 2138 2139 You may assume that ADDR is a valid address for the machine. */ 2140#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) 2141 2142/* A C expression that is nonzero if X is a legitimate constant for an 2143 immediate operand on the target machine. You can assume that X satisfies 2144 `CONSTANT_P', so you need not check this. In fact, `1' is a suitable 2145 definition for this macro on machines where anything `CONSTANT_P' is valid. */ 2146#define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X) 2147 2148/* The load-and-update commands allow pre-modification in addresses. 2149 The index has to be in a register. */ 2150#define HAVE_PRE_MODIFY_REG 1 2151 2152 2153/* We define extra CC modes in frv-modes.def so we need a selector. */ 2154 2155#define SELECT_CC_MODE frv_select_cc_mode 2156 2157/* A C expression whose value is one if it is always safe to reverse a 2158 comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for 2159 a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)' 2160 must be zero. 2161 2162 You need not define this macro if it would always returns zero or if the 2163 floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For 2164 example, here is the definition used on the SPARC, where floating-point 2165 inequality comparisons are always given `CCFPEmode': 2166 2167 #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */ 2168 2169/* On frv, don't consider floating point comparisons to be reversible. In 2170 theory, fp equality comparisons can be reversible. */ 2171#define REVERSIBLE_CC_MODE(MODE) \ 2172 ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode) 2173 2174/* Frv CCR_MODE's are not reversible. */ 2175#define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0 2176 2177 2178/* Describing Relative Costs of Operations. */ 2179 2180/* A C expression for the cost of moving data from a register in class FROM to 2181 one in class TO. The classes are expressed using the enumeration values 2182 such as `GENERAL_REGS'. A value of 4 is the default; other values are 2183 interpreted relative to that. 2184 2185 It is not required that the cost always equal 2 when FROM is the same as TO; 2186 on some machines it is expensive to move between registers if they are not 2187 general registers. 2188 2189 If reload sees an insn consisting of a single `set' between two hard 2190 registers, and if `REGISTER_MOVE_COST' applied to their classes returns a 2191 value of 2, reload does not check to ensure that the constraints of the insn 2192 are met. Setting a cost of other than 2 will allow reload to verify that 2193 the constraints are met. You should do this if the `movM' pattern's 2194 constraints do not allow such copying. */ 2195#define REGISTER_MOVE_COST(MODE, FROM, TO) frv_register_move_cost (FROM, TO) 2196 2197/* A C expression for the cost of moving data of mode M between a register and 2198 memory. A value of 2 is the default; this cost is relative to those in 2199 `REGISTER_MOVE_COST'. 2200 2201 If moving between registers and memory is more expensive than between two 2202 registers, you should define this macro to express the relative cost. */ 2203#define MEMORY_MOVE_COST(M,C,I) 4 2204 2205/* A C expression for the cost of a branch instruction. A value of 1 is the 2206 default; other values are interpreted relative to that. */ 2207#define BRANCH_COST frv_branch_cost_int 2208 2209/* Define this macro as a C expression which is nonzero if accessing less than 2210 a word of memory (i.e. a `char' or a `short') is no faster than accessing a 2211 word of memory, i.e., if such access require more than one instruction or if 2212 there is no difference in cost between byte and (aligned) word loads. 2213 2214 When this macro is not defined, the compiler will access a field by finding 2215 the smallest containing object; when it is defined, a fullword load will be 2216 used if alignment permits. Unless bytes accesses are faster than word 2217 accesses, using word accesses is preferable since it may eliminate 2218 subsequent memory access if subsequent accesses occur to other fields in the 2219 same word of the structure, but to different bytes. */ 2220#define SLOW_BYTE_ACCESS 1 2221 2222/* Define this macro if it is as good or better to call a constant function 2223 address than to call an address kept in a register. */ 2224#define NO_FUNCTION_CSE 2225 2226 2227/* Dividing the output into sections. */ 2228 2229/* A C expression whose value is a string containing the assembler operation 2230 that should precede instructions and read-only data. Normally `".text"' is 2231 right. */ 2232#define TEXT_SECTION_ASM_OP "\t.text" 2233 2234/* A C expression whose value is a string containing the assembler operation to 2235 identify the following data as writable initialized data. Normally 2236 `".data"' is right. */ 2237#define DATA_SECTION_ASM_OP "\t.data" 2238 2239/* If defined, a C expression whose value is a string containing the 2240 assembler operation to identify the following data as 2241 uninitialized global data. If not defined, and neither 2242 `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined, 2243 uninitialized global data will be output in the data section if 2244 `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be 2245 used. */ 2246#define BSS_SECTION_ASM_OP "\t.section .bss,\"aw\"" 2247 2248/* Short Data Support */ 2249#define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\"" 2250 2251/* On svr4, we *do* have support for the .init and .fini sections, and we 2252 can put stuff in there to be executed before and after `main'. We let 2253 crtstuff.c and other files know this by defining the following symbols. 2254 The definitions say how to change sections to the .init and .fini 2255 sections. This is the same for all known svr4 assemblers. 2256 2257 The standard System V.4 macros will work, but they look ugly in the 2258 assembly output, so redefine them. */ 2259 2260#undef INIT_SECTION_ASM_OP 2261#undef FINI_SECTION_ASM_OP 2262#define INIT_SECTION_ASM_OP "\t.section .init,\"ax\"" 2263#define FINI_SECTION_ASM_OP "\t.section .fini,\"ax\"" 2264 2265#undef CTORS_SECTION_ASM_OP 2266#undef DTORS_SECTION_ASM_OP 2267#define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\"" 2268#define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\"" 2269 2270/* A C expression whose value is a string containing the assembler operation to 2271 switch to the fixup section that records all initialized pointers in a -fpic 2272 program so they can be changed program startup time if the program is loaded 2273 at a different address than linked for. */ 2274#define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\"" 2275 2276/* A list of names for sections other than the standard two, which are 2277 `in_text' and `in_data'. You need not define this macro 2278 on a system with no other sections (that GCC needs to use). */ 2279#undef EXTRA_SECTIONS 2280#define EXTRA_SECTIONS in_sdata, in_const, in_fixup 2281 2282/* One or more functions to be defined in "varasm.c". These 2283 functions should do jobs analogous to those of `text_section' and 2284 `data_section', for your additional sections. Do not define this 2285 macro if you do not define `EXTRA_SECTIONS'. */ 2286#undef EXTRA_SECTION_FUNCTIONS 2287#define EXTRA_SECTION_FUNCTIONS \ 2288 SDATA_SECTION_FUNCTION \ 2289 FIXUP_SECTION_FUNCTION 2290 2291#define SDATA_SECTION_FUNCTION \ 2292void \ 2293sdata_section (void) \ 2294{ \ 2295 if (in_section != in_sdata) \ 2296 { \ 2297 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ 2298 in_section = in_sdata; \ 2299 } \ 2300} 2301 2302#define FIXUP_SECTION_FUNCTION \ 2303void \ 2304fixup_section (void) \ 2305{ \ 2306 if (in_section != in_fixup) \ 2307 { \ 2308 fprintf (asm_out_file, "%s\n", FIXUP_SECTION_ASM_OP); \ 2309 in_section = in_fixup; \ 2310 } \ 2311} 2312 2313/* Position Independent Code. */ 2314 2315/* A C expression that is nonzero if X is a legitimate immediate operand on the 2316 target machine when generating position independent code. You can assume 2317 that X satisfies `CONSTANT_P', so you need not check this. You can also 2318 assume FLAG_PIC is true, so you need not check it either. You need not 2319 define this macro if all constants (including `SYMBOL_REF') can be immediate 2320 operands when generating position independent code. */ 2321#define LEGITIMATE_PIC_OPERAND_P(X) \ 2322 ( GET_CODE (X) == CONST_INT \ 2323 || GET_CODE (X) == CONST_DOUBLE \ 2324 || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \ 2325 || got12_operand (X, VOIDmode)) \ 2326 2327 2328/* The Overall Framework of an Assembler File. */ 2329 2330/* A C string constant describing how to begin a comment in the target 2331 assembler language. The compiler assumes that the comment will end at the 2332 end of the line. */ 2333#define ASM_COMMENT_START ";" 2334 2335/* A C string constant for text to be output before each `asm' statement or 2336 group of consecutive ones. Normally this is `"#APP"', which is a comment 2337 that has no effect on most assemblers but tells the GNU assembler that it 2338 must check the lines that follow for all valid assembler constructs. */ 2339#define ASM_APP_ON "#APP\n" 2340 2341/* A C string constant for text to be output after each `asm' statement or 2342 group of consecutive ones. Normally this is `"#NO_APP"', which tells the 2343 GNU assembler to resume making the time-saving assumptions that are valid 2344 for ordinary compiler output. */ 2345#define ASM_APP_OFF "#NO_APP\n" 2346 2347 2348/* Output of Data. */ 2349 2350/* This is how to output a label to dwarf/dwarf2. */ 2351#define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \ 2352do { \ 2353 fprintf (STREAM, "\t.picptr\t"); \ 2354 assemble_name (STREAM, LABEL); \ 2355} while (0) 2356 2357/* Whether to emit the gas specific dwarf2 line number support. */ 2358#define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC) 2359 2360/* Output of Uninitialized Variables. */ 2361 2362/* A C statement (sans semicolon) to output to the stdio stream STREAM the 2363 assembler definition of a local-common-label named NAME whose size is SIZE 2364 bytes. The variable ROUNDED is the size rounded up to whatever alignment 2365 the caller wants. 2366 2367 Use the expression `assemble_name (STREAM, NAME)' to output the name itself; 2368 before and after that, output the additional assembler syntax for defining 2369 the name, and a newline. 2370 2371 This macro controls how the assembler definitions of uninitialized static 2372 variables are output. */ 2373#undef ASM_OUTPUT_LOCAL 2374 2375/* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate, 2376 explicit argument. If you define this macro, it is used in place of 2377 `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required 2378 alignment of the variable. The alignment is specified as the number of 2379 bits. 2380 2381 Defined in svr4.h. */ 2382#undef ASM_OUTPUT_ALIGNED_LOCAL 2383 2384/* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */ 2385extern int size_directive_output; 2386 2387/* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional 2388 parameter - the DECL of variable to be output, if there is one. 2389 This macro can be called with DECL == NULL_TREE. If you define 2390 this macro, it is used in place of `ASM_OUTPUT_LOCAL' and 2391 `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in 2392 handling the destination of the variable. */ 2393#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL 2394#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ 2395do { \ 2396 if ((SIZE) > 0 && (SIZE) <= g_switch_value) \ 2397 named_section (0, ".sbss", 0); \ 2398 else \ 2399 bss_section (); \ 2400 ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \ 2401 ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \ 2402 ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \ 2403} while (0) 2404 2405 2406/* Output and Generation of Labels. */ 2407 2408/* A C statement (sans semicolon) to output to the stdio stream STREAM the 2409 assembler definition of a label named NAME. Use the expression 2410 `assemble_name (STREAM, NAME)' to output the name itself; before and after 2411 that, output the additional assembler syntax for defining the name, and a 2412 newline. */ 2413#define ASM_OUTPUT_LABEL(STREAM, NAME) \ 2414do { \ 2415 assemble_name (STREAM, NAME); \ 2416 fputs (":\n", STREAM); \ 2417} while (0) 2418 2419/* Globalizing directive for a label. */ 2420#define GLOBAL_ASM_OP "\t.globl " 2421 2422/* A C statement to store into the string STRING a label whose name is made 2423 from the string PREFIX and the number NUM. 2424 2425 This string, when output subsequently by `assemble_name', should produce the 2426 output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX 2427 and NUM. 2428 2429 If the string begins with `*', then `assemble_name' will output the rest of 2430 the string unchanged. It is often convenient for 2431 `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't 2432 start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and 2433 may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your 2434 machine description, so you should know what it does on your machine.) 2435 2436 Defined in svr4.h. */ 2437#undef ASM_GENERATE_INTERNAL_LABEL 2438#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ 2439do { \ 2440 sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \ 2441} while (0) 2442 2443 2444/* Macros Controlling Initialization Routines. */ 2445 2446/* If defined, a C string constant for the assembler operation to identify the 2447 following data as initialization code. If not defined, GCC will assume 2448 such a section does not exist. When you are using special sections for 2449 initialization and termination functions, this macro also controls how 2450 `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions. 2451 2452 Defined in svr4.h. */ 2453#undef INIT_SECTION_ASM_OP 2454 2455/* If defined, `main' will call `__main' despite the presence of 2456 `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the 2457 init section is not actually run automatically, but is still useful for 2458 collecting the lists of constructors and destructors. */ 2459#define INVOKE__main 2460 2461/* Output of Assembler Instructions. */ 2462 2463/* A C initializer containing the assembler's names for the machine registers, 2464 each one as a C string constant. This is what translates register numbers 2465 in the compiler into assembler language. */ 2466#define REGISTER_NAMES \ 2467{ \ 2468 "gr0", "sp", "fp", "gr3", "gr4", "gr5", "gr6", "gr7", \ 2469 "gr8", "gr9", "gr10", "gr11", "gr12", "gr13", "gr14", "gr15", \ 2470 "gr16", "gr17", "gr18", "gr19", "gr20", "gr21", "gr22", "gr23", \ 2471 "gr24", "gr25", "gr26", "gr27", "gr28", "gr29", "gr30", "gr31", \ 2472 "gr32", "gr33", "gr34", "gr35", "gr36", "gr37", "gr38", "gr39", \ 2473 "gr40", "gr41", "gr42", "gr43", "gr44", "gr45", "gr46", "gr47", \ 2474 "gr48", "gr49", "gr50", "gr51", "gr52", "gr53", "gr54", "gr55", \ 2475 "gr56", "gr57", "gr58", "gr59", "gr60", "gr61", "gr62", "gr63", \ 2476 \ 2477 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ 2478 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \ 2479 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \ 2480 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31", \ 2481 "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39", \ 2482 "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47", \ 2483 "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55", \ 2484 "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63", \ 2485 \ 2486 "fcc0", "fcc1", "fcc2", "fcc3", "icc0", "icc1", "icc2", "icc3", \ 2487 "cc0", "cc1", "cc2", "cc3", "cc4", "cc5", "cc6", "cc7", \ 2488 "acc0", "acc1", "acc2", "acc3", "acc4", "acc5", "acc6", "acc7", \ 2489 "acc8", "acc9", "acc10", "acc11", \ 2490 "accg0","accg1","accg2","accg3","accg4","accg5","accg6","accg7", \ 2491 "accg8", "accg9", "accg10", "accg11", \ 2492 "ap", "lr", "lcr", "iacc0h", "iacc0l" \ 2493} 2494 2495/* Define this macro if you are using an unusual assembler that 2496 requires different names for the machine instructions. 2497 2498 The definition is a C statement or statements which output an 2499 assembler instruction opcode to the stdio stream STREAM. The 2500 macro-operand PTR is a variable of type `char *' which points to 2501 the opcode name in its "internal" form--the form that is written 2502 in the machine description. The definition should output the 2503 opcode name to STREAM, performing any translation you desire, and 2504 increment the variable PTR to point at the end of the opcode so 2505 that it will not be output twice. 2506 2507 In fact, your macro definition may process less than the entire 2508 opcode name, or more than the opcode name; but if you want to 2509 process text that includes `%'-sequences to substitute operands, 2510 you must take care of the substitution yourself. Just be sure to 2511 increment PTR over whatever text should not be output normally. 2512 2513 If you need to look at the operand values, they can be found as the 2514 elements of `recog_operand'. 2515 2516 If the macro definition does nothing, the instruction is output in 2517 the usual way. */ 2518 2519#define ASM_OUTPUT_OPCODE(STREAM, PTR)\ 2520 (PTR) = frv_asm_output_opcode (STREAM, PTR) 2521 2522/* If defined, a C statement to be executed just prior to the output 2523 of assembler code for INSN, to modify the extracted operands so 2524 they will be output differently. 2525 2526 Here the argument OPVEC is the vector containing the operands 2527 extracted from INSN, and NOPERANDS is the number of elements of 2528 the vector which contain meaningful data for this insn. The 2529 contents of this vector are what will be used to convert the insn 2530 template into assembler code, so you can change the assembler 2531 output by changing the contents of the vector. 2532 2533 This macro is useful when various assembler syntaxes share a single 2534 file of instruction patterns; by defining this macro differently, 2535 you can cause a large class of instructions to be output 2536 differently (such as with rearranged operands). Naturally, 2537 variations in assembler syntax affecting individual insn patterns 2538 ought to be handled by writing conditional output routines in 2539 those patterns. 2540 2541 If this macro is not defined, it is equivalent to a null statement. */ 2542 2543#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\ 2544 frv_final_prescan_insn (INSN, OPVEC, NOPERANDS) 2545 2546 2547/* A C compound statement to output to stdio stream STREAM the assembler syntax 2548 for an instruction operand X. X is an RTL expression. 2549 2550 CODE is a value that can be used to specify one of several ways of printing 2551 the operand. It is used when identical operands must be printed differently 2552 depending on the context. CODE comes from the `%' specification that was 2553 used to request printing of the operand. If the specification was just 2554 `%DIGIT' then CODE is 0; if the specification was `%LTR DIGIT' then CODE is 2555 the ASCII code for LTR. 2556 2557 If X is a register, this macro should print the register's name. The names 2558 can be found in an array `reg_names' whose type is `char *[]'. `reg_names' 2559 is initialized from `REGISTER_NAMES'. 2560 2561 When the machine description has a specification `%PUNCT' (a `%' followed by 2562 a punctuation character), this macro is called with a null pointer for X and 2563 the punctuation character for CODE. */ 2564#define PRINT_OPERAND(STREAM, X, CODE) frv_print_operand (STREAM, X, CODE) 2565 2566/* A C expression which evaluates to true if CODE is a valid punctuation 2567 character for use in the `PRINT_OPERAND' macro. If 2568 `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no punctuation 2569 characters (except for the standard one, `%') are used in this way. */ 2570/* . == gr0 2571 # == hint operand -- always zero for now 2572 @ == small data base register (gr16) 2573 ~ == pic register (gr17) 2574 * == temporary integer CCR register (cr3) 2575 & == temporary integer ICC register (icc3) */ 2576#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2577((CODE) == '.' || (CODE) == '#' || (CODE) == '@' || (CODE) == '~' \ 2578 || (CODE) == '*' || (CODE) == '&') 2579 2580/* A C compound statement to output to stdio stream STREAM the assembler syntax 2581 for an instruction operand that is a memory reference whose address is X. X 2582 is an RTL expression. 2583 2584 On some machines, the syntax for a symbolic address depends on the section 2585 that the address refers to. On these machines, define the macro 2586 `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and 2587 then check for it here. 2588 2589 This declaration must be present. */ 2590#define PRINT_OPERAND_ADDRESS(STREAM, X) frv_print_operand_address (STREAM, X) 2591 2592/* If defined, C string expressions to be used for the `%R', `%L', `%U', and 2593 `%I' options of `asm_fprintf' (see `final.c'). These are useful when a 2594 single `md' file must support multiple assembler formats. In that case, the 2595 various `tm.h' files can define these macros differently. 2596 2597 USER_LABEL_PREFIX is defined in svr4.h. */ 2598#undef USER_LABEL_PREFIX 2599#define USER_LABEL_PREFIX "" 2600#define REGISTER_PREFIX "" 2601#define LOCAL_LABEL_PREFIX "." 2602#define IMMEDIATE_PREFIX "#" 2603 2604 2605/* Output of dispatch tables. */ 2606 2607/* This macro should be provided on machines where the addresses in a dispatch 2608 table are relative to the table's own address. 2609 2610 The definition should be a C statement to output to the stdio stream STREAM 2611 an assembler pseudo-instruction to generate a difference between two labels. 2612 VALUE and REL are the numbers of two internal labels. The definitions of 2613 these labels are output using `(*targetm.asm_out.internal_label)', and they must be 2614 printed in the same way here. For example, 2615 2616 fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */ 2617#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ 2618fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) 2619 2620/* This macro should be provided on machines where the addresses in a dispatch 2621 table are absolute. 2622 2623 The definition should be a C statement to output to the stdio stream STREAM 2624 an assembler pseudo-instruction to generate a reference to a label. VALUE 2625 is the number of an internal label whose definition is output using 2626 `(*targetm.asm_out.internal_label)'. For example, 2627 2628 fprintf (STREAM, "\t.word L%d\n", VALUE) */ 2629#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 2630fprintf (STREAM, "\t.word .L%d\n", VALUE) 2631 2632/* Define this if the label before a jump-table needs to be output specially. 2633 The first three arguments are the same as for `(*targetm.asm_out.internal_label)'; 2634 the fourth argument is the jump-table which follows (a `jump_insn' 2635 containing an `addr_vec' or `addr_diff_vec'). 2636 2637 This feature is used on system V to output a `swbeg' statement for the 2638 table. 2639 2640 If this macro is not defined, these labels are output with 2641 `(*targetm.asm_out.internal_label)'. 2642 2643 Defined in svr4.h. */ 2644/* When generating embedded PIC or mips16 code we want to put the jump 2645 table in the .text section. In all other cases, we want to put the 2646 jump table in the .rdata section. Unfortunately, we can't use 2647 JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional. 2648 Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text 2649 section if appropriate. */ 2650 2651#undef ASM_OUTPUT_CASE_LABEL 2652#define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \ 2653do { \ 2654 if (flag_pic) \ 2655 function_section (current_function_decl); \ 2656 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM); \ 2657} while (0) 2658 2659 2660/* Assembler Commands for Exception Regions. */ 2661 2662/* Define this macro to 0 if your target supports DWARF 2 frame unwind 2663 information, but it does not yet work with exception handling. Otherwise, 2664 if your target supports this information (if it defines 2665 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or 2666 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1. 2667 2668 If this macro is defined to 1, the DWARF 2 unwinder will be the default 2669 exception handling mechanism; otherwise, setjmp/longjmp will be used by 2670 default. 2671 2672 If this macro is defined to anything, the DWARF 2 unwinder will be used 2673 instead of inline unwinders and __unwind_function in the non-setjmp case. */ 2674#define DWARF2_UNWIND_INFO 1 2675 2676#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO) 2677 2678/* Assembler Commands for Alignment. */ 2679 2680/* A C statement to output to the stdio stream STREAM an assembler instruction 2681 to advance the location counter by NBYTES bytes. Those bytes should be zero 2682 when loaded. NBYTES will be a C expression of type `int'. 2683 2684 Defined in svr4.h. */ 2685#undef ASM_OUTPUT_SKIP 2686#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \ 2687 fprintf (STREAM, "\t.zero\t%u\n", (int)(NBYTES)) 2688 2689/* A C statement to output to the stdio stream STREAM an assembler command to 2690 advance the location counter to a multiple of 2 to the POWER bytes. POWER 2691 will be a C expression of type `int'. */ 2692#define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 2693 fprintf ((STREAM), "\t.p2align %d\n", (POWER)) 2694 2695/* Inside the text section, align with unpacked nops rather than zeros. */ 2696#define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \ 2697 fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER)) 2698 2699/* Macros Affecting all Debug Formats. */ 2700 2701/* A C expression that returns the DBX register number for the compiler 2702 register number REGNO. In simple cases, the value of this expression may be 2703 REGNO itself. But sometimes there are some registers that the compiler 2704 knows about and DBX does not, or vice versa. In such cases, some register 2705 may need to have one number in the compiler and another for DBX. 2706 2707 If two registers have consecutive numbers inside GCC, and they can be 2708 used as a pair to hold a multiword value, then they *must* have consecutive 2709 numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers 2710 will be unable to access such a pair, because they expect register pairs to 2711 be consecutive in their own numbering scheme. 2712 2713 If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not 2714 preserve register pairs, then what you must do instead is redefine the 2715 actual register numbering scheme. 2716 2717 This declaration is required. */ 2718#define DBX_REGISTER_NUMBER(REGNO) (REGNO) 2719 2720/* A C expression that returns the type of debugging output GCC produces 2721 when the user specifies `-g' or `-ggdb'. Define this if you have arranged 2722 for GCC to support more than one format of debugging output. Currently, 2723 the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG', 2724 `DWARF2_DEBUG', and `XCOFF_DEBUG'. 2725 2726 The value of this macro only affects the default debugging output; the user 2727 can always get a specific type of output by using `-gstabs', `-gcoff', 2728 `-gdwarf-1', `-gdwarf-2', or `-gxcoff'. 2729 2730 Defined in svr4.h. */ 2731#undef PREFERRED_DEBUGGING_TYPE 2732#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 2733 2734/* Miscellaneous Parameters. */ 2735 2736/* An alias for a machine mode name. This is the machine mode that elements of 2737 a jump-table should have. */ 2738#define CASE_VECTOR_MODE SImode 2739 2740/* Define this macro if operations between registers with integral mode smaller 2741 than a word are always performed on the entire register. Most RISC machines 2742 have this property and most CISC machines do not. */ 2743#define WORD_REGISTER_OPERATIONS 2744 2745/* Define this macro to be a C expression indicating when insns that read 2746 memory in MODE, an integral mode narrower than a word, set the bits outside 2747 of MODE to be either the sign-extension or the zero-extension of the data 2748 read. Return `SIGN_EXTEND' for values of MODE for which the insn 2749 sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other 2750 modes. 2751 2752 This macro is not called with MODE non-integral or with a width greater than 2753 or equal to `BITS_PER_WORD', so you may return any value in this case. Do 2754 not define this macro if it would always return `UNKNOWN'. On machines where 2755 this macro is defined, you will normally define it as the constant 2756 `SIGN_EXTEND' or `ZERO_EXTEND'. */ 2757#define LOAD_EXTEND_OP(MODE) SIGN_EXTEND 2758 2759/* Define if loading short immediate values into registers sign extends. */ 2760#define SHORT_IMMEDIATES_SIGN_EXTEND 2761 2762/* The maximum number of bytes that a single instruction can move quickly from 2763 memory to memory. */ 2764#define MOVE_MAX 8 2765 2766/* A C expression which is nonzero if on this machine it is safe to "convert" 2767 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller 2768 than INPREC) by merely operating on it as if it had only OUTPREC bits. 2769 2770 On many machines, this expression can be 1. 2771 2772 When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for 2773 which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the 2774 case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve 2775 things. */ 2776#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 2777 2778/* An alias for the machine mode for pointers. On most machines, define this 2779 to be the integer mode corresponding to the width of a hardware pointer; 2780 `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines 2781 you must define this to be one of the partial integer modes, such as 2782 `PSImode'. 2783 2784 The width of `Pmode' must be at least as large as the value of 2785 `POINTER_SIZE'. If it is not equal, you must define the macro 2786 `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */ 2787#define Pmode SImode 2788 2789/* An alias for the machine mode used for memory references to functions being 2790 called, in `call' RTL expressions. On most machines this should be 2791 `QImode'. */ 2792#define FUNCTION_MODE QImode 2793 2794/* Define this macro to handle System V style pragmas: #pragma pack and 2795 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is 2796 defined. 2797 2798 Defined in svr4.h. */ 2799#define HANDLE_SYSV_PRAGMA 1 2800 2801/* A C expression for the maximum number of instructions to execute via 2802 conditional execution instructions instead of a branch. A value of 2803 BRANCH_COST+1 is the default if the machine does not use 2804 cc0, and 1 if it does use cc0. */ 2805#define MAX_CONDITIONAL_EXECUTE frv_condexec_insns 2806 2807/* A C expression to modify the code described by the conditional if 2808 information CE_INFO, possibly updating the tests in TRUE_EXPR, and 2809 FALSE_EXPR for converting if-then and if-then-else code to conditional 2810 instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the 2811 tests cannot be converted. */ 2812#define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \ 2813frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR) 2814 2815/* A C expression to modify the code described by the conditional if 2816 information CE_INFO, for the basic block BB, possibly updating the tests in 2817 TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or 2818 if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are 2819 the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if 2820 the tests cannot be converted. */ 2821#define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \ 2822frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR) 2823 2824/* A C expression to modify the code described by the conditional if 2825 information CE_INFO with the new PATTERN in INSN. If PATTERN is a null 2826 pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that 2827 insn cannot be converted to be executed conditionally. */ 2828#define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \ 2829(PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN) 2830 2831/* A C expression to perform any final machine dependent modifications in 2832 converting code to conditional execution in the code described by the 2833 conditional if information CE_INFO. */ 2834#define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO) 2835 2836/* A C expression to cancel any machine dependent modifications in converting 2837 code to conditional execution in the code described by the conditional if 2838 information CE_INFO. */ 2839#define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO) 2840 2841/* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */ 2842#define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO) 2843 2844/* The definition of the following macro results in that the 2nd jump 2845 optimization (after the 2nd insn scheduling) is minimal. It is 2846 necessary to define when start cycle marks of insns (TImode is used 2847 for this) is used for VLIW insn packing. Some jump optimizations 2848 make such marks invalid. These marks are corrected for some 2849 (minimal) optimizations. ??? Probably the macro is temporary. 2850 Final solution could making the 2nd jump optimizations before the 2851 2nd instruction scheduling or corrections of the marks for all jump 2852 optimizations. Although some jump optimizations are actually 2853 deoptimizations for VLIW (super-scalar) processors. */ 2854 2855#define MINIMAL_SECOND_JUMP_OPTIMIZATION 2856 2857 2858/* If the following macro is defined and nonzero and deterministic 2859 finite state automata are used for pipeline hazard recognition, the 2860 code making resource-constrained software pipelining is on. */ 2861#define RCSP_SOFTWARE_PIPELINING 1 2862 2863/* If the following macro is defined and nonzero and deterministic 2864 finite state automata are used for pipeline hazard recognition, we 2865 will try to exchange insns in queue ready to improve the schedule. 2866 The more macro value, the more tries will be made. */ 2867#define FIRST_CYCLE_MULTIPASS_SCHEDULING 1 2868 2869/* The following macro is used only when value of 2870 FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value, 2871 the more tries will be made to choose better schedule. If the 2872 macro value is zero or negative there will be no multi-pass 2873 scheduling. */ 2874#define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead 2875 2876enum frv_builtins 2877{ 2878 FRV_BUILTIN_MAND, 2879 FRV_BUILTIN_MOR, 2880 FRV_BUILTIN_MXOR, 2881 FRV_BUILTIN_MNOT, 2882 FRV_BUILTIN_MAVEH, 2883 FRV_BUILTIN_MSATHS, 2884 FRV_BUILTIN_MSATHU, 2885 FRV_BUILTIN_MADDHSS, 2886 FRV_BUILTIN_MADDHUS, 2887 FRV_BUILTIN_MSUBHSS, 2888 FRV_BUILTIN_MSUBHUS, 2889 FRV_BUILTIN_MPACKH, 2890 FRV_BUILTIN_MQADDHSS, 2891 FRV_BUILTIN_MQADDHUS, 2892 FRV_BUILTIN_MQSUBHSS, 2893 FRV_BUILTIN_MQSUBHUS, 2894 FRV_BUILTIN_MUNPACKH, 2895 FRV_BUILTIN_MDPACKH, 2896 FRV_BUILTIN_MBTOH, 2897 FRV_BUILTIN_MHTOB, 2898 FRV_BUILTIN_MCOP1, 2899 FRV_BUILTIN_MCOP2, 2900 FRV_BUILTIN_MROTLI, 2901 FRV_BUILTIN_MROTRI, 2902 FRV_BUILTIN_MWCUT, 2903 FRV_BUILTIN_MSLLHI, 2904 FRV_BUILTIN_MSRLHI, 2905 FRV_BUILTIN_MSRAHI, 2906 FRV_BUILTIN_MEXPDHW, 2907 FRV_BUILTIN_MEXPDHD, 2908 FRV_BUILTIN_MMULHS, 2909 FRV_BUILTIN_MMULHU, 2910 FRV_BUILTIN_MMULXHS, 2911 FRV_BUILTIN_MMULXHU, 2912 FRV_BUILTIN_MMACHS, 2913 FRV_BUILTIN_MMACHU, 2914 FRV_BUILTIN_MMRDHS, 2915 FRV_BUILTIN_MMRDHU, 2916 FRV_BUILTIN_MQMULHS, 2917 FRV_BUILTIN_MQMULHU, 2918 FRV_BUILTIN_MQMULXHU, 2919 FRV_BUILTIN_MQMULXHS, 2920 FRV_BUILTIN_MQMACHS, 2921 FRV_BUILTIN_MQMACHU, 2922 FRV_BUILTIN_MCPXRS, 2923 FRV_BUILTIN_MCPXRU, 2924 FRV_BUILTIN_MCPXIS, 2925 FRV_BUILTIN_MCPXIU, 2926 FRV_BUILTIN_MQCPXRS, 2927 FRV_BUILTIN_MQCPXRU, 2928 FRV_BUILTIN_MQCPXIS, 2929 FRV_BUILTIN_MQCPXIU, 2930 FRV_BUILTIN_MCUT, 2931 FRV_BUILTIN_MCUTSS, 2932 FRV_BUILTIN_MWTACC, 2933 FRV_BUILTIN_MWTACCG, 2934 FRV_BUILTIN_MRDACC, 2935 FRV_BUILTIN_MRDACCG, 2936 FRV_BUILTIN_MTRAP, 2937 FRV_BUILTIN_MCLRACC, 2938 FRV_BUILTIN_MCLRACCA, 2939 FRV_BUILTIN_MDUNPACKH, 2940 FRV_BUILTIN_MBTOHE, 2941 FRV_BUILTIN_MQXMACHS, 2942 FRV_BUILTIN_MQXMACXHS, 2943 FRV_BUILTIN_MQMACXHS, 2944 FRV_BUILTIN_MADDACCS, 2945 FRV_BUILTIN_MSUBACCS, 2946 FRV_BUILTIN_MASACCS, 2947 FRV_BUILTIN_MDADDACCS, 2948 FRV_BUILTIN_MDSUBACCS, 2949 FRV_BUILTIN_MDASACCS, 2950 FRV_BUILTIN_MABSHS, 2951 FRV_BUILTIN_MDROTLI, 2952 FRV_BUILTIN_MCPLHI, 2953 FRV_BUILTIN_MCPLI, 2954 FRV_BUILTIN_MDCUTSSI, 2955 FRV_BUILTIN_MQSATHS, 2956 FRV_BUILTIN_MQLCLRHS, 2957 FRV_BUILTIN_MQLMTHS, 2958 FRV_BUILTIN_MQSLLHI, 2959 FRV_BUILTIN_MQSRAHI, 2960 FRV_BUILTIN_MHSETLOS, 2961 FRV_BUILTIN_MHSETLOH, 2962 FRV_BUILTIN_MHSETHIS, 2963 FRV_BUILTIN_MHSETHIH, 2964 FRV_BUILTIN_MHDSETS, 2965 FRV_BUILTIN_MHDSETH, 2966 FRV_BUILTIN_SMUL, 2967 FRV_BUILTIN_UMUL, 2968 FRV_BUILTIN_PREFETCH0, 2969 FRV_BUILTIN_PREFETCH, 2970 FRV_BUILTIN_SMASS, 2971 FRV_BUILTIN_SMSSS, 2972 FRV_BUILTIN_SMU, 2973 FRV_BUILTIN_SCUTSS, 2974 FRV_BUILTIN_ADDSS, 2975 FRV_BUILTIN_SUBSS, 2976 FRV_BUILTIN_SLASS, 2977 FRV_BUILTIN_IACCreadll, 2978 FRV_BUILTIN_IACCreadl, 2979 FRV_BUILTIN_IACCsetll, 2980 FRV_BUILTIN_IACCsetl, 2981 FRV_BUILTIN_SCAN, 2982 FRV_BUILTIN_READ8, 2983 FRV_BUILTIN_READ16, 2984 FRV_BUILTIN_READ32, 2985 FRV_BUILTIN_READ64, 2986 FRV_BUILTIN_WRITE8, 2987 FRV_BUILTIN_WRITE16, 2988 FRV_BUILTIN_WRITE32, 2989 FRV_BUILTIN_WRITE64 2990}; 2991#define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL 2992 2993/* Enable prototypes on the call rtl functions. */ 2994#define MD_CALL_PROTOTYPES 1 2995 2996extern GTY(()) rtx frv_compare_op0; /* operand save for */ 2997extern GTY(()) rtx frv_compare_op1; /* comparison generation */ 2998 2999#define CPU_UNITS_QUERY 1 3000 3001#ifdef __FRV_FDPIC__ 3002#define CRT_GET_RFIB_DATA(dbase) \ 3003 ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; }) 3004#endif 3005 3006#endif /* __FRV_H__ */ 3007