ia64-defs.m4 revision 1.1.1.1
1divert(-1) 2 3 4dnl Copyright 2000, 2002, 2003 Free Software Foundation, Inc. 5dnl 6dnl This file is part of the GNU MP Library. 7dnl 8dnl The GNU MP Library is free software; you can redistribute it and/or 9dnl modify it under the terms of the GNU Lesser General Public License as 10dnl published by the Free Software Foundation; either version 3 of the 11dnl License, or (at your option) any later version. 12dnl 13dnl The GNU MP Library is distributed in the hope that it will be useful, 14dnl but WITHOUT ANY WARRANTY; without even the implied warranty of 15dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16dnl Lesser General Public License for more details. 17dnl 18dnl You should have received a copy of the GNU Lesser General Public License 19dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. 20 21 22dnl ia64 assembler comments are C++ style "//" to the end of line. gas 23dnl also accepts "#" as a comment, if it's the first non-blank on a line. 24dnl 25dnl BSD m4 can't handle a multi-character comment like "//" (see notes in 26dnl mpn/asm-defs.m4). For now the default "#" is left, but with care taken 27dnl not to put any macros after "foo#" (since of course they won't expand). 28 29 30define(`ASM_START', 31m4_assert_numargs(0) 32`') 33 34 35dnl Called: PROLOGUE_cpu(GSYM_PREFIX`'foo) 36dnl EPILOGUE_cpu(GSYM_PREFIX`'foo) 37dnl 38dnl 32-byte alignment is used for the benefit of itanium-2, where the code 39dnl fetcher will only take 2 bundles from a 32-byte aligned target. At 40dnl 16mod32 it only reads 1 in the first cycle. This might not make any 41dnl difference if the rotate buffers are full or there's other work holding 42dnl up execution, but we use 32-bytes to give the best chance of peak 43dnl throughput. 44dnl 45dnl We can use .align here despite the gas bug noted in mpn/ia64/README, 46dnl since we're not expecting to execute across a PROLOGUE(), at least not 47dnl currently. 48 49define(`PROLOGUE_cpu', 50m4_assert_numargs(1) 51 ` 52 .text 53 .align 32 54 .global $1# 55 .proc $1# 56$1:') 57 58define(`EPILOGUE_cpu', 59m4_assert_numargs(1) 60 ` 61 .endp $1# 62') 63 64define(`DATASTART', 65 `dnl 66 DATA 67$1:') 68define(`DATAEND',`dnl') 69 70define(`ASM_END',`dnl') 71 72 73dnl Usage: ALIGN(bytes) 74dnl 75dnl Emit a ".align" directive. "bytes" is eval()ed, so can be an 76dnl expression. 77dnl 78dnl This version overrides the definition in mpn/asm-defs.m4. We suppress 79dnl any .align if the gas byte-swapped-nops bug was detected by configure 80dnl GMP_ASM_IA64_ALIGN_OK. 81 82define(`ALIGN', 83m4_assert_numargs(1) 84m4_assert_defined(`IA64_ALIGN_OK') 85`ifelse(IA64_ALIGN_OK,no,, 86`.align eval($1)')') 87 88 89dnl Usage: ASSERT([pr] [,code]) 90dnl 91dnl Require that the given predictate register is true after executing the 92dnl test code. For example, 93dnl 94dnl ASSERT(p6, 95dnl ` cmp.eq p6,p0 = r3, r4') 96dnl 97dnl If the predicate register argument is empty then nothing is tested, the 98dnl code is just executed. This can be used for setups required by later 99dnl ASSERTs. The code argument can be omitted to just test a predicate 100dnl with no special setup code. 101dnl 102dnl For convenience, stops are inserted before and after the code emitted. 103 104define(ASSERT, 105m4_assert_numargs_range(1,2) 106m4_assert_defined(`WANT_ASSERT') 107`ifelse(WANT_ASSERT,1, 108` ;; 109ifelse(`$2',,, 110`$2 111 ;; 112') 113ifelse(`$1',,, 114`($1) br .LASSERTok`'ASSERT_label_counter ;; 115 cmp.ne p6,p6 = r0, r0 C illegal instruction 116 ;; 117.LASSERTok`'ASSERT_label_counter: 118define(`ASSERT_label_counter',eval(ASSERT_label_counter+1)) 119') 120')') 121define(`ASSERT_label_counter',1) 122 123 124divert 125