1/* Simulator instruction semantics for m32rbf. 2 3THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5Copyright 1996-2010 Free Software Foundation, Inc. 6 7This file is part of the GNU simulators. 8 9 This file is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License along 20 with this program; if not, write to the Free Software Foundation, Inc., 21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 22 23*/ 24 25#define WANT_CPU m32rbf 26#define WANT_CPU_M32RBF 27 28#include "sim-main.h" 29#include "cgen-mem.h" 30#include "cgen-ops.h" 31 32#undef GET_ATTR 33#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) 34 35/* This is used so that we can compile two copies of the semantic code, 36 one with full feature support and one without that runs fast(er). 37 FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ 38#if FAST_P 39#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) 40#undef TRACE_RESULT 41#define TRACE_RESULT(cpu, abuf, name, type, val) 42#else 43#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) 44#endif 45 46/* x-invalid: --invalid-- */ 47 48static SEM_PC 49SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 50{ 51#define FLD(f) abuf->fields.sfmt_empty.f 52 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 53 int UNUSED written = 0; 54 IADDR UNUSED pc = abuf->addr; 55 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 56 57 { 58 /* Update the recorded pc in the cpu state struct. 59 Only necessary for WITH_SCACHE case, but to avoid the 60 conditional compilation .... */ 61 SET_H_PC (pc); 62 /* Virtual insns have zero size. Overwrite vpc with address of next insn 63 using the default-insn-bitsize spec. When executing insns in parallel 64 we may want to queue the fault and continue execution. */ 65 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 66 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); 67 } 68 69 return vpc; 70#undef FLD 71} 72 73/* x-after: --after-- */ 74 75static SEM_PC 76SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 77{ 78#define FLD(f) abuf->fields.sfmt_empty.f 79 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 80 int UNUSED written = 0; 81 IADDR UNUSED pc = abuf->addr; 82 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 83 84 { 85#if WITH_SCACHE_PBB_M32RBF 86 m32rbf_pbb_after (current_cpu, sem_arg); 87#endif 88 } 89 90 return vpc; 91#undef FLD 92} 93 94/* x-before: --before-- */ 95 96static SEM_PC 97SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 98{ 99#define FLD(f) abuf->fields.sfmt_empty.f 100 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 101 int UNUSED written = 0; 102 IADDR UNUSED pc = abuf->addr; 103 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 104 105 { 106#if WITH_SCACHE_PBB_M32RBF 107 m32rbf_pbb_before (current_cpu, sem_arg); 108#endif 109 } 110 111 return vpc; 112#undef FLD 113} 114 115/* x-cti-chain: --cti-chain-- */ 116 117static SEM_PC 118SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 119{ 120#define FLD(f) abuf->fields.sfmt_empty.f 121 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 122 int UNUSED written = 0; 123 IADDR UNUSED pc = abuf->addr; 124 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 125 126 { 127#if WITH_SCACHE_PBB_M32RBF 128#ifdef DEFINE_SWITCH 129 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, 130 pbb_br_type, pbb_br_npc); 131 BREAK (sem); 132#else 133 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ 134 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, 135 CPU_PBB_BR_TYPE (current_cpu), 136 CPU_PBB_BR_NPC (current_cpu)); 137#endif 138#endif 139 } 140 141 return vpc; 142#undef FLD 143} 144 145/* x-chain: --chain-- */ 146 147static SEM_PC 148SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 149{ 150#define FLD(f) abuf->fields.sfmt_empty.f 151 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 152 int UNUSED written = 0; 153 IADDR UNUSED pc = abuf->addr; 154 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 155 156 { 157#if WITH_SCACHE_PBB_M32RBF 158 vpc = m32rbf_pbb_chain (current_cpu, sem_arg); 159#ifdef DEFINE_SWITCH 160 BREAK (sem); 161#endif 162#endif 163 } 164 165 return vpc; 166#undef FLD 167} 168 169/* x-begin: --begin-- */ 170 171static SEM_PC 172SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 173{ 174#define FLD(f) abuf->fields.sfmt_empty.f 175 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 176 int UNUSED written = 0; 177 IADDR UNUSED pc = abuf->addr; 178 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 179 180 { 181#if WITH_SCACHE_PBB_M32RBF 182#if defined DEFINE_SWITCH || defined FAST_P 183 /* In the switch case FAST_P is a constant, allowing several optimizations 184 in any called inline functions. */ 185 vpc = m32rbf_pbb_begin (current_cpu, FAST_P); 186#else 187#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ 188 vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); 189#else 190 vpc = m32rbf_pbb_begin (current_cpu, 0); 191#endif 192#endif 193#endif 194 } 195 196 return vpc; 197#undef FLD 198} 199 200/* add: add $dr,$sr */ 201 202static SEM_PC 203SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 204{ 205#define FLD(f) abuf->fields.sfmt_add.f 206 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 207 int UNUSED written = 0; 208 IADDR UNUSED pc = abuf->addr; 209 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 210 211 { 212 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); 213 * FLD (i_dr) = opval; 214 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 215 } 216 217 return vpc; 218#undef FLD 219} 220 221/* add3: add3 $dr,$sr,$hash$slo16 */ 222 223static SEM_PC 224SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 225{ 226#define FLD(f) abuf->fields.sfmt_add3.f 227 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 228 int UNUSED written = 0; 229 IADDR UNUSED pc = abuf->addr; 230 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 231 232 { 233 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); 234 * FLD (i_dr) = opval; 235 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 236 } 237 238 return vpc; 239#undef FLD 240} 241 242/* and: and $dr,$sr */ 243 244static SEM_PC 245SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 246{ 247#define FLD(f) abuf->fields.sfmt_add.f 248 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 249 int UNUSED written = 0; 250 IADDR UNUSED pc = abuf->addr; 251 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 252 253 { 254 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); 255 * FLD (i_dr) = opval; 256 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 257 } 258 259 return vpc; 260#undef FLD 261} 262 263/* and3: and3 $dr,$sr,$uimm16 */ 264 265static SEM_PC 266SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 267{ 268#define FLD(f) abuf->fields.sfmt_and3.f 269 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 270 int UNUSED written = 0; 271 IADDR UNUSED pc = abuf->addr; 272 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 273 274 { 275 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); 276 * FLD (i_dr) = opval; 277 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 278 } 279 280 return vpc; 281#undef FLD 282} 283 284/* or: or $dr,$sr */ 285 286static SEM_PC 287SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 288{ 289#define FLD(f) abuf->fields.sfmt_add.f 290 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 291 int UNUSED written = 0; 292 IADDR UNUSED pc = abuf->addr; 293 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 294 295 { 296 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); 297 * FLD (i_dr) = opval; 298 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 299 } 300 301 return vpc; 302#undef FLD 303} 304 305/* or3: or3 $dr,$sr,$hash$ulo16 */ 306 307static SEM_PC 308SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 309{ 310#define FLD(f) abuf->fields.sfmt_and3.f 311 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 312 int UNUSED written = 0; 313 IADDR UNUSED pc = abuf->addr; 314 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 315 316 { 317 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); 318 * FLD (i_dr) = opval; 319 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 320 } 321 322 return vpc; 323#undef FLD 324} 325 326/* xor: xor $dr,$sr */ 327 328static SEM_PC 329SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 330{ 331#define FLD(f) abuf->fields.sfmt_add.f 332 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 333 int UNUSED written = 0; 334 IADDR UNUSED pc = abuf->addr; 335 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 336 337 { 338 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); 339 * FLD (i_dr) = opval; 340 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 341 } 342 343 return vpc; 344#undef FLD 345} 346 347/* xor3: xor3 $dr,$sr,$uimm16 */ 348 349static SEM_PC 350SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 351{ 352#define FLD(f) abuf->fields.sfmt_and3.f 353 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 354 int UNUSED written = 0; 355 IADDR UNUSED pc = abuf->addr; 356 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 357 358 { 359 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); 360 * FLD (i_dr) = opval; 361 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 362 } 363 364 return vpc; 365#undef FLD 366} 367 368/* addi: addi $dr,$simm8 */ 369 370static SEM_PC 371SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 372{ 373#define FLD(f) abuf->fields.sfmt_addi.f 374 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 375 int UNUSED written = 0; 376 IADDR UNUSED pc = abuf->addr; 377 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 378 379 { 380 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); 381 * FLD (i_dr) = opval; 382 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 383 } 384 385 return vpc; 386#undef FLD 387} 388 389/* addv: addv $dr,$sr */ 390 391static SEM_PC 392SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 393{ 394#define FLD(f) abuf->fields.sfmt_add.f 395 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 396 int UNUSED written = 0; 397 IADDR UNUSED pc = abuf->addr; 398 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 399 400{ 401 SI temp0;BI temp1; 402 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); 403 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); 404 { 405 SI opval = temp0; 406 * FLD (i_dr) = opval; 407 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 408 } 409 { 410 BI opval = temp1; 411 CPU (h_cond) = opval; 412 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 413 } 414} 415 416 return vpc; 417#undef FLD 418} 419 420/* addv3: addv3 $dr,$sr,$simm16 */ 421 422static SEM_PC 423SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 424{ 425#define FLD(f) abuf->fields.sfmt_add3.f 426 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 427 int UNUSED written = 0; 428 IADDR UNUSED pc = abuf->addr; 429 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 430 431{ 432 SI temp0;BI temp1; 433 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); 434 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); 435 { 436 SI opval = temp0; 437 * FLD (i_dr) = opval; 438 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 439 } 440 { 441 BI opval = temp1; 442 CPU (h_cond) = opval; 443 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 444 } 445} 446 447 return vpc; 448#undef FLD 449} 450 451/* addx: addx $dr,$sr */ 452 453static SEM_PC 454SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 455{ 456#define FLD(f) abuf->fields.sfmt_add.f 457 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 458 int UNUSED written = 0; 459 IADDR UNUSED pc = abuf->addr; 460 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 461 462{ 463 SI temp0;BI temp1; 464 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 465 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 466 { 467 SI opval = temp0; 468 * FLD (i_dr) = opval; 469 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 470 } 471 { 472 BI opval = temp1; 473 CPU (h_cond) = opval; 474 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 475 } 476} 477 478 return vpc; 479#undef FLD 480} 481 482/* bc8: bc.s $disp8 */ 483 484static SEM_PC 485SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 486{ 487#define FLD(f) abuf->fields.sfmt_bl8.f 488 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 489 int UNUSED written = 0; 490 IADDR UNUSED pc = abuf->addr; 491 SEM_BRANCH_INIT 492 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 493 494if (CPU (h_cond)) { 495 { 496 USI opval = FLD (i_disp8); 497 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 498 written |= (1 << 2); 499 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 500 } 501} 502 503 abuf->written = written; 504 SEM_BRANCH_FINI (vpc); 505 return vpc; 506#undef FLD 507} 508 509/* bc24: bc.l $disp24 */ 510 511static SEM_PC 512SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 513{ 514#define FLD(f) abuf->fields.sfmt_bl24.f 515 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 516 int UNUSED written = 0; 517 IADDR UNUSED pc = abuf->addr; 518 SEM_BRANCH_INIT 519 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 520 521if (CPU (h_cond)) { 522 { 523 USI opval = FLD (i_disp24); 524 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 525 written |= (1 << 2); 526 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 527 } 528} 529 530 abuf->written = written; 531 SEM_BRANCH_FINI (vpc); 532 return vpc; 533#undef FLD 534} 535 536/* beq: beq $src1,$src2,$disp16 */ 537 538static SEM_PC 539SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 540{ 541#define FLD(f) abuf->fields.sfmt_beq.f 542 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 543 int UNUSED written = 0; 544 IADDR UNUSED pc = abuf->addr; 545 SEM_BRANCH_INIT 546 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 547 548if (EQSI (* FLD (i_src1), * FLD (i_src2))) { 549 { 550 USI opval = FLD (i_disp16); 551 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 552 written |= (1 << 3); 553 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 554 } 555} 556 557 abuf->written = written; 558 SEM_BRANCH_FINI (vpc); 559 return vpc; 560#undef FLD 561} 562 563/* beqz: beqz $src2,$disp16 */ 564 565static SEM_PC 566SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 567{ 568#define FLD(f) abuf->fields.sfmt_beq.f 569 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 570 int UNUSED written = 0; 571 IADDR UNUSED pc = abuf->addr; 572 SEM_BRANCH_INIT 573 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 574 575if (EQSI (* FLD (i_src2), 0)) { 576 { 577 USI opval = FLD (i_disp16); 578 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 579 written |= (1 << 2); 580 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 581 } 582} 583 584 abuf->written = written; 585 SEM_BRANCH_FINI (vpc); 586 return vpc; 587#undef FLD 588} 589 590/* bgez: bgez $src2,$disp16 */ 591 592static SEM_PC 593SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 594{ 595#define FLD(f) abuf->fields.sfmt_beq.f 596 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 597 int UNUSED written = 0; 598 IADDR UNUSED pc = abuf->addr; 599 SEM_BRANCH_INIT 600 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 601 602if (GESI (* FLD (i_src2), 0)) { 603 { 604 USI opval = FLD (i_disp16); 605 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 606 written |= (1 << 2); 607 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 608 } 609} 610 611 abuf->written = written; 612 SEM_BRANCH_FINI (vpc); 613 return vpc; 614#undef FLD 615} 616 617/* bgtz: bgtz $src2,$disp16 */ 618 619static SEM_PC 620SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 621{ 622#define FLD(f) abuf->fields.sfmt_beq.f 623 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 624 int UNUSED written = 0; 625 IADDR UNUSED pc = abuf->addr; 626 SEM_BRANCH_INIT 627 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 628 629if (GTSI (* FLD (i_src2), 0)) { 630 { 631 USI opval = FLD (i_disp16); 632 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 633 written |= (1 << 2); 634 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 635 } 636} 637 638 abuf->written = written; 639 SEM_BRANCH_FINI (vpc); 640 return vpc; 641#undef FLD 642} 643 644/* blez: blez $src2,$disp16 */ 645 646static SEM_PC 647SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 648{ 649#define FLD(f) abuf->fields.sfmt_beq.f 650 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 651 int UNUSED written = 0; 652 IADDR UNUSED pc = abuf->addr; 653 SEM_BRANCH_INIT 654 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 655 656if (LESI (* FLD (i_src2), 0)) { 657 { 658 USI opval = FLD (i_disp16); 659 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 660 written |= (1 << 2); 661 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 662 } 663} 664 665 abuf->written = written; 666 SEM_BRANCH_FINI (vpc); 667 return vpc; 668#undef FLD 669} 670 671/* bltz: bltz $src2,$disp16 */ 672 673static SEM_PC 674SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 675{ 676#define FLD(f) abuf->fields.sfmt_beq.f 677 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 678 int UNUSED written = 0; 679 IADDR UNUSED pc = abuf->addr; 680 SEM_BRANCH_INIT 681 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 682 683if (LTSI (* FLD (i_src2), 0)) { 684 { 685 USI opval = FLD (i_disp16); 686 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 687 written |= (1 << 2); 688 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 689 } 690} 691 692 abuf->written = written; 693 SEM_BRANCH_FINI (vpc); 694 return vpc; 695#undef FLD 696} 697 698/* bnez: bnez $src2,$disp16 */ 699 700static SEM_PC 701SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 702{ 703#define FLD(f) abuf->fields.sfmt_beq.f 704 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 705 int UNUSED written = 0; 706 IADDR UNUSED pc = abuf->addr; 707 SEM_BRANCH_INIT 708 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 709 710if (NESI (* FLD (i_src2), 0)) { 711 { 712 USI opval = FLD (i_disp16); 713 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 714 written |= (1 << 2); 715 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 716 } 717} 718 719 abuf->written = written; 720 SEM_BRANCH_FINI (vpc); 721 return vpc; 722#undef FLD 723} 724 725/* bl8: bl.s $disp8 */ 726 727static SEM_PC 728SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 729{ 730#define FLD(f) abuf->fields.sfmt_bl8.f 731 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 732 int UNUSED written = 0; 733 IADDR UNUSED pc = abuf->addr; 734 SEM_BRANCH_INIT 735 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 736 737{ 738 { 739 SI opval = ADDSI (ANDSI (pc, -4), 4); 740 CPU (h_gr[((UINT) 14)]) = opval; 741 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 742 } 743 { 744 USI opval = FLD (i_disp8); 745 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 746 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 747 } 748} 749 750 SEM_BRANCH_FINI (vpc); 751 return vpc; 752#undef FLD 753} 754 755/* bl24: bl.l $disp24 */ 756 757static SEM_PC 758SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 759{ 760#define FLD(f) abuf->fields.sfmt_bl24.f 761 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 762 int UNUSED written = 0; 763 IADDR UNUSED pc = abuf->addr; 764 SEM_BRANCH_INIT 765 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 766 767{ 768 { 769 SI opval = ADDSI (pc, 4); 770 CPU (h_gr[((UINT) 14)]) = opval; 771 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 772 } 773 { 774 USI opval = FLD (i_disp24); 775 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 776 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 777 } 778} 779 780 SEM_BRANCH_FINI (vpc); 781 return vpc; 782#undef FLD 783} 784 785/* bnc8: bnc.s $disp8 */ 786 787static SEM_PC 788SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 789{ 790#define FLD(f) abuf->fields.sfmt_bl8.f 791 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 792 int UNUSED written = 0; 793 IADDR UNUSED pc = abuf->addr; 794 SEM_BRANCH_INIT 795 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 796 797if (NOTBI (CPU (h_cond))) { 798 { 799 USI opval = FLD (i_disp8); 800 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 801 written |= (1 << 2); 802 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 803 } 804} 805 806 abuf->written = written; 807 SEM_BRANCH_FINI (vpc); 808 return vpc; 809#undef FLD 810} 811 812/* bnc24: bnc.l $disp24 */ 813 814static SEM_PC 815SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 816{ 817#define FLD(f) abuf->fields.sfmt_bl24.f 818 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 819 int UNUSED written = 0; 820 IADDR UNUSED pc = abuf->addr; 821 SEM_BRANCH_INIT 822 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 823 824if (NOTBI (CPU (h_cond))) { 825 { 826 USI opval = FLD (i_disp24); 827 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 828 written |= (1 << 2); 829 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 830 } 831} 832 833 abuf->written = written; 834 SEM_BRANCH_FINI (vpc); 835 return vpc; 836#undef FLD 837} 838 839/* bne: bne $src1,$src2,$disp16 */ 840 841static SEM_PC 842SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 843{ 844#define FLD(f) abuf->fields.sfmt_beq.f 845 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 846 int UNUSED written = 0; 847 IADDR UNUSED pc = abuf->addr; 848 SEM_BRANCH_INIT 849 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 850 851if (NESI (* FLD (i_src1), * FLD (i_src2))) { 852 { 853 USI opval = FLD (i_disp16); 854 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 855 written |= (1 << 3); 856 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 857 } 858} 859 860 abuf->written = written; 861 SEM_BRANCH_FINI (vpc); 862 return vpc; 863#undef FLD 864} 865 866/* bra8: bra.s $disp8 */ 867 868static SEM_PC 869SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 870{ 871#define FLD(f) abuf->fields.sfmt_bl8.f 872 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 873 int UNUSED written = 0; 874 IADDR UNUSED pc = abuf->addr; 875 SEM_BRANCH_INIT 876 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 877 878 { 879 USI opval = FLD (i_disp8); 880 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 881 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 882 } 883 884 SEM_BRANCH_FINI (vpc); 885 return vpc; 886#undef FLD 887} 888 889/* bra24: bra.l $disp24 */ 890 891static SEM_PC 892SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 893{ 894#define FLD(f) abuf->fields.sfmt_bl24.f 895 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 896 int UNUSED written = 0; 897 IADDR UNUSED pc = abuf->addr; 898 SEM_BRANCH_INIT 899 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 900 901 { 902 USI opval = FLD (i_disp24); 903 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 904 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 905 } 906 907 SEM_BRANCH_FINI (vpc); 908 return vpc; 909#undef FLD 910} 911 912/* cmp: cmp $src1,$src2 */ 913 914static SEM_PC 915SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 916{ 917#define FLD(f) abuf->fields.sfmt_st_plus.f 918 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 919 int UNUSED written = 0; 920 IADDR UNUSED pc = abuf->addr; 921 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 922 923 { 924 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); 925 CPU (h_cond) = opval; 926 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 927 } 928 929 return vpc; 930#undef FLD 931} 932 933/* cmpi: cmpi $src2,$simm16 */ 934 935static SEM_PC 936SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 937{ 938#define FLD(f) abuf->fields.sfmt_st_d.f 939 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 940 int UNUSED written = 0; 941 IADDR UNUSED pc = abuf->addr; 942 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 943 944 { 945 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); 946 CPU (h_cond) = opval; 947 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 948 } 949 950 return vpc; 951#undef FLD 952} 953 954/* cmpu: cmpu $src1,$src2 */ 955 956static SEM_PC 957SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 958{ 959#define FLD(f) abuf->fields.sfmt_st_plus.f 960 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 961 int UNUSED written = 0; 962 IADDR UNUSED pc = abuf->addr; 963 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 964 965 { 966 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); 967 CPU (h_cond) = opval; 968 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 969 } 970 971 return vpc; 972#undef FLD 973} 974 975/* cmpui: cmpui $src2,$simm16 */ 976 977static SEM_PC 978SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 979{ 980#define FLD(f) abuf->fields.sfmt_st_d.f 981 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 982 int UNUSED written = 0; 983 IADDR UNUSED pc = abuf->addr; 984 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 985 986 { 987 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); 988 CPU (h_cond) = opval; 989 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 990 } 991 992 return vpc; 993#undef FLD 994} 995 996/* div: div $dr,$sr */ 997 998static SEM_PC 999SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1000{ 1001#define FLD(f) abuf->fields.sfmt_add.f 1002 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1003 int UNUSED written = 0; 1004 IADDR UNUSED pc = abuf->addr; 1005 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1006 1007if (NESI (* FLD (i_sr), 0)) { 1008 { 1009 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); 1010 * FLD (i_dr) = opval; 1011 written |= (1 << 2); 1012 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1013 } 1014} 1015 1016 abuf->written = written; 1017 return vpc; 1018#undef FLD 1019} 1020 1021/* divu: divu $dr,$sr */ 1022 1023static SEM_PC 1024SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1025{ 1026#define FLD(f) abuf->fields.sfmt_add.f 1027 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1028 int UNUSED written = 0; 1029 IADDR UNUSED pc = abuf->addr; 1030 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1031 1032if (NESI (* FLD (i_sr), 0)) { 1033 { 1034 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); 1035 * FLD (i_dr) = opval; 1036 written |= (1 << 2); 1037 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1038 } 1039} 1040 1041 abuf->written = written; 1042 return vpc; 1043#undef FLD 1044} 1045 1046/* rem: rem $dr,$sr */ 1047 1048static SEM_PC 1049SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1050{ 1051#define FLD(f) abuf->fields.sfmt_add.f 1052 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1053 int UNUSED written = 0; 1054 IADDR UNUSED pc = abuf->addr; 1055 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1056 1057if (NESI (* FLD (i_sr), 0)) { 1058 { 1059 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); 1060 * FLD (i_dr) = opval; 1061 written |= (1 << 2); 1062 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1063 } 1064} 1065 1066 abuf->written = written; 1067 return vpc; 1068#undef FLD 1069} 1070 1071/* remu: remu $dr,$sr */ 1072 1073static SEM_PC 1074SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1075{ 1076#define FLD(f) abuf->fields.sfmt_add.f 1077 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1078 int UNUSED written = 0; 1079 IADDR UNUSED pc = abuf->addr; 1080 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1081 1082if (NESI (* FLD (i_sr), 0)) { 1083 { 1084 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); 1085 * FLD (i_dr) = opval; 1086 written |= (1 << 2); 1087 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1088 } 1089} 1090 1091 abuf->written = written; 1092 return vpc; 1093#undef FLD 1094} 1095 1096/* jl: jl $sr */ 1097 1098static SEM_PC 1099SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1100{ 1101#define FLD(f) abuf->fields.sfmt_jl.f 1102 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1103 int UNUSED written = 0; 1104 IADDR UNUSED pc = abuf->addr; 1105 SEM_BRANCH_INIT 1106 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1107 1108{ 1109 SI temp0;USI temp1; 1110 temp0 = ADDSI (ANDSI (pc, -4), 4); 1111 temp1 = ANDSI (* FLD (i_sr), -4); 1112 { 1113 SI opval = temp0; 1114 CPU (h_gr[((UINT) 14)]) = opval; 1115 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1116 } 1117 { 1118 USI opval = temp1; 1119 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1120 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1121 } 1122} 1123 1124 SEM_BRANCH_FINI (vpc); 1125 return vpc; 1126#undef FLD 1127} 1128 1129/* jmp: jmp $sr */ 1130 1131static SEM_PC 1132SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1133{ 1134#define FLD(f) abuf->fields.sfmt_jl.f 1135 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1136 int UNUSED written = 0; 1137 IADDR UNUSED pc = abuf->addr; 1138 SEM_BRANCH_INIT 1139 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1140 1141 { 1142 USI opval = ANDSI (* FLD (i_sr), -4); 1143 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1144 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1145 } 1146 1147 SEM_BRANCH_FINI (vpc); 1148 return vpc; 1149#undef FLD 1150} 1151 1152/* ld: ld $dr,@$sr */ 1153 1154static SEM_PC 1155SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1156{ 1157#define FLD(f) abuf->fields.sfmt_ld_plus.f 1158 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1159 int UNUSED written = 0; 1160 IADDR UNUSED pc = abuf->addr; 1161 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1162 1163 { 1164 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1165 * FLD (i_dr) = opval; 1166 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1167 } 1168 1169 return vpc; 1170#undef FLD 1171} 1172 1173/* ld-d: ld $dr,@($slo16,$sr) */ 1174 1175static SEM_PC 1176SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1177{ 1178#define FLD(f) abuf->fields.sfmt_add3.f 1179 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1180 int UNUSED written = 0; 1181 IADDR UNUSED pc = abuf->addr; 1182 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1183 1184 { 1185 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))); 1186 * FLD (i_dr) = opval; 1187 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1188 } 1189 1190 return vpc; 1191#undef FLD 1192} 1193 1194/* ldb: ldb $dr,@$sr */ 1195 1196static SEM_PC 1197SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1198{ 1199#define FLD(f) abuf->fields.sfmt_ld_plus.f 1200 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1201 int UNUSED written = 0; 1202 IADDR UNUSED pc = abuf->addr; 1203 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1204 1205 { 1206 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1207 * FLD (i_dr) = opval; 1208 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1209 } 1210 1211 return vpc; 1212#undef FLD 1213} 1214 1215/* ldb-d: ldb $dr,@($slo16,$sr) */ 1216 1217static SEM_PC 1218SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1219{ 1220#define FLD(f) abuf->fields.sfmt_add3.f 1221 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1222 int UNUSED written = 0; 1223 IADDR UNUSED pc = abuf->addr; 1224 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1225 1226 { 1227 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1228 * FLD (i_dr) = opval; 1229 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1230 } 1231 1232 return vpc; 1233#undef FLD 1234} 1235 1236/* ldh: ldh $dr,@$sr */ 1237 1238static SEM_PC 1239SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1240{ 1241#define FLD(f) abuf->fields.sfmt_ld_plus.f 1242 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1243 int UNUSED written = 0; 1244 IADDR UNUSED pc = abuf->addr; 1245 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1246 1247 { 1248 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1249 * FLD (i_dr) = opval; 1250 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1251 } 1252 1253 return vpc; 1254#undef FLD 1255} 1256 1257/* ldh-d: ldh $dr,@($slo16,$sr) */ 1258 1259static SEM_PC 1260SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1261{ 1262#define FLD(f) abuf->fields.sfmt_add3.f 1263 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1264 int UNUSED written = 0; 1265 IADDR UNUSED pc = abuf->addr; 1266 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1267 1268 { 1269 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1270 * FLD (i_dr) = opval; 1271 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1272 } 1273 1274 return vpc; 1275#undef FLD 1276} 1277 1278/* ldub: ldub $dr,@$sr */ 1279 1280static SEM_PC 1281SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1282{ 1283#define FLD(f) abuf->fields.sfmt_ld_plus.f 1284 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1285 int UNUSED written = 0; 1286 IADDR UNUSED pc = abuf->addr; 1287 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1288 1289 { 1290 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1291 * FLD (i_dr) = opval; 1292 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1293 } 1294 1295 return vpc; 1296#undef FLD 1297} 1298 1299/* ldub-d: ldub $dr,@($slo16,$sr) */ 1300 1301static SEM_PC 1302SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1303{ 1304#define FLD(f) abuf->fields.sfmt_add3.f 1305 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1306 int UNUSED written = 0; 1307 IADDR UNUSED pc = abuf->addr; 1308 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1309 1310 { 1311 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1312 * FLD (i_dr) = opval; 1313 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1314 } 1315 1316 return vpc; 1317#undef FLD 1318} 1319 1320/* lduh: lduh $dr,@$sr */ 1321 1322static SEM_PC 1323SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1324{ 1325#define FLD(f) abuf->fields.sfmt_ld_plus.f 1326 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1327 int UNUSED written = 0; 1328 IADDR UNUSED pc = abuf->addr; 1329 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1330 1331 { 1332 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1333 * FLD (i_dr) = opval; 1334 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1335 } 1336 1337 return vpc; 1338#undef FLD 1339} 1340 1341/* lduh-d: lduh $dr,@($slo16,$sr) */ 1342 1343static SEM_PC 1344SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1345{ 1346#define FLD(f) abuf->fields.sfmt_add3.f 1347 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1348 int UNUSED written = 0; 1349 IADDR UNUSED pc = abuf->addr; 1350 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1351 1352 { 1353 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1354 * FLD (i_dr) = opval; 1355 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1356 } 1357 1358 return vpc; 1359#undef FLD 1360} 1361 1362/* ld-plus: ld $dr,@$sr+ */ 1363 1364static SEM_PC 1365SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1366{ 1367#define FLD(f) abuf->fields.sfmt_ld_plus.f 1368 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1369 int UNUSED written = 0; 1370 IADDR UNUSED pc = abuf->addr; 1371 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1372 1373{ 1374 SI temp0;SI temp1; 1375 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1376 temp1 = ADDSI (* FLD (i_sr), 4); 1377 { 1378 SI opval = temp0; 1379 * FLD (i_dr) = opval; 1380 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1381 } 1382 { 1383 SI opval = temp1; 1384 * FLD (i_sr) = opval; 1385 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1386 } 1387} 1388 1389 return vpc; 1390#undef FLD 1391} 1392 1393/* ld24: ld24 $dr,$uimm24 */ 1394 1395static SEM_PC 1396SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1397{ 1398#define FLD(f) abuf->fields.sfmt_ld24.f 1399 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1400 int UNUSED written = 0; 1401 IADDR UNUSED pc = abuf->addr; 1402 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1403 1404 { 1405 SI opval = FLD (i_uimm24); 1406 * FLD (i_dr) = opval; 1407 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1408 } 1409 1410 return vpc; 1411#undef FLD 1412} 1413 1414/* ldi8: ldi8 $dr,$simm8 */ 1415 1416static SEM_PC 1417SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1418{ 1419#define FLD(f) abuf->fields.sfmt_addi.f 1420 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1421 int UNUSED written = 0; 1422 IADDR UNUSED pc = abuf->addr; 1423 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1424 1425 { 1426 SI opval = FLD (f_simm8); 1427 * FLD (i_dr) = opval; 1428 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1429 } 1430 1431 return vpc; 1432#undef FLD 1433} 1434 1435/* ldi16: ldi16 $dr,$hash$slo16 */ 1436 1437static SEM_PC 1438SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1439{ 1440#define FLD(f) abuf->fields.sfmt_add3.f 1441 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1442 int UNUSED written = 0; 1443 IADDR UNUSED pc = abuf->addr; 1444 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1445 1446 { 1447 SI opval = FLD (f_simm16); 1448 * FLD (i_dr) = opval; 1449 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1450 } 1451 1452 return vpc; 1453#undef FLD 1454} 1455 1456/* lock: lock $dr,@$sr */ 1457 1458static SEM_PC 1459SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1460{ 1461#define FLD(f) abuf->fields.sfmt_ld_plus.f 1462 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1463 int UNUSED written = 0; 1464 IADDR UNUSED pc = abuf->addr; 1465 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1466 1467{ 1468 { 1469 BI opval = 1; 1470 CPU (h_lock) = opval; 1471 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 1472 } 1473 { 1474 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1475 * FLD (i_dr) = opval; 1476 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1477 } 1478} 1479 1480 return vpc; 1481#undef FLD 1482} 1483 1484/* machi: machi $src1,$src2 */ 1485 1486static SEM_PC 1487SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1488{ 1489#define FLD(f) abuf->fields.sfmt_st_plus.f 1490 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1491 int UNUSED written = 0; 1492 IADDR UNUSED pc = abuf->addr; 1493 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1494 1495 { 1496 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 1497 SET_H_ACCUM (opval); 1498 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1499 } 1500 1501 return vpc; 1502#undef FLD 1503} 1504 1505/* maclo: maclo $src1,$src2 */ 1506 1507static SEM_PC 1508SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1509{ 1510#define FLD(f) abuf->fields.sfmt_st_plus.f 1511 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1512 int UNUSED written = 0; 1513 IADDR UNUSED pc = abuf->addr; 1514 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1515 1516 { 1517 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 1518 SET_H_ACCUM (opval); 1519 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1520 } 1521 1522 return vpc; 1523#undef FLD 1524} 1525 1526/* macwhi: macwhi $src1,$src2 */ 1527 1528static SEM_PC 1529SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1530{ 1531#define FLD(f) abuf->fields.sfmt_st_plus.f 1532 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1533 int UNUSED written = 0; 1534 IADDR UNUSED pc = abuf->addr; 1535 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1536 1537 { 1538 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 1539 SET_H_ACCUM (opval); 1540 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1541 } 1542 1543 return vpc; 1544#undef FLD 1545} 1546 1547/* macwlo: macwlo $src1,$src2 */ 1548 1549static SEM_PC 1550SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1551{ 1552#define FLD(f) abuf->fields.sfmt_st_plus.f 1553 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1554 int UNUSED written = 0; 1555 IADDR UNUSED pc = abuf->addr; 1556 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1557 1558 { 1559 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 1560 SET_H_ACCUM (opval); 1561 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1562 } 1563 1564 return vpc; 1565#undef FLD 1566} 1567 1568/* mul: mul $dr,$sr */ 1569 1570static SEM_PC 1571SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1572{ 1573#define FLD(f) abuf->fields.sfmt_add.f 1574 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1575 int UNUSED written = 0; 1576 IADDR UNUSED pc = abuf->addr; 1577 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1578 1579 { 1580 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); 1581 * FLD (i_dr) = opval; 1582 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1583 } 1584 1585 return vpc; 1586#undef FLD 1587} 1588 1589/* mulhi: mulhi $src1,$src2 */ 1590 1591static SEM_PC 1592SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1593{ 1594#define FLD(f) abuf->fields.sfmt_st_plus.f 1595 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1596 int UNUSED written = 0; 1597 IADDR UNUSED pc = abuf->addr; 1598 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1599 1600 { 1601 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); 1602 SET_H_ACCUM (opval); 1603 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1604 } 1605 1606 return vpc; 1607#undef FLD 1608} 1609 1610/* mullo: mullo $src1,$src2 */ 1611 1612static SEM_PC 1613SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1614{ 1615#define FLD(f) abuf->fields.sfmt_st_plus.f 1616 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1617 int UNUSED written = 0; 1618 IADDR UNUSED pc = abuf->addr; 1619 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1620 1621 { 1622 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); 1623 SET_H_ACCUM (opval); 1624 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1625 } 1626 1627 return vpc; 1628#undef FLD 1629} 1630 1631/* mulwhi: mulwhi $src1,$src2 */ 1632 1633static SEM_PC 1634SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1635{ 1636#define FLD(f) abuf->fields.sfmt_st_plus.f 1637 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1638 int UNUSED written = 0; 1639 IADDR UNUSED pc = abuf->addr; 1640 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1641 1642 { 1643 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8); 1644 SET_H_ACCUM (opval); 1645 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1646 } 1647 1648 return vpc; 1649#undef FLD 1650} 1651 1652/* mulwlo: mulwlo $src1,$src2 */ 1653 1654static SEM_PC 1655SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1656{ 1657#define FLD(f) abuf->fields.sfmt_st_plus.f 1658 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1659 int UNUSED written = 0; 1660 IADDR UNUSED pc = abuf->addr; 1661 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1662 1663 { 1664 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8); 1665 SET_H_ACCUM (opval); 1666 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1667 } 1668 1669 return vpc; 1670#undef FLD 1671} 1672 1673/* mv: mv $dr,$sr */ 1674 1675static SEM_PC 1676SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1677{ 1678#define FLD(f) abuf->fields.sfmt_ld_plus.f 1679 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1680 int UNUSED written = 0; 1681 IADDR UNUSED pc = abuf->addr; 1682 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1683 1684 { 1685 SI opval = * FLD (i_sr); 1686 * FLD (i_dr) = opval; 1687 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1688 } 1689 1690 return vpc; 1691#undef FLD 1692} 1693 1694/* mvfachi: mvfachi $dr */ 1695 1696static SEM_PC 1697SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1698{ 1699#define FLD(f) abuf->fields.sfmt_seth.f 1700 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1701 int UNUSED written = 0; 1702 IADDR UNUSED pc = abuf->addr; 1703 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1704 1705 { 1706 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32)); 1707 * FLD (i_dr) = opval; 1708 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1709 } 1710 1711 return vpc; 1712#undef FLD 1713} 1714 1715/* mvfaclo: mvfaclo $dr */ 1716 1717static SEM_PC 1718SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1719{ 1720#define FLD(f) abuf->fields.sfmt_seth.f 1721 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1722 int UNUSED written = 0; 1723 IADDR UNUSED pc = abuf->addr; 1724 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1725 1726 { 1727 SI opval = TRUNCDISI (GET_H_ACCUM ()); 1728 * FLD (i_dr) = opval; 1729 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1730 } 1731 1732 return vpc; 1733#undef FLD 1734} 1735 1736/* mvfacmi: mvfacmi $dr */ 1737 1738static SEM_PC 1739SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1740{ 1741#define FLD(f) abuf->fields.sfmt_seth.f 1742 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1743 int UNUSED written = 0; 1744 IADDR UNUSED pc = abuf->addr; 1745 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1746 1747 { 1748 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16)); 1749 * FLD (i_dr) = opval; 1750 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1751 } 1752 1753 return vpc; 1754#undef FLD 1755} 1756 1757/* mvfc: mvfc $dr,$scr */ 1758 1759static SEM_PC 1760SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1761{ 1762#define FLD(f) abuf->fields.sfmt_ld_plus.f 1763 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1764 int UNUSED written = 0; 1765 IADDR UNUSED pc = abuf->addr; 1766 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1767 1768 { 1769 SI opval = GET_H_CR (FLD (f_r2)); 1770 * FLD (i_dr) = opval; 1771 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1772 } 1773 1774 return vpc; 1775#undef FLD 1776} 1777 1778/* mvtachi: mvtachi $src1 */ 1779 1780static SEM_PC 1781SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1782{ 1783#define FLD(f) abuf->fields.sfmt_st_plus.f 1784 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1785 int UNUSED written = 0; 1786 IADDR UNUSED pc = abuf->addr; 1787 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1788 1789 { 1790 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); 1791 SET_H_ACCUM (opval); 1792 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1793 } 1794 1795 return vpc; 1796#undef FLD 1797} 1798 1799/* mvtaclo: mvtaclo $src1 */ 1800 1801static SEM_PC 1802SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1803{ 1804#define FLD(f) abuf->fields.sfmt_st_plus.f 1805 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1806 int UNUSED written = 0; 1807 IADDR UNUSED pc = abuf->addr; 1808 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1809 1810 { 1811 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); 1812 SET_H_ACCUM (opval); 1813 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1814 } 1815 1816 return vpc; 1817#undef FLD 1818} 1819 1820/* mvtc: mvtc $sr,$dcr */ 1821 1822static SEM_PC 1823SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1824{ 1825#define FLD(f) abuf->fields.sfmt_ld_plus.f 1826 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1827 int UNUSED written = 0; 1828 IADDR UNUSED pc = abuf->addr; 1829 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1830 1831 { 1832 USI opval = * FLD (i_sr); 1833 SET_H_CR (FLD (f_r1), opval); 1834 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 1835 } 1836 1837 return vpc; 1838#undef FLD 1839} 1840 1841/* neg: neg $dr,$sr */ 1842 1843static SEM_PC 1844SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1845{ 1846#define FLD(f) abuf->fields.sfmt_ld_plus.f 1847 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1848 int UNUSED written = 0; 1849 IADDR UNUSED pc = abuf->addr; 1850 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1851 1852 { 1853 SI opval = NEGSI (* FLD (i_sr)); 1854 * FLD (i_dr) = opval; 1855 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1856 } 1857 1858 return vpc; 1859#undef FLD 1860} 1861 1862/* nop: nop */ 1863 1864static SEM_PC 1865SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1866{ 1867#define FLD(f) abuf->fields.sfmt_empty.f 1868 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1869 int UNUSED written = 0; 1870 IADDR UNUSED pc = abuf->addr; 1871 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1872 1873PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); 1874 1875 return vpc; 1876#undef FLD 1877} 1878 1879/* not: not $dr,$sr */ 1880 1881static SEM_PC 1882SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1883{ 1884#define FLD(f) abuf->fields.sfmt_ld_plus.f 1885 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1886 int UNUSED written = 0; 1887 IADDR UNUSED pc = abuf->addr; 1888 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1889 1890 { 1891 SI opval = INVSI (* FLD (i_sr)); 1892 * FLD (i_dr) = opval; 1893 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1894 } 1895 1896 return vpc; 1897#undef FLD 1898} 1899 1900/* rac: rac */ 1901 1902static SEM_PC 1903SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1904{ 1905#define FLD(f) abuf->fields.sfmt_empty.f 1906 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1907 int UNUSED written = 0; 1908 IADDR UNUSED pc = abuf->addr; 1909 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1910 1911{ 1912 DI tmp_tmp1; 1913 tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1); 1914 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); 1915 { 1916 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); 1917 SET_H_ACCUM (opval); 1918 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1919 } 1920} 1921 1922 return vpc; 1923#undef FLD 1924} 1925 1926/* rach: rach */ 1927 1928static SEM_PC 1929SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1930{ 1931#define FLD(f) abuf->fields.sfmt_empty.f 1932 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1933 int UNUSED written = 0; 1934 IADDR UNUSED pc = abuf->addr; 1935 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1936 1937{ 1938 DI tmp_tmp1; 1939 tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff)); 1940if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) { 1941 tmp_tmp1 = MAKEDI (16383, 0x80000000); 1942} else { 1943if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) { 1944 tmp_tmp1 = MAKEDI (16760832, 0); 1945} else { 1946 tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000)); 1947} 1948} 1949 tmp_tmp1 = SLLDI (tmp_tmp1, 1); 1950 { 1951 DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7); 1952 SET_H_ACCUM (opval); 1953 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1954 } 1955} 1956 1957 return vpc; 1958#undef FLD 1959} 1960 1961/* rte: rte */ 1962 1963static SEM_PC 1964SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1965{ 1966#define FLD(f) abuf->fields.sfmt_empty.f 1967 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1968 int UNUSED written = 0; 1969 IADDR UNUSED pc = abuf->addr; 1970 SEM_BRANCH_INIT 1971 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1972 1973{ 1974 { 1975 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); 1976 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1977 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1978 } 1979 { 1980 USI opval = GET_H_CR (((UINT) 14)); 1981 SET_H_CR (((UINT) 6), opval); 1982 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 1983 } 1984 { 1985 UQI opval = CPU (h_bpsw); 1986 SET_H_PSW (opval); 1987 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 1988 } 1989 { 1990 UQI opval = CPU (h_bbpsw); 1991 CPU (h_bpsw) = opval; 1992 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 1993 } 1994} 1995 1996 SEM_BRANCH_FINI (vpc); 1997 return vpc; 1998#undef FLD 1999} 2000 2001/* seth: seth $dr,$hash$hi16 */ 2002 2003static SEM_PC 2004SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2005{ 2006#define FLD(f) abuf->fields.sfmt_seth.f 2007 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2008 int UNUSED written = 0; 2009 IADDR UNUSED pc = abuf->addr; 2010 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2011 2012 { 2013 SI opval = SLLSI (FLD (f_hi16), 16); 2014 * FLD (i_dr) = opval; 2015 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2016 } 2017 2018 return vpc; 2019#undef FLD 2020} 2021 2022/* sll: sll $dr,$sr */ 2023 2024static SEM_PC 2025SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2026{ 2027#define FLD(f) abuf->fields.sfmt_add.f 2028 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2029 int UNUSED written = 0; 2030 IADDR UNUSED pc = abuf->addr; 2031 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2032 2033 { 2034 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2035 * FLD (i_dr) = opval; 2036 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2037 } 2038 2039 return vpc; 2040#undef FLD 2041} 2042 2043/* sll3: sll3 $dr,$sr,$simm16 */ 2044 2045static SEM_PC 2046SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2047{ 2048#define FLD(f) abuf->fields.sfmt_add3.f 2049 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2050 int UNUSED written = 0; 2051 IADDR UNUSED pc = abuf->addr; 2052 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2053 2054 { 2055 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2056 * FLD (i_dr) = opval; 2057 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2058 } 2059 2060 return vpc; 2061#undef FLD 2062} 2063 2064/* slli: slli $dr,$uimm5 */ 2065 2066static SEM_PC 2067SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2068{ 2069#define FLD(f) abuf->fields.sfmt_slli.f 2070 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2071 int UNUSED written = 0; 2072 IADDR UNUSED pc = abuf->addr; 2073 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2074 2075 { 2076 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); 2077 * FLD (i_dr) = opval; 2078 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2079 } 2080 2081 return vpc; 2082#undef FLD 2083} 2084 2085/* sra: sra $dr,$sr */ 2086 2087static SEM_PC 2088SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2089{ 2090#define FLD(f) abuf->fields.sfmt_add.f 2091 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2092 int UNUSED written = 0; 2093 IADDR UNUSED pc = abuf->addr; 2094 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2095 2096 { 2097 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2098 * FLD (i_dr) = opval; 2099 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2100 } 2101 2102 return vpc; 2103#undef FLD 2104} 2105 2106/* sra3: sra3 $dr,$sr,$simm16 */ 2107 2108static SEM_PC 2109SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2110{ 2111#define FLD(f) abuf->fields.sfmt_add3.f 2112 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2113 int UNUSED written = 0; 2114 IADDR UNUSED pc = abuf->addr; 2115 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2116 2117 { 2118 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2119 * FLD (i_dr) = opval; 2120 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2121 } 2122 2123 return vpc; 2124#undef FLD 2125} 2126 2127/* srai: srai $dr,$uimm5 */ 2128 2129static SEM_PC 2130SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2131{ 2132#define FLD(f) abuf->fields.sfmt_slli.f 2133 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2134 int UNUSED written = 0; 2135 IADDR UNUSED pc = abuf->addr; 2136 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2137 2138 { 2139 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); 2140 * FLD (i_dr) = opval; 2141 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2142 } 2143 2144 return vpc; 2145#undef FLD 2146} 2147 2148/* srl: srl $dr,$sr */ 2149 2150static SEM_PC 2151SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2152{ 2153#define FLD(f) abuf->fields.sfmt_add.f 2154 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2155 int UNUSED written = 0; 2156 IADDR UNUSED pc = abuf->addr; 2157 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2158 2159 { 2160 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2161 * FLD (i_dr) = opval; 2162 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2163 } 2164 2165 return vpc; 2166#undef FLD 2167} 2168 2169/* srl3: srl3 $dr,$sr,$simm16 */ 2170 2171static SEM_PC 2172SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2173{ 2174#define FLD(f) abuf->fields.sfmt_add3.f 2175 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2176 int UNUSED written = 0; 2177 IADDR UNUSED pc = abuf->addr; 2178 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2179 2180 { 2181 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2182 * FLD (i_dr) = opval; 2183 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2184 } 2185 2186 return vpc; 2187#undef FLD 2188} 2189 2190/* srli: srli $dr,$uimm5 */ 2191 2192static SEM_PC 2193SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2194{ 2195#define FLD(f) abuf->fields.sfmt_slli.f 2196 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2197 int UNUSED written = 0; 2198 IADDR UNUSED pc = abuf->addr; 2199 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2200 2201 { 2202 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); 2203 * FLD (i_dr) = opval; 2204 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2205 } 2206 2207 return vpc; 2208#undef FLD 2209} 2210 2211/* st: st $src1,@$src2 */ 2212 2213static SEM_PC 2214SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2215{ 2216#define FLD(f) abuf->fields.sfmt_st_plus.f 2217 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2218 int UNUSED written = 0; 2219 IADDR UNUSED pc = abuf->addr; 2220 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2221 2222 { 2223 SI opval = * FLD (i_src1); 2224 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 2225 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2226 } 2227 2228 return vpc; 2229#undef FLD 2230} 2231 2232/* st-d: st $src1,@($slo16,$src2) */ 2233 2234static SEM_PC 2235SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2236{ 2237#define FLD(f) abuf->fields.sfmt_st_d.f 2238 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2239 int UNUSED written = 0; 2240 IADDR UNUSED pc = abuf->addr; 2241 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2242 2243 { 2244 SI opval = * FLD (i_src1); 2245 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2246 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2247 } 2248 2249 return vpc; 2250#undef FLD 2251} 2252 2253/* stb: stb $src1,@$src2 */ 2254 2255static SEM_PC 2256SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2257{ 2258#define FLD(f) abuf->fields.sfmt_st_plus.f 2259 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2260 int UNUSED written = 0; 2261 IADDR UNUSED pc = abuf->addr; 2262 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2263 2264 { 2265 QI opval = * FLD (i_src1); 2266 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval); 2267 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2268 } 2269 2270 return vpc; 2271#undef FLD 2272} 2273 2274/* stb-d: stb $src1,@($slo16,$src2) */ 2275 2276static SEM_PC 2277SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2278{ 2279#define FLD(f) abuf->fields.sfmt_st_d.f 2280 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2281 int UNUSED written = 0; 2282 IADDR UNUSED pc = abuf->addr; 2283 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2284 2285 { 2286 QI opval = * FLD (i_src1); 2287 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2288 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2289 } 2290 2291 return vpc; 2292#undef FLD 2293} 2294 2295/* sth: sth $src1,@$src2 */ 2296 2297static SEM_PC 2298SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2299{ 2300#define FLD(f) abuf->fields.sfmt_st_plus.f 2301 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2302 int UNUSED written = 0; 2303 IADDR UNUSED pc = abuf->addr; 2304 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2305 2306 { 2307 HI opval = * FLD (i_src1); 2308 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval); 2309 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2310 } 2311 2312 return vpc; 2313#undef FLD 2314} 2315 2316/* sth-d: sth $src1,@($slo16,$src2) */ 2317 2318static SEM_PC 2319SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2320{ 2321#define FLD(f) abuf->fields.sfmt_st_d.f 2322 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2323 int UNUSED written = 0; 2324 IADDR UNUSED pc = abuf->addr; 2325 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2326 2327 { 2328 HI opval = * FLD (i_src1); 2329 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2330 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2331 } 2332 2333 return vpc; 2334#undef FLD 2335} 2336 2337/* st-plus: st $src1,@+$src2 */ 2338 2339static SEM_PC 2340SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2341{ 2342#define FLD(f) abuf->fields.sfmt_st_plus.f 2343 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2344 int UNUSED written = 0; 2345 IADDR UNUSED pc = abuf->addr; 2346 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2347 2348{ 2349 SI tmp_new_src2; 2350 tmp_new_src2 = ADDSI (* FLD (i_src2), 4); 2351 { 2352 SI opval = * FLD (i_src1); 2353 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2354 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2355 } 2356 { 2357 SI opval = tmp_new_src2; 2358 * FLD (i_src2) = opval; 2359 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2360 } 2361} 2362 2363 return vpc; 2364#undef FLD 2365} 2366 2367/* st-minus: st $src1,@-$src2 */ 2368 2369static SEM_PC 2370SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2371{ 2372#define FLD(f) abuf->fields.sfmt_st_plus.f 2373 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2374 int UNUSED written = 0; 2375 IADDR UNUSED pc = abuf->addr; 2376 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2377 2378{ 2379 SI tmp_new_src2; 2380 tmp_new_src2 = SUBSI (* FLD (i_src2), 4); 2381 { 2382 SI opval = * FLD (i_src1); 2383 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2384 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2385 } 2386 { 2387 SI opval = tmp_new_src2; 2388 * FLD (i_src2) = opval; 2389 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2390 } 2391} 2392 2393 return vpc; 2394#undef FLD 2395} 2396 2397/* sub: sub $dr,$sr */ 2398 2399static SEM_PC 2400SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2401{ 2402#define FLD(f) abuf->fields.sfmt_add.f 2403 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2404 int UNUSED written = 0; 2405 IADDR UNUSED pc = abuf->addr; 2406 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2407 2408 { 2409 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); 2410 * FLD (i_dr) = opval; 2411 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2412 } 2413 2414 return vpc; 2415#undef FLD 2416} 2417 2418/* subv: subv $dr,$sr */ 2419 2420static SEM_PC 2421SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2422{ 2423#define FLD(f) abuf->fields.sfmt_add.f 2424 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2425 int UNUSED written = 0; 2426 IADDR UNUSED pc = abuf->addr; 2427 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2428 2429{ 2430 SI temp0;BI temp1; 2431 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); 2432 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); 2433 { 2434 SI opval = temp0; 2435 * FLD (i_dr) = opval; 2436 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2437 } 2438 { 2439 BI opval = temp1; 2440 CPU (h_cond) = opval; 2441 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2442 } 2443} 2444 2445 return vpc; 2446#undef FLD 2447} 2448 2449/* subx: subx $dr,$sr */ 2450 2451static SEM_PC 2452SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2453{ 2454#define FLD(f) abuf->fields.sfmt_add.f 2455 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2456 int UNUSED written = 0; 2457 IADDR UNUSED pc = abuf->addr; 2458 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2459 2460{ 2461 SI temp0;BI temp1; 2462 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 2463 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 2464 { 2465 SI opval = temp0; 2466 * FLD (i_dr) = opval; 2467 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2468 } 2469 { 2470 BI opval = temp1; 2471 CPU (h_cond) = opval; 2472 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2473 } 2474} 2475 2476 return vpc; 2477#undef FLD 2478} 2479 2480/* trap: trap $uimm4 */ 2481 2482static SEM_PC 2483SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2484{ 2485#define FLD(f) abuf->fields.sfmt_trap.f 2486 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2487 int UNUSED written = 0; 2488 IADDR UNUSED pc = abuf->addr; 2489 SEM_BRANCH_INIT 2490 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2491 2492{ 2493 { 2494 USI opval = GET_H_CR (((UINT) 6)); 2495 SET_H_CR (((UINT) 14), opval); 2496 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2497 } 2498 { 2499 USI opval = ADDSI (pc, 4); 2500 SET_H_CR (((UINT) 6), opval); 2501 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2502 } 2503 { 2504 UQI opval = CPU (h_bpsw); 2505 CPU (h_bbpsw) = opval; 2506 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); 2507 } 2508 { 2509 UQI opval = GET_H_PSW (); 2510 CPU (h_bpsw) = opval; 2511 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 2512 } 2513 { 2514 UQI opval = ANDQI (GET_H_PSW (), 128); 2515 SET_H_PSW (opval); 2516 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 2517 } 2518 { 2519 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); 2520 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2521 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 2522 } 2523} 2524 2525 SEM_BRANCH_FINI (vpc); 2526 return vpc; 2527#undef FLD 2528} 2529 2530/* unlock: unlock $src1,@$src2 */ 2531 2532static SEM_PC 2533SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2534{ 2535#define FLD(f) abuf->fields.sfmt_st_plus.f 2536 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2537 int UNUSED written = 0; 2538 IADDR UNUSED pc = abuf->addr; 2539 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2540 2541{ 2542if (CPU (h_lock)) { 2543 { 2544 SI opval = * FLD (i_src1); 2545 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 2546 written |= (1 << 4); 2547 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2548 } 2549} 2550 { 2551 BI opval = 0; 2552 CPU (h_lock) = opval; 2553 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 2554 } 2555} 2556 2557 abuf->written = written; 2558 return vpc; 2559#undef FLD 2560} 2561 2562/* clrpsw: clrpsw $uimm8 */ 2563 2564static SEM_PC 2565SEM_FN_NAME (m32rbf,clrpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2566{ 2567#define FLD(f) abuf->fields.sfmt_clrpsw.f 2568 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2569 int UNUSED written = 0; 2570 IADDR UNUSED pc = abuf->addr; 2571 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2572 2573 { 2574 USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280)); 2575 SET_H_CR (((UINT) 0), opval); 2576 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2577 } 2578 2579 return vpc; 2580#undef FLD 2581} 2582 2583/* setpsw: setpsw $uimm8 */ 2584 2585static SEM_PC 2586SEM_FN_NAME (m32rbf,setpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2587{ 2588#define FLD(f) abuf->fields.sfmt_clrpsw.f 2589 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2590 int UNUSED written = 0; 2591 IADDR UNUSED pc = abuf->addr; 2592 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2593 2594 { 2595 USI opval = FLD (f_uimm8); 2596 SET_H_CR (((UINT) 0), opval); 2597 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2598 } 2599 2600 return vpc; 2601#undef FLD 2602} 2603 2604/* bset: bset $uimm3,@($slo16,$sr) */ 2605 2606static SEM_PC 2607SEM_FN_NAME (m32rbf,bset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2608{ 2609#define FLD(f) abuf->fields.sfmt_bset.f 2610 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2611 int UNUSED written = 0; 2612 IADDR UNUSED pc = abuf->addr; 2613 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2614 2615 { 2616 QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLQI (1, SUBSI (7, FLD (f_uimm3)))); 2617 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 2618 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2619 } 2620 2621 return vpc; 2622#undef FLD 2623} 2624 2625/* bclr: bclr $uimm3,@($slo16,$sr) */ 2626 2627static SEM_PC 2628SEM_FN_NAME (m32rbf,bclr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2629{ 2630#define FLD(f) abuf->fields.sfmt_bset.f 2631 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2632 int UNUSED written = 0; 2633 IADDR UNUSED pc = abuf->addr; 2634 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2635 2636 { 2637 QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLQI (1, SUBSI (7, FLD (f_uimm3))))); 2638 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 2639 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2640 } 2641 2642 return vpc; 2643#undef FLD 2644} 2645 2646/* btst: btst $uimm3,$sr */ 2647 2648static SEM_PC 2649SEM_FN_NAME (m32rbf,btst) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2650{ 2651#define FLD(f) abuf->fields.sfmt_bset.f 2652 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2653 int UNUSED written = 0; 2654 IADDR UNUSED pc = abuf->addr; 2655 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2656 2657 { 2658 BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1); 2659 CPU (h_cond) = opval; 2660 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2661 } 2662 2663 return vpc; 2664#undef FLD 2665} 2666 2667/* Table of all semantic fns. */ 2668 2669static const struct sem_fn_desc sem_fns[] = { 2670 { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) }, 2671 { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) }, 2672 { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) }, 2673 { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) }, 2674 { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) }, 2675 { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) }, 2676 { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) }, 2677 { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) }, 2678 { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) }, 2679 { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) }, 2680 { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) }, 2681 { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) }, 2682 { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) }, 2683 { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) }, 2684 { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) }, 2685 { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) }, 2686 { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) }, 2687 { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) }, 2688 { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) }, 2689 { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) }, 2690 { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) }, 2691 { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) }, 2692 { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) }, 2693 { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) }, 2694 { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) }, 2695 { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) }, 2696 { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) }, 2697 { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) }, 2698 { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) }, 2699 { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) }, 2700 { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) }, 2701 { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) }, 2702 { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) }, 2703 { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) }, 2704 { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) }, 2705 { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) }, 2706 { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) }, 2707 { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) }, 2708 { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) }, 2709 { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) }, 2710 { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) }, 2711 { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) }, 2712 { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) }, 2713 { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) }, 2714 { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) }, 2715 { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) }, 2716 { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) }, 2717 { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) }, 2718 { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) }, 2719 { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) }, 2720 { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) }, 2721 { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) }, 2722 { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) }, 2723 { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) }, 2724 { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) }, 2725 { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) }, 2726 { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) }, 2727 { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) }, 2728 { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) }, 2729 { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) }, 2730 { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) }, 2731 { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) }, 2732 { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) }, 2733 { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) }, 2734 { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) }, 2735 { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) }, 2736 { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) }, 2737 { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) }, 2738 { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) }, 2739 { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) }, 2740 { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) }, 2741 { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) }, 2742 { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) }, 2743 { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) }, 2744 { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) }, 2745 { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) }, 2746 { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) }, 2747 { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) }, 2748 { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) }, 2749 { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) }, 2750 { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) }, 2751 { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) }, 2752 { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) }, 2753 { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) }, 2754 { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) }, 2755 { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) }, 2756 { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) }, 2757 { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) }, 2758 { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) }, 2759 { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) }, 2760 { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) }, 2761 { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) }, 2762 { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) }, 2763 { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) }, 2764 { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) }, 2765 { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) }, 2766 { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) }, 2767 { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) }, 2768 { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) }, 2769 { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) }, 2770 { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) }, 2771 { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) }, 2772 { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) }, 2773 { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) }, 2774 { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) }, 2775 { M32RBF_INSN_CLRPSW, SEM_FN_NAME (m32rbf,clrpsw) }, 2776 { M32RBF_INSN_SETPSW, SEM_FN_NAME (m32rbf,setpsw) }, 2777 { M32RBF_INSN_BSET, SEM_FN_NAME (m32rbf,bset) }, 2778 { M32RBF_INSN_BCLR, SEM_FN_NAME (m32rbf,bclr) }, 2779 { M32RBF_INSN_BTST, SEM_FN_NAME (m32rbf,btst) }, 2780 { 0, 0 } 2781}; 2782 2783/* Add the semantic fns to IDESC_TABLE. */ 2784 2785void 2786SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu) 2787{ 2788 IDESC *idesc_table = CPU_IDESC (current_cpu); 2789 const struct sem_fn_desc *sf; 2790 int mach_num = MACH_NUM (CPU_MACH (current_cpu)); 2791 2792 for (sf = &sem_fns[0]; sf->fn != 0; ++sf) 2793 { 2794 const CGEN_INSN *insn = idesc_table[sf->index].idata; 2795 int valid_p = (CGEN_INSN_VIRTUAL_P (insn) 2796 || CGEN_INSN_MACH_HAS_P (insn, mach_num)); 2797#if FAST_P 2798 if (valid_p) 2799 idesc_table[sf->index].sem_fast = sf->fn; 2800 else 2801 idesc_table[sf->index].sem_fast = SEM_FN_NAME (m32rbf,x_invalid); 2802#else 2803 if (valid_p) 2804 idesc_table[sf->index].sem_full = sf->fn; 2805 else 2806 idesc_table[sf->index].sem_full = SEM_FN_NAME (m32rbf,x_invalid); 2807#endif 2808 } 2809} 2810 2811