1/*
2 * This file is part of SIS.
3 *
4 * ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler,
5 * European Space Agency
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 675
19 * Mass Ave, Cambridge, MA 02139, USA.
20 *
21 */
22
23#include "ansidecl.h"
24#include "gdb/callback.h"
25#include "gdb/remote-sim.h"
26
27#include "end.h"
28
29#define I_ACC_EXC 1
30
31/* Maximum events in event queue */
32#define EVENT_MAX	256
33
34/* Maximum # of floating point queue */
35#define FPUQN	1
36
37/* Maximum # of breakpoints */
38#define BPT_MAX	256
39
40struct histype {
41    unsigned        addr;
42    unsigned        time;
43};
44
45/* type definitions */
46
47typedef short int int16;	/* 16-bit signed int */
48typedef unsigned short int uint16;	/* 16-bit unsigned int */
49typedef int     int32;		/* 32-bit signed int */
50typedef unsigned int uint32;	/* 32-bit unsigned int */
51typedef float   float32;	/* 32-bit float */
52typedef double  float64;	/* 64-bit float */
53
54/* FIXME: what about host compilers that don't support 64-bit ints? */
55typedef unsigned long long uint64; /* 64-bit unsigned int */
56typedef long long int64;	   /* 64-bit signed int */
57
58#define UINT64_MAX 18446744073709551615ULL
59
60struct pstate {
61
62    float64         fd[16];	/* FPU registers */
63#ifdef HOST_LITTLE_ENDIAN_FLOAT
64    float32         fs[32];
65    float32        *fdp;
66#else
67    float32        *fs;
68#endif
69    int32          *fsi;
70    uint32          fsr;
71    int32           fpstate;
72    uint32          fpq[FPUQN * 2];
73    uint32          fpqn;
74    uint32          ftime;
75    uint32          flrd;
76    uint32          frd;
77    uint32          frs1;
78    uint32          frs2;
79    uint32          fpu_pres;	/* FPU present (0 = No, 1 = Yes) */
80
81    uint32          psr;	/* IU registers */
82    uint32          tbr;
83    uint32          wim;
84    uint32          g[8];
85    uint32          r[128];
86    uint32          y;
87    uint32          asr17;      /* Single vector trapping */
88    uint32          pc, npc;
89
90
91    uint32          trap;	/* Current trap type */
92    uint32          annul;	/* Instruction annul */
93    uint32          data;	/* Loaded data	     */
94    uint32          inst;	/* Current instruction */
95    uint32          asi;	/* Current ASI */
96    uint32          err_mode;	/* IU error mode */
97    uint32          breakpoint;
98    uint32          bptnum;
99    uint32          bphit;
100    uint32          bpts[BPT_MAX];	/* Breakpoints */
101
102    uint32          ltime;	/* Load interlock time */
103    uint32          hold;	/* IU hold cycles in current inst */
104    uint32          fhold;	/* FPU hold cycles in current inst */
105    uint32          icnt;	/* Instruction cycles in curr inst */
106
107    uint32          histlen;	/* Trace history management */
108    uint32          histind;
109    struct histype *histbuf;
110    float32         freq;	/* Simulated processor frequency */
111
112
113    uint64          tottime;
114    uint64          ninst;
115    uint64          fholdt;
116    uint64          holdt;
117    uint64          icntt;
118    uint64          finst;
119    uint64          simstart;
120    uint64          starttime;
121    uint64          tlimit;	/* Simulation time limit */
122    uint64          pwdtime;	/* Cycles in power-down mode */
123    uint64          nstore;	/* Number of load instructions */
124    uint64          nload;	/* Number of store instructions */
125    uint64          nannul;	/* Number of annuled instructions */
126    uint64          nbranch;	/* Number of branch instructions */
127    uint32          ildreg;	/* Destination of last load instruction */
128    uint64          ildtime;	/* Last time point for load dependency */
129
130    int             rett_err;	/* IU in jmpl/restore error state (Rev.0) */
131    int             jmpltime;
132};
133
134struct evcell {
135    void            (*cfunc) ();
136    int32           arg;
137    uint64          time;
138    struct evcell  *nxt;
139};
140
141struct estate {
142    struct evcell   eq;
143    struct evcell  *freeq;
144    uint64          simtime;
145};
146
147struct irqcell {
148    void            (*callback) ();
149    int32           arg;
150};
151
152
153#define OK 0
154#define TIME_OUT 1
155#define BPT_HIT 2
156#define ERROR 3
157#define CTRL_C 4
158
159/* Prototypes  */
160
161/* erc32.c */
162extern void	init_sim PARAMS ((void));
163extern void	reset PARAMS ((void));
164extern void	error_mode PARAMS ((uint32 pc));
165extern void	sim_halt PARAMS ((void));
166extern void	exit_sim PARAMS ((void));
167extern void	init_stdio PARAMS ((void));
168extern void	restore_stdio PARAMS ((void));
169extern int	memory_read PARAMS ((int32 asi, uint32 addr, uint32 *data,
170				     int32 sz, int32 *ws));
171extern int	memory_write PARAMS ((int32 asi, uint32 addr, uint32 *data,
172				    int32 sz, int32 *ws));
173extern int	sis_memory_write PARAMS ((uint32 addr,
174				    const unsigned char *data, uint32 length));
175extern int	sis_memory_read PARAMS ((uint32 addr, char *data,
176					 uint32 length));
177
178/* func.c */
179extern void	set_regi PARAMS ((struct pstate *sregs, int32 reg,
180				  uint32 rval));
181extern void	get_regi PARAMS ((struct pstate *sregs, int32 reg, char *buf));
182extern int	exec_cmd PARAMS ((struct pstate *sregs, char *cmd));
183extern void	reset_stat PARAMS ((struct pstate  *sregs));
184extern void	show_stat PARAMS ((struct pstate  *sregs));
185extern void	init_bpt PARAMS ((struct pstate  *sregs));
186extern void	init_signals PARAMS ((void));
187
188struct disassemble_info;
189extern void	dis_mem PARAMS ((uint32 addr, uint32 len,
190				 struct disassemble_info *info));
191extern void	event PARAMS ((void (*cfunc) (), int32 arg, uint64 delta));
192extern void	set_int PARAMS ((int32 level, void (*callback) (), int32 arg));
193extern void	advance_time PARAMS ((struct pstate  *sregs));
194extern uint32	now PARAMS ((void));
195extern int	wait_for_irq PARAMS ((void));
196extern int	check_bpt PARAMS ((struct pstate *sregs));
197extern void	reset_all PARAMS ((void));
198extern void	sys_reset PARAMS ((void));
199extern void	sys_halt PARAMS ((void));
200extern int	bfd_load PARAMS ((char *fname));
201
202/* exec.c */
203extern int	dispatch_instruction PARAMS ((struct pstate *sregs));
204extern int	execute_trap PARAMS ((struct pstate *sregs));
205extern int	check_interrupts PARAMS ((struct pstate  *sregs));
206extern void	init_regs PARAMS ((struct pstate *sregs));
207
208/* interf.c */
209extern int	run_sim PARAMS ((struct pstate *sregs,
210				 uint64 icount, int dis));
211
212/* float.c */
213extern int	get_accex PARAMS ((void));
214extern void	clear_accex PARAMS ((void));
215extern void	set_fsr PARAMS ((uint32 fsr));
216
217/* help.c */
218extern void	usage PARAMS ((void));
219extern void	gen_help PARAMS ((void));
220