1/* Collection of junk for CRIS. 2 Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 3 Free Software Foundation, Inc. 4 Contributed by Axis Communications. 5 6This file is part of the GNU simulators. 7 8This program is free software; you can redistribute it and/or modify 9it under the terms of the GNU General Public License as published by 10the Free Software Foundation; either version 3 of the License, or 11(at your option) any later version. 12 13This program is distributed in the hope that it will be useful, 14but WITHOUT ANY WARRANTY; without even the implied warranty of 15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16GNU General Public License for more details. 17 18You should have received a copy of the GNU General Public License 19along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21/* For other arch:s, this file is described as a "collection of junk", so 22 let's collect some nice junk of our own. Keep it; it might be useful 23 some day! */ 24 25#ifndef CRIS_SIM_H 26#define CRIS_SIM_H 27 28typedef struct { 29 /* Whether the branch for the current insn was taken. Placed first 30 here, in hope it'll get closer to the main simulator data. */ 31 USI branch_taken; 32 33 /* PC of the insn of the branch. */ 34 USI old_pc; 35 36 /* Static cycle count for all insns executed so far, including 37 non-context-specific stall cycles, for example when adding to PC. */ 38 unsigned64 basic_cycle_count; 39 40 /* Stall cycles for unaligned access of memory operands. FIXME: 41 Should or should not include unaligned [PC+] operands? */ 42 unsigned64 unaligned_mem_dword_count; 43 44 /* Context-specific stall cycles. */ 45 unsigned64 memsrc_stall_count; 46 unsigned64 memraw_stall_count; 47 unsigned64 movemsrc_stall_count; 48 unsigned64 movemaddr_stall_count; 49 unsigned64 movemdst_stall_count; 50 unsigned64 mulsrc_stall_count; 51 unsigned64 jumpsrc_stall_count; 52 unsigned64 branch_stall_count; 53 unsigned64 jumptarget_stall_count; 54 55 /* What kind of target-specific trace to perform. */ 56 int flags; 57 58 /* Just the basic cycle count. */ 59#define FLAG_CRIS_MISC_PROFILE_SIMPLE 1 60 61 /* Show unaligned accesses. */ 62#define FLAG_CRIS_MISC_PROFILE_UNALIGNED 2 63 64 /* Show schedulable entities. */ 65#define FLAG_CRIS_MISC_PROFILE_SCHEDULABLE 4 66 67 /* Show everything. */ 68#define FLAG_CRIS_MISC_PROFILE_ALL \ 69 (FLAG_CRIS_MISC_PROFILE_SIMPLE \ 70 | FLAG_CRIS_MISC_PROFILE_UNALIGNED \ 71 | FLAG_CRIS_MISC_PROFILE_SCHEDULABLE) 72 73 /* Emit trace of each insn, xsim style. */ 74#define FLAG_CRIS_MISC_PROFILE_XSIM_TRACE 8 75 76#define N_CRISV32_BRANCH_PREDICTORS 256 77 unsigned char branch_predictors[N_CRISV32_BRANCH_PREDICTORS]; 78 79} CRIS_MISC_PROFILE; 80 81/* Handler prototypes for functions called from the CGEN description. */ 82 83extern USI cris_bmod_handler (SIM_CPU *, UINT, USI); 84extern void cris_flush_simulator_decode_cache (SIM_CPU *, USI); 85extern USI crisv10f_break_handler (SIM_CPU *, USI, USI); 86extern USI crisv32f_break_handler (SIM_CPU *, USI, USI); 87extern USI cris_break_13_handler (SIM_CPU *, USI, USI, USI, USI, USI, USI, 88 USI, USI); 89extern char cris_have_900000xxif; 90enum cris_unknown_syscall_action_type 91 { CRIS_USYSC_MSG_STOP, CRIS_USYSC_MSG_ENOSYS, CRIS_USYSC_QUIET_ENOSYS }; 92extern enum cris_unknown_syscall_action_type cris_unknown_syscall_action; 93enum cris_interrupt_type { CRIS_INT_NMI, CRIS_INT_RESET, CRIS_INT_INT }; 94extern int crisv10deliver_interrupt (SIM_CPU *, 95 enum cris_interrupt_type, 96 unsigned int); 97extern int crisv32deliver_interrupt (SIM_CPU *, 98 enum cris_interrupt_type, 99 unsigned int); 100 101/* Using GNU syntax (not C99) so we can compile this on RH 6.2 102 (egcs-1.1.2/gcc-2.91.66). */ 103#define cris_trace_printf(SD, CPU, FMT...) \ 104 do \ 105 { \ 106 if (TRACE_FILE (STATE_TRACE_DATA (SD)) != NULL) \ 107 fprintf (TRACE_FILE (CPU_TRACE_DATA (CPU)), FMT); \ 108 else \ 109 sim_io_printf (SD, FMT); \ 110 } \ 111 while (0) 112 113#if WITH_PROFILE_MODEL_P 114#define crisv32f_branch_taken(cpu, oldpc, newpc, taken) \ 115 do \ 116 { \ 117 CPU_CRIS_MISC_PROFILE (cpu)->old_pc = oldpc; \ 118 CPU_CRIS_MISC_PROFILE (cpu)->branch_taken = taken; \ 119 } \ 120 while (0) 121#else 122#define crisv32f_branch_taken(cpu, oldpc, newpc, taken) 123#endif 124 125#define crisv10f_branch_taken(cpu, oldpc, newpc, taken) 126 127#define crisv32f_read_supr(cpu, index) \ 128 (cgen_rtx_error (current_cpu, \ 129 "Read of support register is unimplemented"), \ 130 0) 131 132#define crisv32f_write_supr(cpu, index, val) \ 133 cgen_rtx_error (current_cpu, \ 134 "Write to support register is unimplemented") \ 135 136#define crisv32f_rfg_handler(cpu, pc) \ 137 cgen_rtx_error (current_cpu, "RFG isn't implemented") 138 139#define crisv32f_halt_handler(cpu, pc) \ 140 (cgen_rtx_error (current_cpu, "HALT isn't implemented"), 0) 141 142#define crisv32f_fidxi_handler(cpu, pc, indx) \ 143 (cgen_rtx_error (current_cpu, "FIDXI isn't implemented"), 0) 144 145#define crisv32f_ftagi_handler(cpu, pc, indx) \ 146 (cgen_rtx_error (current_cpu, "FTAGI isn't implemented"), 0) 147 148#define crisv32f_fidxd_handler(cpu, pc, indx) \ 149 (cgen_rtx_error (current_cpu, "FIDXD isn't implemented"), 0) 150 151#define crisv32f_ftagd_handler(cpu, pc, indx) \ 152 (cgen_rtx_error (current_cpu, "FTAGD isn't implemented"), 0) 153 154/* We have nothing special to do when interrupts or NMI are enabled 155 after having been disabled, so empty macros are enough for these 156 hooks. */ 157#define crisv32f_interrupts_enabled(cpu) 158#define crisv32f_nmi_enabled(cpu) 159 160/* Better warn for this case here, because everything needed is 161 somewhere within the CPU. Compare to trying to use interrupts and 162 NMI, which would fail earlier, when trying to make nonexistent 163 external components generate those exceptions. */ 164#define crisv32f_single_step_enabled(cpu) \ 165 ((crisv32f_h_qbit_get (cpu) != 0 \ 166 || (crisv32f_h_sr_get (cpu, H_SR_SPC) & ~1) != 0) \ 167 ? (cgen_rtx_error (cpu, \ 168 "single-stepping isn't implemented"), 0) \ 169 : 0) 170 171/* We don't need to track the value of the PID register here. */ 172#define crisv32f_write_pid_handler(cpu, val) 173 174/* Neither do we need to know of transitions to user mode. */ 175#define crisv32f_usermode_enabled(cpu) 176 177/* House-keeping exported from traps.c */ 178extern void cris_set_callbacks (host_callback *); 179 180/* FIXME: Add more junk. */ 181#endif 182