1/* Blackfin External Bus Interface Unit (EBIU) SDRAM Controller (SDC) Model. 2 3 Copyright (C) 2010-2011 Free Software Foundation, Inc. 4 Contributed by Analog Devices, Inc. 5 6 This file is part of simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21#include "config.h" 22 23#include "sim-main.h" 24#include "devices.h" 25#include "dv-bfin_ebiu_sdc.h" 26 27struct bfin_ebiu_sdc 28{ 29 bu32 base; 30 int type; 31 bu32 reg_size, bank_size; 32 33 /* Order after here is important -- matches hardware MMR layout. */ 34 bu32 sdgctl; 35 bu32 sdbctl; /* 16bit on most parts ... */ 36 bu16 BFIN_MMR_16(sdrrc); 37 bu16 BFIN_MMR_16(sdstat); 38}; 39#define mmr_base() offsetof(struct bfin_ebiu_sdc, sdgctl) 40#define mmr_offset(mmr) (offsetof(struct bfin_ebiu_sdc, mmr) - mmr_base()) 41 42static const char * const mmr_names[] = 43{ 44 "EBIU_SDGCTL", "EBIU_SDBCTL", "EBIU_SDRRC", "EBIU_SDSTAT", 45}; 46#define mmr_name(off) mmr_names[(off) / 4] 47 48static unsigned 49bfin_ebiu_sdc_io_write_buffer (struct hw *me, const void *source, 50 int space, address_word addr, unsigned nr_bytes) 51{ 52 struct bfin_ebiu_sdc *sdc = hw_data (me); 53 bu32 mmr_off; 54 bu32 value; 55 bu16 *value16p; 56 bu32 *value32p; 57 void *valuep; 58 59 if (nr_bytes == 4) 60 value = dv_load_4 (source); 61 else 62 value = dv_load_2 (source); 63 64 mmr_off = addr - sdc->base; 65 valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); 66 value16p = valuep; 67 value32p = valuep; 68 69 HW_TRACE_WRITE (); 70 71 switch (mmr_off) 72 { 73 case mmr_offset(sdgctl): 74 /* XXX: SRFS should make external mem unreadable. */ 75 *value32p = value; 76 break; 77 case mmr_offset(sdbctl): 78 if (sdc->type == 561) 79 { 80 dv_bfin_mmr_require_32 (me, addr, nr_bytes, true); 81 *value32p = value; 82 } 83 else 84 { 85 dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); 86 *value16p = value; 87 } 88 break; 89 case mmr_offset(sdrrc): 90 dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); 91 *value16p = value; 92 break; 93 case mmr_offset(sdstat): 94 dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); 95 /* XXX: Some bits are W1C ... */ 96 break; 97 } 98 99 return nr_bytes; 100} 101 102static unsigned 103bfin_ebiu_sdc_io_read_buffer (struct hw *me, void *dest, 104 int space, address_word addr, unsigned nr_bytes) 105{ 106 struct bfin_ebiu_sdc *sdc = hw_data (me); 107 bu32 mmr_off; 108 bu32 *value32p; 109 bu16 *value16p; 110 void *valuep; 111 112 mmr_off = addr - sdc->base; 113 valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); 114 value16p = valuep; 115 value32p = valuep; 116 117 HW_TRACE_READ (); 118 119 switch (mmr_off) 120 { 121 case mmr_offset(sdgctl): 122 dv_store_4 (dest, *value32p); 123 break; 124 case mmr_offset(sdbctl): 125 if (sdc->type == 561) 126 { 127 dv_bfin_mmr_require_32 (me, addr, nr_bytes, false); 128 dv_store_4 (dest, *value32p); 129 } 130 else 131 { 132 dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); 133 dv_store_2 (dest, *value16p); 134 } 135 break; 136 case mmr_offset(sdrrc): 137 case mmr_offset(sdstat): 138 dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); 139 dv_store_2 (dest, *value16p); 140 break; 141 } 142 143 return nr_bytes; 144} 145 146static void 147attach_bfin_ebiu_sdc_regs (struct hw *me, struct bfin_ebiu_sdc *sdc) 148{ 149 address_word attach_address; 150 int attach_space; 151 unsigned attach_size; 152 reg_property_spec reg; 153 154 if (hw_find_property (me, "reg") == NULL) 155 hw_abort (me, "Missing \"reg\" property"); 156 157 if (!hw_find_reg_array_property (me, "reg", 0, ®)) 158 hw_abort (me, "\"reg\" property must contain three addr/size entries"); 159 160 hw_unit_address_to_attach_address (hw_parent (me), 161 ®.address, 162 &attach_space, &attach_address, me); 163 hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); 164 165 if (attach_size != BFIN_MMR_EBIU_SDC_SIZE) 166 hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EBIU_SDC_SIZE); 167 168 hw_attach_address (hw_parent (me), 169 0, attach_space, attach_address, attach_size, me); 170 171 sdc->base = attach_address; 172} 173 174static void 175bfin_ebiu_sdc_finish (struct hw *me) 176{ 177 struct bfin_ebiu_sdc *sdc; 178 179 sdc = HW_ZALLOC (me, struct bfin_ebiu_sdc); 180 181 set_hw_data (me, sdc); 182 set_hw_io_read_buffer (me, bfin_ebiu_sdc_io_read_buffer); 183 set_hw_io_write_buffer (me, bfin_ebiu_sdc_io_write_buffer); 184 185 attach_bfin_ebiu_sdc_regs (me, sdc); 186 187 sdc->type = hw_find_integer_property (me, "type"); 188 189 /* Initialize the SDC. */ 190 sdc->sdgctl = 0xE0088849; 191 sdc->sdbctl = 0x00000000; 192 sdc->sdrrc = 0x081A; 193 sdc->sdstat = 0x0008; 194 195 /* XXX: We boot with 64M external memory by default ... */ 196 sdc->sdbctl |= EBE | EBSZ_64 | EBCAW_10; 197} 198 199const struct hw_descriptor dv_bfin_ebiu_sdc_descriptor[] = 200{ 201 {"bfin_ebiu_sdc", bfin_ebiu_sdc_finish,}, 202 {NULL, NULL}, 203}; 204