1193323Sed/* bfin.h -- Header file for ADI Blackfin opcode table 2193323Sed Copyright 2005, 2010, 2011 Free Software Foundation, Inc. 3193323Sed 4193323Sed This file is part of GDB, GAS, and the GNU binutils. 5193323Sed 6193323Sed GDB, GAS, and the GNU binutils are free software; you can redistribute 7193323Sed them and/or modify them under the terms of the GNU General Public 8193323Sed License as published by the Free Software Foundation; either version 3, 9193323Sed or (at your option) any later version. 10193323Sed 11193323Sed GDB, GAS, and the GNU binutils are distributed in the hope that they 12193323Sed will be useful, but WITHOUT ANY WARRANTY; without even the implied 13193323Sed warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 14193323Sed the GNU General Public License for more details. 15193323Sed 16193323Sed You should have received a copy of the GNU General Public License 17198090Srdivacky along with this file; see the file COPYING3. If not, write to the Free 18193323Sed Software Foundation, 51 Franklin Street - Fifth Floor, Boston, 19193323Sed MA 02110-1301, USA. */ 20193323Sed 21193323Sed#ifndef OPCODE_BFIN_H 22193323Sed#define OPCODE_BFIN_H 23193323Sed 24193323Sed/* Common to all DSP32 instructions. */ 25193323Sed#define BIT_MULTI_INS 0x0800 26193323Sed 27193323Sed/* This just sets the multi instruction bit of a DSP32 instruction. */ 28193323Sed#define SET_MULTI_INSTRUCTION_BIT(x) x->value |= BIT_MULTI_INS; 29193323Sed 30193323Sed 31193323Sed/* DSP instructions (32 bit) */ 32193323Sed 33193323Sed/* mmod field. */ 34193323Sed#define M_S2RND 1 35193323Sed#define M_T 2 36193323Sed#define M_W32 3 37193323Sed#define M_FU 4 38193323Sed#define M_TFU 6 39193323Sed#define M_IS 8 40193323Sed#define M_ISS2 9 41193323Sed#define M_IH 11 42193323Sed#define M_IU 12 43193323Sed 44193323Sedstatic inline int is_macmod_pmove(int x) 45193323Sed{ 46193323Sed return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_S2RND) 47193323Sed || (x == M_ISS2) || (x == M_IU); 48193323Sed} 49193323Sed 50193323Sedstatic inline int is_macmod_hmove(int x) 51193323Sed{ 52193323Sed return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_IU) || (x == M_T) 53193323Sed || (x == M_TFU) || (x == M_S2RND) || (x == M_ISS2) || (x == M_IH); 54193323Sed} 55234353Sdim 56249423Sdim/* dsp32mac 57234353Sdim+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 58234353Sdim| 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...| 59193323Sed|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......| 60193323Sed+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 61193323Sed*/ 62193323Sed 63193323Sedtypedef struct 64193323Sed{ 65193323Sed unsigned long opcode; 66193323Sed int bits_src1; 67193323Sed int mask_src1; 68193323Sed int bits_src0; 69193323Sed int mask_src0; 70193323Sed int bits_dst; 71193323Sed int mask_dst; 72193323Sed int bits_h10; 73193323Sed int mask_h10; 74193323Sed int bits_h00; 75193323Sed int mask_h00; 76193323Sed int bits_op0; 77193323Sed int mask_op0; 78193323Sed int bits_w0; 79199481Srdivacky int mask_w0; 80193323Sed int bits_h11; 81193323Sed int mask_h11; 82193323Sed int bits_h01; 83193323Sed int mask_h01; 84199481Srdivacky int bits_op1; 85193323Sed int mask_op1; 86193323Sed int bits_w1; 87193323Sed int mask_w1; 88193323Sed int bits_P; 89193323Sed int mask_P; 90193323Sed int bits_MM; 91193323Sed int mask_MM; 92199481Srdivacky int bits_mmod; 93193323Sed int mask_mmod; 94193323Sed int bits_code2; 95193323Sed int mask_code2; 96193323Sed int bits_M; 97193323Sed int mask_M; 98193323Sed int bits_code; 99193323Sed int mask_code; 100193323Sed} DSP32Mac; 101193323Sed 102193323Sed#define DSP32Mac_opcode 0xc0000000 103193323Sed#define DSP32Mac_src1_bits 0 104193323Sed#define DSP32Mac_src1_mask 0x7 105193323Sed#define DSP32Mac_src0_bits 3 106193323Sed#define DSP32Mac_src0_mask 0x7 107193323Sed#define DSP32Mac_dst_bits 6 108193323Sed#define DSP32Mac_dst_mask 0x7 109193323Sed#define DSP32Mac_h10_bits 9 110193323Sed#define DSP32Mac_h10_mask 0x1 111193323Sed#define DSP32Mac_h00_bits 10 112193323Sed#define DSP32Mac_h00_mask 0x1 113193323Sed#define DSP32Mac_op0_bits 11 114193323Sed#define DSP32Mac_op0_mask 0x3 115193323Sed#define DSP32Mac_w0_bits 13 116193323Sed#define DSP32Mac_w0_mask 0x1 117193323Sed#define DSP32Mac_h11_bits 14 118193323Sed#define DSP32Mac_h11_mask 0x1 119193323Sed#define DSP32Mac_h01_bits 15 120218893Sdim#define DSP32Mac_h01_mask 0x1 121218893Sdim#define DSP32Mac_op1_bits 16 122198090Srdivacky#define DSP32Mac_op1_mask 0x3 123198090Srdivacky#define DSP32Mac_w1_bits 18 124193323Sed#define DSP32Mac_w1_mask 0x1 125193323Sed#define DSP32Mac_p_bits 19 126193323Sed#define DSP32Mac_p_mask 0x1 127193323Sed#define DSP32Mac_MM_bits 20 128193323Sed#define DSP32Mac_MM_mask 0x1 129193323Sed#define DSP32Mac_mmod_bits 21 130193323Sed#define DSP32Mac_mmod_mask 0xf 131193323Sed#define DSP32Mac_code2_bits 25 132193323Sed#define DSP32Mac_code2_mask 0x3 133193323Sed#define DSP32Mac_M_bits 27 134224145Sdim#define DSP32Mac_M_mask 0x1 135193323Sed#define DSP32Mac_code_bits 28 136193323Sed#define DSP32Mac_code_mask 0xf 137193323Sed 138193323Sed#define init_DSP32Mac \ 139193323Sed{ \ 140193323Sed DSP32Mac_opcode, \ 141193323Sed DSP32Mac_src1_bits, DSP32Mac_src1_mask, \ 142193323Sed DSP32Mac_src0_bits, DSP32Mac_src0_mask, \ 143193323Sed DSP32Mac_dst_bits, DSP32Mac_dst_mask, \ 144193323Sed DSP32Mac_h10_bits, DSP32Mac_h10_mask, \ 145193323Sed DSP32Mac_h00_bits, DSP32Mac_h00_mask, \ 146193323Sed DSP32Mac_op0_bits, DSP32Mac_op0_mask, \ 147193323Sed DSP32Mac_w0_bits, DSP32Mac_w0_mask, \ 148193323Sed DSP32Mac_h11_bits, DSP32Mac_h11_mask, \ 149193323Sed DSP32Mac_h01_bits, DSP32Mac_h01_mask, \ 150218893Sdim DSP32Mac_op1_bits, DSP32Mac_op1_mask, \ 151193323Sed DSP32Mac_w1_bits, DSP32Mac_w1_mask, \ 152193323Sed DSP32Mac_p_bits, DSP32Mac_p_mask, \ 153193323Sed DSP32Mac_MM_bits, DSP32Mac_MM_mask, \ 154193323Sed DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \ 155193323Sed DSP32Mac_code2_bits, DSP32Mac_code2_mask, \ 156193323Sed DSP32Mac_M_bits, DSP32Mac_M_mask, \ 157193323Sed DSP32Mac_code_bits, DSP32Mac_code_mask \ 158193323Sed}; 159193323Sed 160193323Sed/* dsp32mult 161193323Sed+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 162193323Sed| 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...| 163193323Sed|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......| 164193323Sed+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 165193323Sed*/ 166193323Sed 167193323Sedtypedef DSP32Mac DSP32Mult; 168193323Sed#define DSP32Mult_opcode 0xc2000000 169193323Sed 170193323Sed#define init_DSP32Mult \ 171193323Sed{ \ 172193323Sed DSP32Mult_opcode, \ 173193323Sed DSP32Mac_src1_bits, DSP32Mac_src1_mask, \ 174193323Sed DSP32Mac_src0_bits, DSP32Mac_src0_mask, \ 175193323Sed DSP32Mac_dst_bits, DSP32Mac_dst_mask, \ 176193323Sed DSP32Mac_h10_bits, DSP32Mac_h10_mask, \ 177193323Sed DSP32Mac_h00_bits, DSP32Mac_h00_mask, \ 178193323Sed DSP32Mac_op0_bits, DSP32Mac_op0_mask, \ 179193323Sed DSP32Mac_w0_bits, DSP32Mac_w0_mask, \ 180193323Sed DSP32Mac_h11_bits, DSP32Mac_h11_mask, \ 181193323Sed DSP32Mac_h01_bits, DSP32Mac_h01_mask, \ 182193323Sed DSP32Mac_op1_bits, DSP32Mac_op1_mask, \ 183193323Sed DSP32Mac_w1_bits, DSP32Mac_w1_mask, \ 184193323Sed DSP32Mac_p_bits, DSP32Mac_p_mask, \ 185193323Sed DSP32Mac_MM_bits, DSP32Mac_MM_mask, \ 186193323Sed DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \ 187193323Sed DSP32Mac_code2_bits, DSP32Mac_code2_mask, \ 188193323Sed DSP32Mac_M_bits, DSP32Mac_M_mask, \ 189193323Sed DSP32Mac_code_bits, DSP32Mac_code_mask \ 190193323Sed}; 191193323Sed 192193323Sed/* dsp32alu 193193323Sed+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 194193323Sed| 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............| 195193323Sed|.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......| 196193323Sed+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 197193323Sed*/ 198218893Sdim 199206083Srdivackytypedef struct 200206083Srdivacky{ 201206083Srdivacky unsigned long opcode; 202206083Srdivacky int bits_src1; 203206083Srdivacky int mask_src1; 204206083Srdivacky int bits_src0; 205193323Sed int mask_src0; 206193323Sed int bits_dst1; 207193323Sed int mask_dst1; 208193323Sed int bits_dst0; 209193323Sed int mask_dst0; 210193323Sed int bits_x; 211193323Sed int mask_x; 212193323Sed int bits_s; 213193323Sed int mask_s; 214193323Sed int bits_aop; 215193323Sed int mask_aop; 216193323Sed int bits_aopcde; 217193323Sed int mask_aopcde; 218193323Sed int bits_HL; 219193323Sed int mask_HL; 220193323Sed int bits_dontcare; 221193323Sed int mask_dontcare; 222193323Sed int bits_code2; 223193323Sed int mask_code2; 224193323Sed int bits_M; 225193323Sed int mask_M; 226193323Sed int bits_code; 227193323Sed int mask_code; 228193323Sed} DSP32Alu; 229193323Sed 230234353Sdim#define DSP32Alu_opcode 0xc4000000 231193323Sed#define DSP32Alu_src1_bits 0 232234353Sdim#define DSP32Alu_src1_mask 0x7 233193323Sed#define DSP32Alu_src0_bits 3 234193323Sed#define DSP32Alu_src0_mask 0x7 235193323Sed#define DSP32Alu_dst1_bits 6 236218893Sdim#define DSP32Alu_dst1_mask 0x7 237212904Sdim#define DSP32Alu_dst0_bits 9 238212904Sdim#define DSP32Alu_dst0_mask 0x7 239212904Sdim#define DSP32Alu_x_bits 12 240249423Sdim#define DSP32Alu_x_mask 0x1 241249423Sdim#define DSP32Alu_s_bits 13 242249423Sdim#define DSP32Alu_s_mask 0x1 243249423Sdim#define DSP32Alu_aop_bits 14 244234982Sdim#define DSP32Alu_aop_mask 0x3 245193323Sed#define DSP32Alu_aopcde_bits 16 246193323Sed#define DSP32Alu_aopcde_mask 0x1f 247193323Sed#define DSP32Alu_HL_bits 21 248218893Sdim#define DSP32Alu_HL_mask 0x1 249193323Sed#define DSP32Alu_dontcare_bits 22 250193323Sed#define DSP32Alu_dontcare_mask 0x7 251193323Sed#define DSP32Alu_code2_bits 25 252193323Sed#define DSP32Alu_code2_mask 0x3 253218893Sdim#define DSP32Alu_M_bits 27 254193323Sed#define DSP32Alu_M_mask 0x1 255193323Sed#define DSP32Alu_code_bits 28 256193323Sed#define DSP32Alu_code_mask 0xf 257218893Sdim 258218893Sdim#define init_DSP32Alu \ 259218893Sdim{ \ 260218893Sdim DSP32Alu_opcode, \ 261193323Sed DSP32Alu_src1_bits, DSP32Alu_src1_mask, \ 262193323Sed DSP32Alu_src0_bits, DSP32Alu_src0_mask, \ 263193323Sed DSP32Alu_dst1_bits, DSP32Alu_dst1_mask, \ 264193323Sed DSP32Alu_dst0_bits, DSP32Alu_dst0_mask, \ 265193323Sed DSP32Alu_x_bits, DSP32Alu_x_mask, \ 266193323Sed DSP32Alu_s_bits, DSP32Alu_s_mask, \ 267193323Sed DSP32Alu_aop_bits, DSP32Alu_aop_mask, \ 268193323Sed DSP32Alu_aopcde_bits, DSP32Alu_aopcde_mask, \ 269193323Sed DSP32Alu_HL_bits, DSP32Alu_HL_mask, \ 270193323Sed DSP32Alu_dontcare_bits, DSP32Alu_dontcare_mask, \ 271193323Sed DSP32Alu_code2_bits, DSP32Alu_code2_mask, \ 272193323Sed DSP32Alu_M_bits, DSP32Alu_M_mask, \ 273193323Sed DSP32Alu_code_bits, DSP32Alu_code_mask \ 274193323Sed}; 275193323Sed 276193323Sed/* dsp32shift 277193323Sed+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 278193323Sed| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............| 279193323Sed|.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......| 280193323Sed+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 281193323Sed*/ 282193323Sed 283199481Srdivackytypedef struct 284198090Srdivacky{ 285193323Sed unsigned long opcode; 286234353Sdim int bits_src1; 287193323Sed int mask_src1; 288193323Sed int bits_src0; 289199481Srdivacky int mask_src0; 290198090Srdivacky int bits_dst1; 291193323Sed int mask_dst1; 292234353Sdim int bits_dst0; 293193323Sed int mask_dst0; 294193323Sed int bits_HLs; 295249423Sdim int mask_HLs; 296193323Sed int bits_sop; 297199481Srdivacky int mask_sop; 298193323Sed int bits_sopcde; 299193323Sed int mask_sopcde; 300193323Sed int bits_dontcare; 301193323Sed int mask_dontcare; 302193323Sed int bits_code2; 303193323Sed int mask_code2; 304224145Sdim int bits_M; 305198090Srdivacky int mask_M; 306193323Sed int bits_code; 307193323Sed int mask_code; 308199481Srdivacky} DSP32Shift; 309198090Srdivacky 310193323Sed#define DSP32Shift_opcode 0xc6000000 311193323Sed#define DSP32Shift_src1_bits 0 312193323Sed#define DSP32Shift_src1_mask 0x7 313193323Sed#define DSP32Shift_src0_bits 3 314193323Sed#define DSP32Shift_src0_mask 0x7 315193323Sed#define DSP32Shift_dst1_bits 6 316198090Srdivacky#define DSP32Shift_dst1_mask 0x7 317234353Sdim#define DSP32Shift_dst0_bits 9 318234353Sdim#define DSP32Shift_dst0_mask 0x7 319193323Sed#define DSP32Shift_HLs_bits 12 320193323Sed#define DSP32Shift_HLs_mask 0x3 321234353Sdim#define DSP32Shift_sop_bits 14 322193323Sed#define DSP32Shift_sop_mask 0x3 323234353Sdim#define DSP32Shift_sopcde_bits 16 324193323Sed#define DSP32Shift_sopcde_mask 0x1f 325221345Sdim#define DSP32Shift_dontcare_bits 21 326193323Sed#define DSP32Shift_dontcare_mask 0x3 327221345Sdim#define DSP32Shift_code2_bits 23 328193323Sed#define DSP32Shift_code2_mask 0xf 329193323Sed#define DSP32Shift_M_bits 27 330193323Sed#define DSP32Shift_M_mask 0x1 331193323Sed#define DSP32Shift_code_bits 28 332193323Sed#define DSP32Shift_code_mask 0xf 333193323Sed 334193323Sed#define init_DSP32Shift \ 335193323Sed{ \ 336193323Sed DSP32Shift_opcode, \ 337234353Sdim DSP32Shift_src1_bits, DSP32Shift_src1_mask, \ 338234353Sdim DSP32Shift_src0_bits, DSP32Shift_src0_mask, \ 339234353Sdim DSP32Shift_dst1_bits, DSP32Shift_dst1_mask, \ 340234353Sdim DSP32Shift_dst0_bits, DSP32Shift_dst0_mask, \ 341193323Sed DSP32Shift_HLs_bits, DSP32Shift_HLs_mask, \ 342249423Sdim DSP32Shift_sop_bits, DSP32Shift_sop_mask, \ 343193323Sed DSP32Shift_sopcde_bits, DSP32Shift_sopcde_mask, \ 344193323Sed DSP32Shift_dontcare_bits, DSP32Shift_dontcare_mask, \ 345193323Sed DSP32Shift_code2_bits, DSP32Shift_code2_mask, \ 346221345Sdim DSP32Shift_M_bits, DSP32Shift_M_mask, \ 347193323Sed DSP32Shift_code_bits, DSP32Shift_code_mask \ 348193323Sed}; 349193323Sed 350193323Sed/* dsp32shiftimm 351193323Sed+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 352193323Sed| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............| 353224145Sdim|.sop...|.HLs...|.dst0......|.immag.................|.src1......| 354198090Srdivacky+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 355234353Sdim*/ 356234353Sdim 357234353Sdimtypedef struct 358193323Sed{ 359198090Srdivacky unsigned long opcode; 360198090Srdivacky int bits_src1; 361193323Sed int mask_src1; 362234353Sdim int bits_immag; 363193323Sed int mask_immag; 364193323Sed int bits_dst0; 365221345Sdim int mask_dst0; 366193323Sed int bits_HLs; 367193323Sed int mask_HLs; 368193323Sed int bits_sop; 369234353Sdim int mask_sop; 370193323Sed int bits_sopcde; 371221345Sdim int mask_sopcde; 372193323Sed int bits_dontcare; 373193323Sed int mask_dontcare; 374193323Sed int bits_code2; 375224145Sdim int mask_code2; 376198090Srdivacky int bits_M; 377198090Srdivacky int mask_M; 378198090Srdivacky int bits_code; 379193323Sed int mask_code; 380193323Sed} DSP32ShiftImm; 381193323Sed 382193323Sed#define DSP32ShiftImm_opcode 0xc6800000 383193323Sed#define DSP32ShiftImm_src1_bits 0 384193323Sed#define DSP32ShiftImm_src1_mask 0x7 385193323Sed#define DSP32ShiftImm_immag_bits 3 386193323Sed#define DSP32ShiftImm_immag_mask 0x3f 387193323Sed#define DSP32ShiftImm_dst0_bits 9 388193323Sed#define DSP32ShiftImm_dst0_mask 0x7 389193323Sed#define DSP32ShiftImm_HLs_bits 12 390193323Sed#define DSP32ShiftImm_HLs_mask 0x3 391199481Srdivacky#define DSP32ShiftImm_sop_bits 14 392193323Sed#define DSP32ShiftImm_sop_mask 0x3 393193323Sed#define DSP32ShiftImm_sopcde_bits 16 394193323Sed#define DSP32ShiftImm_sopcde_mask 0x1f 395193323Sed#define DSP32ShiftImm_dontcare_bits 21 396193323Sed#define DSP32ShiftImm_dontcare_mask 0x3 397193323Sed#define DSP32ShiftImm_code2_bits 23 398193323Sed#define DSP32ShiftImm_code2_mask 0xf 399193323Sed#define DSP32ShiftImm_M_bits 27 400193323Sed#define DSP32ShiftImm_M_mask 0x1 401193323Sed#define DSP32ShiftImm_code_bits 28 402193323Sed#define DSP32ShiftImm_code_mask 0xf 403193323Sed 404193323Sed#define init_DSP32ShiftImm \ 405193323Sed{ \ 406193323Sed DSP32ShiftImm_opcode, \ 407193323Sed DSP32ShiftImm_src1_bits, DSP32ShiftImm_src1_mask, \ 408234353Sdim DSP32ShiftImm_immag_bits, DSP32ShiftImm_immag_mask, \ 409193323Sed DSP32ShiftImm_dst0_bits, DSP32ShiftImm_dst0_mask, \ 410193323Sed DSP32ShiftImm_HLs_bits, DSP32ShiftImm_HLs_mask, \ 411193323Sed DSP32ShiftImm_sop_bits, DSP32ShiftImm_sop_mask, \ 412234353Sdim DSP32ShiftImm_sopcde_bits, DSP32ShiftImm_sopcde_mask, \ 413193323Sed DSP32ShiftImm_dontcare_bits, DSP32ShiftImm_dontcare_mask, \ 414193323Sed DSP32ShiftImm_code2_bits, DSP32ShiftImm_code2_mask, \ 415193323Sed DSP32ShiftImm_M_bits, DSP32ShiftImm_M_mask, \ 416193323Sed DSP32ShiftImm_code_bits, DSP32ShiftImm_code_mask \ 417193323Sed}; 418193323Sed 419234353Sdim/* LOAD / STORE */ 420193323Sed 421193323Sed/* LDSTidxI 422234353Sdim+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 423193323Sed| 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......| 424193323Sed|.offset........................................................| 425193323Sed+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 426193323Sed*/ 427193323Sed 428193323Sedtypedef struct 429193323Sed{ 430193323Sed unsigned long opcode; 431193323Sed int bits_offset; 432249423Sdim int mask_offset; 433193323Sed int bits_reg; 434193323Sed int mask_reg; 435193323Sed int bits_ptr; 436193323Sed int mask_ptr; 437193323Sed int bits_sz; 438193323Sed int mask_sz; 439193323Sed int bits_Z; 440193323Sed int mask_Z; 441193323Sed int bits_W; 442193323Sed int mask_W; 443234353Sdim int bits_code; 444193323Sed int mask_code; 445193323Sed} LDSTidxI; 446193323Sed 447193323Sed#define LDSTidxI_opcode 0xe4000000 448193323Sed#define LDSTidxI_offset_bits 0 449193323Sed#define LDSTidxI_offset_mask 0xffff 450193323Sed#define LDSTidxI_reg_bits 16 451234353Sdim#define LDSTidxI_reg_mask 0x7 452193323Sed#define LDSTidxI_ptr_bits 19 453193323Sed#define LDSTidxI_ptr_mask 0x7 454193323Sed#define LDSTidxI_sz_bits 22 455193323Sed#define LDSTidxI_sz_mask 0x3 456234353Sdim#define LDSTidxI_Z_bits 24 457193323Sed#define LDSTidxI_Z_mask 0x1 458193323Sed#define LDSTidxI_W_bits 25 459234353Sdim#define LDSTidxI_W_mask 0x1 460193323Sed#define LDSTidxI_code_bits 26 461193323Sed#define LDSTidxI_code_mask 0x3f 462193323Sed 463193323Sed#define init_LDSTidxI \ 464193323Sed{ \ 465193323Sed LDSTidxI_opcode, \ 466 LDSTidxI_offset_bits, LDSTidxI_offset_mask, \ 467 LDSTidxI_reg_bits, LDSTidxI_reg_mask, \ 468 LDSTidxI_ptr_bits, LDSTidxI_ptr_mask, \ 469 LDSTidxI_sz_bits, LDSTidxI_sz_mask, \ 470 LDSTidxI_Z_bits, LDSTidxI_Z_mask, \ 471 LDSTidxI_W_bits, LDSTidxI_W_mask, \ 472 LDSTidxI_code_bits, LDSTidxI_code_mask \ 473}; 474 475 476/* LDST 477+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 478| 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......| 479+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 480*/ 481 482typedef struct 483{ 484 unsigned short opcode; 485 int bits_reg; 486 int mask_reg; 487 int bits_ptr; 488 int mask_ptr; 489 int bits_Z; 490 int mask_Z; 491 int bits_aop; 492 int mask_aop; 493 int bits_W; 494 int mask_W; 495 int bits_sz; 496 int mask_sz; 497 int bits_code; 498 int mask_code; 499} LDST; 500 501#define LDST_opcode 0x9000 502#define LDST_reg_bits 0 503#define LDST_reg_mask 0x7 504#define LDST_ptr_bits 3 505#define LDST_ptr_mask 0x7 506#define LDST_Z_bits 6 507#define LDST_Z_mask 0x1 508#define LDST_aop_bits 7 509#define LDST_aop_mask 0x3 510#define LDST_W_bits 9 511#define LDST_W_mask 0x1 512#define LDST_sz_bits 10 513#define LDST_sz_mask 0x3 514#define LDST_code_bits 12 515#define LDST_code_mask 0xf 516 517#define init_LDST \ 518{ \ 519 LDST_opcode, \ 520 LDST_reg_bits, LDST_reg_mask, \ 521 LDST_ptr_bits, LDST_ptr_mask, \ 522 LDST_Z_bits, LDST_Z_mask, \ 523 LDST_aop_bits, LDST_aop_mask, \ 524 LDST_W_bits, LDST_W_mask, \ 525 LDST_sz_bits, LDST_sz_mask, \ 526 LDST_code_bits, LDST_code_mask \ 527}; 528 529/* LDSTii 530+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 531| 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......| 532+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 533*/ 534 535typedef struct 536{ 537 unsigned short opcode; 538 int bits_reg; 539 int mask_reg; 540 int bits_ptr; 541 int mask_ptr; 542 int bits_offset; 543 int mask_offset; 544 int bits_op; 545 int mask_op; 546 int bits_W; 547 int mask_W; 548 int bits_code; 549 int mask_code; 550} LDSTii; 551 552#define LDSTii_opcode 0xa000 553#define LDSTii_reg_bit 0 554#define LDSTii_reg_mask 0x7 555#define LDSTii_ptr_bit 3 556#define LDSTii_ptr_mask 0x7 557#define LDSTii_offset_bit 6 558#define LDSTii_offset_mask 0xf 559#define LDSTii_op_bit 10 560#define LDSTii_op_mask 0x3 561#define LDSTii_W_bit 12 562#define LDSTii_W_mask 0x1 563#define LDSTii_code_bit 13 564#define LDSTii_code_mask 0x7 565 566#define init_LDSTii \ 567{ \ 568 LDSTii_opcode, \ 569 LDSTii_reg_bit, LDSTii_reg_mask, \ 570 LDSTii_ptr_bit, LDSTii_ptr_mask, \ 571 LDSTii_offset_bit, LDSTii_offset_mask, \ 572 LDSTii_op_bit, LDSTii_op_mask, \ 573 LDSTii_W_bit, LDSTii_W_mask, \ 574 LDSTii_code_bit, LDSTii_code_mask \ 575}; 576 577 578/* LDSTiiFP 579+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 580| 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........| 581+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 582*/ 583 584typedef struct 585{ 586 unsigned short opcode; 587 int bits_reg; 588 int mask_reg; 589 int bits_offset; 590 int mask_offset; 591 int bits_W; 592 int mask_W; 593 int bits_code; 594 int mask_code; 595} LDSTiiFP; 596 597#define LDSTiiFP_opcode 0xb800 598#define LDSTiiFP_reg_bits 0 599#define LDSTiiFP_reg_mask 0xf 600#define LDSTiiFP_offset_bits 4 601#define LDSTiiFP_offset_mask 0x1f 602#define LDSTiiFP_W_bits 9 603#define LDSTiiFP_W_mask 0x1 604#define LDSTiiFP_code_bits 10 605#define LDSTiiFP_code_mask 0x3f 606 607#define init_LDSTiiFP \ 608{ \ 609 LDSTiiFP_opcode, \ 610 LDSTiiFP_reg_bits, LDSTiiFP_reg_mask, \ 611 LDSTiiFP_offset_bits, LDSTiiFP_offset_mask, \ 612 LDSTiiFP_W_bits, LDSTiiFP_W_mask, \ 613 LDSTiiFP_code_bits, LDSTiiFP_code_mask \ 614}; 615 616/* dspLDST 617+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 618| 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......| 619+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 620*/ 621 622typedef struct 623{ 624 unsigned short opcode; 625 int bits_reg; 626 int mask_reg; 627 int bits_i; 628 int mask_i; 629 int bits_m; 630 int mask_m; 631 int bits_aop; 632 int mask_aop; 633 int bits_W; 634 int mask_W; 635 int bits_code; 636 int mask_code; 637} DspLDST; 638 639#define DspLDST_opcode 0x9c00 640#define DspLDST_reg_bits 0 641#define DspLDST_reg_mask 0x7 642#define DspLDST_i_bits 3 643#define DspLDST_i_mask 0x3 644#define DspLDST_m_bits 5 645#define DspLDST_m_mask 0x3 646#define DspLDST_aop_bits 7 647#define DspLDST_aop_mask 0x3 648#define DspLDST_W_bits 9 649#define DspLDST_W_mask 0x1 650#define DspLDST_code_bits 10 651#define DspLDST_code_mask 0x3f 652 653#define init_DspLDST \ 654{ \ 655 DspLDST_opcode, \ 656 DspLDST_reg_bits, DspLDST_reg_mask, \ 657 DspLDST_i_bits, DspLDST_i_mask, \ 658 DspLDST_m_bits, DspLDST_m_mask, \ 659 DspLDST_aop_bits, DspLDST_aop_mask, \ 660 DspLDST_W_bits, DspLDST_W_mask, \ 661 DspLDST_code_bits, DspLDST_code_mask \ 662}; 663 664 665/* LDSTpmod 666+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 667| 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......| 668+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 669*/ 670 671typedef struct 672{ 673 unsigned short opcode; 674 int bits_ptr; 675 int mask_ptr; 676 int bits_idx; 677 int mask_idx; 678 int bits_reg; 679 int mask_reg; 680 int bits_aop; 681 int mask_aop; 682 int bits_W; 683 int mask_W; 684 int bits_code; 685 int mask_code; 686} LDSTpmod; 687 688#define LDSTpmod_opcode 0x8000 689#define LDSTpmod_ptr_bits 0 690#define LDSTpmod_ptr_mask 0x7 691#define LDSTpmod_idx_bits 3 692#define LDSTpmod_idx_mask 0x7 693#define LDSTpmod_reg_bits 6 694#define LDSTpmod_reg_mask 0x7 695#define LDSTpmod_aop_bits 9 696#define LDSTpmod_aop_mask 0x3 697#define LDSTpmod_W_bits 11 698#define LDSTpmod_W_mask 0x1 699#define LDSTpmod_code_bits 12 700#define LDSTpmod_code_mask 0xf 701 702#define init_LDSTpmod \ 703{ \ 704 LDSTpmod_opcode, \ 705 LDSTpmod_ptr_bits, LDSTpmod_ptr_mask, \ 706 LDSTpmod_idx_bits, LDSTpmod_idx_mask, \ 707 LDSTpmod_reg_bits, LDSTpmod_reg_mask, \ 708 LDSTpmod_aop_bits, LDSTpmod_aop_mask, \ 709 LDSTpmod_W_bits, LDSTpmod_W_mask, \ 710 LDSTpmod_code_bits, LDSTpmod_code_mask \ 711}; 712 713 714/* LOGI2op 715+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 716| 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......| 717+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 718*/ 719 720typedef struct 721{ 722 unsigned short opcode; 723 int bits_dst; 724 int mask_dst; 725 int bits_src; 726 int mask_src; 727 int bits_opc; 728 int mask_opc; 729 int bits_code; 730 int mask_code; 731} LOGI2op; 732 733#define LOGI2op_opcode 0x4800 734#define LOGI2op_dst_bits 0 735#define LOGI2op_dst_mask 0x7 736#define LOGI2op_src_bits 3 737#define LOGI2op_src_mask 0x1f 738#define LOGI2op_opc_bits 8 739#define LOGI2op_opc_mask 0x7 740#define LOGI2op_code_bits 11 741#define LOGI2op_code_mask 0x1f 742 743#define init_LOGI2op \ 744{ \ 745 LOGI2op_opcode, \ 746 LOGI2op_dst_bits, LOGI2op_dst_mask, \ 747 LOGI2op_src_bits, LOGI2op_src_mask, \ 748 LOGI2op_opc_bits, LOGI2op_opc_mask, \ 749 LOGI2op_code_bits, LOGI2op_code_mask \ 750}; 751 752 753/* ALU2op 754+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 755| 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......| 756+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 757*/ 758 759typedef struct 760{ 761 unsigned short opcode; 762 int bits_dst; 763 int mask_dst; 764 int bits_src; 765 int mask_src; 766 int bits_opc; 767 int mask_opc; 768 int bits_code; 769 int mask_code; 770} ALU2op; 771 772#define ALU2op_opcode 0x4000 773#define ALU2op_dst_bits 0 774#define ALU2op_dst_mask 0x7 775#define ALU2op_src_bits 3 776#define ALU2op_src_mask 0x7 777#define ALU2op_opc_bits 6 778#define ALU2op_opc_mask 0xf 779#define ALU2op_code_bits 10 780#define ALU2op_code_mask 0x3f 781 782#define init_ALU2op \ 783{ \ 784 ALU2op_opcode, \ 785 ALU2op_dst_bits, ALU2op_dst_mask, \ 786 ALU2op_src_bits, ALU2op_src_mask, \ 787 ALU2op_opc_bits, ALU2op_opc_mask, \ 788 ALU2op_code_bits, ALU2op_code_mask \ 789}; 790 791 792/* BRCC 793+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 794| 0 | 0 | 0 | 1 |.T.|.B.|.offset................................| 795+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 796*/ 797 798typedef struct 799{ 800 unsigned short opcode; 801 int bits_offset; 802 int mask_offset; 803 int bits_B; 804 int mask_B; 805 int bits_T; 806 int mask_T; 807 int bits_code; 808 int mask_code; 809} BRCC; 810 811#define BRCC_opcode 0x1000 812#define BRCC_offset_bits 0 813#define BRCC_offset_mask 0x3ff 814#define BRCC_B_bits 10 815#define BRCC_B_mask 0x1 816#define BRCC_T_bits 11 817#define BRCC_T_mask 0x1 818#define BRCC_code_bits 12 819#define BRCC_code_mask 0xf 820 821#define init_BRCC \ 822{ \ 823 BRCC_opcode, \ 824 BRCC_offset_bits, BRCC_offset_mask, \ 825 BRCC_B_bits, BRCC_B_mask, \ 826 BRCC_T_bits, BRCC_T_mask, \ 827 BRCC_code_bits, BRCC_code_mask \ 828}; 829 830 831/* UJUMP 832+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 833| 0 | 0 | 1 | 0 |.offset........................................| 834+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 835*/ 836 837typedef struct 838{ 839 unsigned short opcode; 840 int bits_offset; 841 int mask_offset; 842 int bits_code; 843 int mask_code; 844} UJump; 845 846#define UJump_opcode 0x2000 847#define UJump_offset_bits 0 848#define UJump_offset_mask 0xfff 849#define UJump_code_bits 12 850#define UJump_code_mask 0xf 851 852#define init_UJump \ 853{ \ 854 UJump_opcode, \ 855 UJump_offset_bits, UJump_offset_mask, \ 856 UJump_code_bits, UJump_code_mask \ 857}; 858 859 860/* ProgCtrl 861+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 862| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........| 863+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 864*/ 865 866typedef struct 867{ 868 unsigned short opcode; 869 int bits_poprnd; 870 int mask_poprnd; 871 int bits_prgfunc; 872 int mask_prgfunc; 873 int bits_code; 874 int mask_code; 875} ProgCtrl; 876 877#define ProgCtrl_opcode 0x0000 878#define ProgCtrl_poprnd_bits 0 879#define ProgCtrl_poprnd_mask 0xf 880#define ProgCtrl_prgfunc_bits 4 881#define ProgCtrl_prgfunc_mask 0xf 882#define ProgCtrl_code_bits 8 883#define ProgCtrl_code_mask 0xff 884 885#define init_ProgCtrl \ 886{ \ 887 ProgCtrl_opcode, \ 888 ProgCtrl_poprnd_bits, ProgCtrl_poprnd_mask, \ 889 ProgCtrl_prgfunc_bits, ProgCtrl_prgfunc_mask, \ 890 ProgCtrl_code_bits, ProgCtrl_code_mask \ 891}; 892 893/* CALLa 894+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 895| 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................| 896|.lsw...........................................................| 897+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 898*/ 899 900 901typedef struct 902{ 903 unsigned long opcode; 904 int bits_addr; 905 int mask_addr; 906 int bits_S; 907 int mask_S; 908 int bits_code; 909 int mask_code; 910} CALLa; 911 912#define CALLa_opcode 0xe2000000 913#define CALLa_addr_bits 0 914#define CALLa_addr_mask 0xffffff 915#define CALLa_S_bits 24 916#define CALLa_S_mask 0x1 917#define CALLa_code_bits 25 918#define CALLa_code_mask 0x7f 919 920#define init_CALLa \ 921{ \ 922 CALLa_opcode, \ 923 CALLa_addr_bits, CALLa_addr_mask, \ 924 CALLa_S_bits, CALLa_S_mask, \ 925 CALLa_code_bits, CALLa_code_mask \ 926}; 927 928 929/* pseudoDEBUG 930+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 931| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......| 932+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 933*/ 934 935typedef struct 936{ 937 unsigned short opcode; 938 int bits_reg; 939 int mask_reg; 940 int bits_grp; 941 int mask_grp; 942 int bits_fn; 943 int mask_fn; 944 int bits_code; 945 int mask_code; 946} PseudoDbg; 947 948#define PseudoDbg_opcode 0xf800 949#define PseudoDbg_reg_bits 0 950#define PseudoDbg_reg_mask 0x7 951#define PseudoDbg_grp_bits 3 952#define PseudoDbg_grp_mask 0x7 953#define PseudoDbg_fn_bits 6 954#define PseudoDbg_fn_mask 0x3 955#define PseudoDbg_code_bits 8 956#define PseudoDbg_code_mask 0xff 957 958#define init_PseudoDbg \ 959{ \ 960 PseudoDbg_opcode, \ 961 PseudoDbg_reg_bits, PseudoDbg_reg_mask, \ 962 PseudoDbg_grp_bits, PseudoDbg_grp_mask, \ 963 PseudoDbg_fn_bits, PseudoDbg_fn_mask, \ 964 PseudoDbg_code_bits, PseudoDbg_code_mask \ 965}; 966 967/* PseudoDbg_assert 968+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 969| 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...| 970|.expected......................................................| 971+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 972*/ 973 974typedef struct 975{ 976 unsigned long opcode; 977 int bits_expected; 978 int mask_expected; 979 int bits_regtest; 980 int mask_regtest; 981 int bits_grp; 982 int mask_grp; 983 int bits_dbgop; 984 int mask_dbgop; 985 int bits_dontcare; 986 int mask_dontcare; 987 int bits_code; 988 int mask_code; 989} PseudoDbg_Assert; 990 991#define PseudoDbg_Assert_opcode 0xf0000000 992#define PseudoDbg_Assert_expected_bits 0 993#define PseudoDbg_Assert_expected_mask 0xffff 994#define PseudoDbg_Assert_regtest_bits 16 995#define PseudoDbg_Assert_regtest_mask 0x7 996#define PseudoDbg_Assert_grp_bits 19 997#define PseudoDbg_Assert_grp_mask 0x7 998#define PseudoDbg_Assert_dbgop_bits 22 999#define PseudoDbg_Assert_dbgop_mask 0x3 1000#define PseudoDbg_Assert_dontcare_bits 24 1001#define PseudoDbg_Assert_dontcare_mask 0x7 1002#define PseudoDbg_Assert_code_bits 27 1003#define PseudoDbg_Assert_code_mask 0x1f 1004 1005#define init_PseudoDbg_Assert \ 1006{ \ 1007 PseudoDbg_Assert_opcode, \ 1008 PseudoDbg_Assert_expected_bits, PseudoDbg_Assert_expected_mask, \ 1009 PseudoDbg_Assert_regtest_bits, PseudoDbg_Assert_regtest_mask, \ 1010 PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask, \ 1011 PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, \ 1012 PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask, \ 1013 PseudoDbg_Assert_code_bits, PseudoDbg_Assert_code_mask \ 1014}; 1015 1016/* pseudoChr 1017+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1018| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |.ch............................| 1019+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1020*/ 1021 1022typedef struct 1023{ 1024 unsigned short opcode; 1025 int bits_ch; 1026 int mask_ch; 1027 int bits_code; 1028 int mask_code; 1029} PseudoChr; 1030 1031#define PseudoChr_opcode 0xf900 1032#define PseudoChr_ch_bits 0 1033#define PseudoChr_ch_mask 0xff 1034#define PseudoChr_code_bits 8 1035#define PseudoChr_code_mask 0xff 1036 1037#define init_PseudoChr \ 1038{ \ 1039 PseudoChr_opcode, \ 1040 PseudoChr_ch_bits, PseudoChr_ch_mask, \ 1041 PseudoChr_code_bits, PseudoChr_code_mask \ 1042}; 1043 1044/* CaCTRL 1045+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1046| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......| 1047+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1048*/ 1049 1050typedef struct 1051{ 1052 unsigned short opcode; 1053 int bits_reg; 1054 int mask_reg; 1055 int bits_op; 1056 int mask_op; 1057 int bits_a; 1058 int mask_a; 1059 int bits_code; 1060 int mask_code; 1061} CaCTRL; 1062 1063#define CaCTRL_opcode 0x0240 1064#define CaCTRL_reg_bits 0 1065#define CaCTRL_reg_mask 0x7 1066#define CaCTRL_op_bits 3 1067#define CaCTRL_op_mask 0x3 1068#define CaCTRL_a_bits 5 1069#define CaCTRL_a_mask 0x1 1070#define CaCTRL_code_bits 6 1071#define CaCTRL_code_mask 0x3fff 1072 1073#define init_CaCTRL \ 1074{ \ 1075 CaCTRL_opcode, \ 1076 CaCTRL_reg_bits, CaCTRL_reg_mask, \ 1077 CaCTRL_op_bits, CaCTRL_op_mask, \ 1078 CaCTRL_a_bits, CaCTRL_a_mask, \ 1079 CaCTRL_code_bits, CaCTRL_code_mask \ 1080}; 1081 1082/* PushPopMultiple 1083+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1084| 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........| 1085+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1086*/ 1087 1088typedef struct 1089{ 1090 unsigned short opcode; 1091 int bits_pr; 1092 int mask_pr; 1093 int bits_dr; 1094 int mask_dr; 1095 int bits_W; 1096 int mask_W; 1097 int bits_p; 1098 int mask_p; 1099 int bits_d; 1100 int mask_d; 1101 int bits_code; 1102 int mask_code; 1103} PushPopMultiple; 1104 1105#define PushPopMultiple_opcode 0x0400 1106#define PushPopMultiple_pr_bits 0 1107#define PushPopMultiple_pr_mask 0x7 1108#define PushPopMultiple_dr_bits 3 1109#define PushPopMultiple_dr_mask 0x7 1110#define PushPopMultiple_W_bits 6 1111#define PushPopMultiple_W_mask 0x1 1112#define PushPopMultiple_p_bits 7 1113#define PushPopMultiple_p_mask 0x1 1114#define PushPopMultiple_d_bits 8 1115#define PushPopMultiple_d_mask 0x1 1116#define PushPopMultiple_code_bits 8 1117#define PushPopMultiple_code_mask 0x1 1118 1119#define init_PushPopMultiple \ 1120{ \ 1121 PushPopMultiple_opcode, \ 1122 PushPopMultiple_pr_bits, PushPopMultiple_pr_mask, \ 1123 PushPopMultiple_dr_bits, PushPopMultiple_dr_mask, \ 1124 PushPopMultiple_W_bits, PushPopMultiple_W_mask, \ 1125 PushPopMultiple_p_bits, PushPopMultiple_p_mask, \ 1126 PushPopMultiple_d_bits, PushPopMultiple_d_mask, \ 1127 PushPopMultiple_code_bits, PushPopMultiple_code_mask \ 1128}; 1129 1130/* PushPopReg 1131+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1132| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......| 1133+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1134*/ 1135 1136typedef struct 1137{ 1138 unsigned short opcode; 1139 int bits_reg; 1140 int mask_reg; 1141 int bits_grp; 1142 int mask_grp; 1143 int bits_W; 1144 int mask_W; 1145 int bits_code; 1146 int mask_code; 1147} PushPopReg; 1148 1149#define PushPopReg_opcode 0x0100 1150#define PushPopReg_reg_bits 0 1151#define PushPopReg_reg_mask 0x7 1152#define PushPopReg_grp_bits 3 1153#define PushPopReg_grp_mask 0x7 1154#define PushPopReg_W_bits 6 1155#define PushPopReg_W_mask 0x1 1156#define PushPopReg_code_bits 7 1157#define PushPopReg_code_mask 0x1ff 1158 1159#define init_PushPopReg \ 1160{ \ 1161 PushPopReg_opcode, \ 1162 PushPopReg_reg_bits, PushPopReg_reg_mask, \ 1163 PushPopReg_grp_bits, PushPopReg_grp_mask, \ 1164 PushPopReg_W_bits, PushPopReg_W_mask, \ 1165 PushPopReg_code_bits, PushPopReg_code_mask, \ 1166}; 1167 1168/* linkage 1169+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1170| 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.| 1171|.framesize.....................................................| 1172+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1173*/ 1174 1175typedef struct 1176{ 1177 unsigned long opcode; 1178 int bits_framesize; 1179 int mask_framesize; 1180 int bits_R; 1181 int mask_R; 1182 int bits_code; 1183 int mask_code; 1184} Linkage; 1185 1186#define Linkage_opcode 0xe8000000 1187#define Linkage_framesize_bits 0 1188#define Linkage_framesize_mask 0xffff 1189#define Linkage_R_bits 16 1190#define Linkage_R_mask 0x1 1191#define Linkage_code_bits 17 1192#define Linkage_code_mask 0x7fff 1193 1194#define init_Linkage \ 1195{ \ 1196 Linkage_opcode, \ 1197 Linkage_framesize_bits, Linkage_framesize_mask, \ 1198 Linkage_R_bits, Linkage_R_mask, \ 1199 Linkage_code_bits, Linkage_code_mask \ 1200}; 1201 1202/* LoopSetup 1203+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1204| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......| 1205|.reg...........| - | - |.eoffset...............................| 1206+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1207*/ 1208 1209typedef struct 1210{ 1211 unsigned long opcode; 1212 int bits_eoffset; 1213 int mask_eoffset; 1214 int bits_dontcare; 1215 int mask_dontcare; 1216 int bits_reg; 1217 int mask_reg; 1218 int bits_soffset; 1219 int mask_soffset; 1220 int bits_c; 1221 int mask_c; 1222 int bits_rop; 1223 int mask_rop; 1224 int bits_code; 1225 int mask_code; 1226} LoopSetup; 1227 1228#define LoopSetup_opcode 0xe0800000 1229#define LoopSetup_eoffset_bits 0 1230#define LoopSetup_eoffset_mask 0x3ff 1231#define LoopSetup_dontcare_bits 10 1232#define LoopSetup_dontcare_mask 0x3 1233#define LoopSetup_reg_bits 12 1234#define LoopSetup_reg_mask 0xf 1235#define LoopSetup_soffset_bits 16 1236#define LoopSetup_soffset_mask 0xf 1237#define LoopSetup_c_bits 20 1238#define LoopSetup_c_mask 0x1 1239#define LoopSetup_rop_bits 21 1240#define LoopSetup_rop_mask 0x3 1241#define LoopSetup_code_bits 23 1242#define LoopSetup_code_mask 0x1ff 1243 1244#define init_LoopSetup \ 1245{ \ 1246 LoopSetup_opcode, \ 1247 LoopSetup_eoffset_bits, LoopSetup_eoffset_mask, \ 1248 LoopSetup_dontcare_bits, LoopSetup_dontcare_mask, \ 1249 LoopSetup_reg_bits, LoopSetup_reg_mask, \ 1250 LoopSetup_soffset_bits, LoopSetup_soffset_mask, \ 1251 LoopSetup_c_bits, LoopSetup_c_mask, \ 1252 LoopSetup_rop_bits, LoopSetup_rop_mask, \ 1253 LoopSetup_code_bits, LoopSetup_code_mask \ 1254}; 1255 1256/* LDIMMhalf 1257+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1258| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......| 1259|.hword.........................................................| 1260+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1261*/ 1262 1263typedef struct 1264{ 1265 unsigned long opcode; 1266 int bits_hword; 1267 int mask_hword; 1268 int bits_reg; 1269 int mask_reg; 1270 int bits_grp; 1271 int mask_grp; 1272 int bits_S; 1273 int mask_S; 1274 int bits_H; 1275 int mask_H; 1276 int bits_Z; 1277 int mask_Z; 1278 int bits_code; 1279 int mask_code; 1280} LDIMMhalf; 1281 1282#define LDIMMhalf_opcode 0xe1000000 1283#define LDIMMhalf_hword_bits 0 1284#define LDIMMhalf_hword_mask 0xffff 1285#define LDIMMhalf_reg_bits 16 1286#define LDIMMhalf_reg_mask 0x7 1287#define LDIMMhalf_grp_bits 19 1288#define LDIMMhalf_grp_mask 0x3 1289#define LDIMMhalf_S_bits 21 1290#define LDIMMhalf_S_mask 0x1 1291#define LDIMMhalf_H_bits 22 1292#define LDIMMhalf_H_mask 0x1 1293#define LDIMMhalf_Z_bits 23 1294#define LDIMMhalf_Z_mask 0x1 1295#define LDIMMhalf_code_bits 24 1296#define LDIMMhalf_code_mask 0xff 1297 1298#define init_LDIMMhalf \ 1299{ \ 1300 LDIMMhalf_opcode, \ 1301 LDIMMhalf_hword_bits, LDIMMhalf_hword_mask, \ 1302 LDIMMhalf_reg_bits, LDIMMhalf_reg_mask, \ 1303 LDIMMhalf_grp_bits, LDIMMhalf_grp_mask, \ 1304 LDIMMhalf_S_bits, LDIMMhalf_S_mask, \ 1305 LDIMMhalf_H_bits, LDIMMhalf_H_mask, \ 1306 LDIMMhalf_Z_bits, LDIMMhalf_Z_mask, \ 1307 LDIMMhalf_code_bits, LDIMMhalf_code_mask \ 1308}; 1309 1310 1311/* CC2dreg 1312+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1313| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......| 1314+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1315*/ 1316 1317typedef struct 1318{ 1319 unsigned short opcode; 1320 int bits_reg; 1321 int mask_reg; 1322 int bits_op; 1323 int mask_op; 1324 int bits_code; 1325 int mask_code; 1326} CC2dreg; 1327 1328#define CC2dreg_opcode 0x0200 1329#define CC2dreg_reg_bits 0 1330#define CC2dreg_reg_mask 0x7 1331#define CC2dreg_op_bits 3 1332#define CC2dreg_op_mask 0x3 1333#define CC2dreg_code_bits 5 1334#define CC2dreg_code_mask 0x7fff 1335 1336#define init_CC2dreg \ 1337{ \ 1338 CC2dreg_opcode, \ 1339 CC2dreg_reg_bits, CC2dreg_reg_mask, \ 1340 CC2dreg_op_bits, CC2dreg_op_mask, \ 1341 CC2dreg_code_bits, CC2dreg_code_mask \ 1342}; 1343 1344 1345/* PTR2op 1346+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1347| 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......| 1348+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1349*/ 1350 1351typedef struct 1352{ 1353 unsigned short opcode; 1354 int bits_dst; 1355 int mask_dst; 1356 int bits_src; 1357 int mask_src; 1358 int bits_opc; 1359 int mask_opc; 1360 int bits_code; 1361 int mask_code; 1362} PTR2op; 1363 1364#define PTR2op_opcode 0x4400 1365#define PTR2op_dst_bits 0 1366#define PTR2op_dst_mask 0x7 1367#define PTR2op_src_bits 3 1368#define PTR2op_src_mask 0x7 1369#define PTR2op_opc_bits 6 1370#define PTR2op_opc_mask 0x7 1371#define PTR2op_code_bits 9 1372#define PTR2op_code_mask 0x7f 1373 1374#define init_PTR2op \ 1375{ \ 1376 PTR2op_opcode, \ 1377 PTR2op_dst_bits, PTR2op_dst_mask, \ 1378 PTR2op_src_bits, PTR2op_src_mask, \ 1379 PTR2op_opc_bits, PTR2op_opc_mask, \ 1380 PTR2op_code_bits, PTR2op_code_mask \ 1381}; 1382 1383 1384/* COMP3op 1385+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1386| 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......| 1387+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1388*/ 1389 1390typedef struct 1391{ 1392 unsigned short opcode; 1393 int bits_src0; 1394 int mask_src0; 1395 int bits_src1; 1396 int mask_src1; 1397 int bits_dst; 1398 int mask_dst; 1399 int bits_opc; 1400 int mask_opc; 1401 int bits_code; 1402 int mask_code; 1403} COMP3op; 1404 1405#define COMP3op_opcode 0x5000 1406#define COMP3op_src0_bits 0 1407#define COMP3op_src0_mask 0x7 1408#define COMP3op_src1_bits 3 1409#define COMP3op_src1_mask 0x7 1410#define COMP3op_dst_bits 6 1411#define COMP3op_dst_mask 0x7 1412#define COMP3op_opc_bits 9 1413#define COMP3op_opc_mask 0x7 1414#define COMP3op_code_bits 12 1415#define COMP3op_code_mask 0xf 1416 1417#define init_COMP3op \ 1418{ \ 1419 COMP3op_opcode, \ 1420 COMP3op_src0_bits, COMP3op_src0_mask, \ 1421 COMP3op_src1_bits, COMP3op_src1_mask, \ 1422 COMP3op_dst_bits, COMP3op_dst_mask, \ 1423 COMP3op_opc_bits, COMP3op_opc_mask, \ 1424 COMP3op_code_bits, COMP3op_code_mask \ 1425}; 1426 1427/* ccMV 1428+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1429| 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......| 1430+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1431*/ 1432 1433typedef struct 1434{ 1435 unsigned short opcode; 1436 int bits_src; 1437 int mask_src; 1438 int bits_dst; 1439 int mask_dst; 1440 int bits_s; 1441 int mask_s; 1442 int bits_d; 1443 int mask_d; 1444 int bits_T; 1445 int mask_T; 1446 int bits_code; 1447 int mask_code; 1448} CCmv; 1449 1450#define CCmv_opcode 0x0600 1451#define CCmv_src_bits 0 1452#define CCmv_src_mask 0x7 1453#define CCmv_dst_bits 3 1454#define CCmv_dst_mask 0x7 1455#define CCmv_s_bits 6 1456#define CCmv_s_mask 0x1 1457#define CCmv_d_bits 7 1458#define CCmv_d_mask 0x1 1459#define CCmv_T_bits 8 1460#define CCmv_T_mask 0x1 1461#define CCmv_code_bits 9 1462#define CCmv_code_mask 0x7f 1463 1464#define init_CCmv \ 1465{ \ 1466 CCmv_opcode, \ 1467 CCmv_src_bits, CCmv_src_mask, \ 1468 CCmv_dst_bits, CCmv_dst_mask, \ 1469 CCmv_s_bits, CCmv_s_mask, \ 1470 CCmv_d_bits, CCmv_d_mask, \ 1471 CCmv_T_bits, CCmv_T_mask, \ 1472 CCmv_code_bits, CCmv_code_mask \ 1473}; 1474 1475 1476/* CCflag 1477+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1478| 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........| 1479+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1480*/ 1481 1482typedef struct 1483{ 1484 unsigned short opcode; 1485 int bits_x; 1486 int mask_x; 1487 int bits_y; 1488 int mask_y; 1489 int bits_G; 1490 int mask_G; 1491 int bits_opc; 1492 int mask_opc; 1493 int bits_I; 1494 int mask_I; 1495 int bits_code; 1496 int mask_code; 1497} CCflag; 1498 1499#define CCflag_opcode 0x0800 1500#define CCflag_x_bits 0 1501#define CCflag_x_mask 0x7 1502#define CCflag_y_bits 3 1503#define CCflag_y_mask 0x7 1504#define CCflag_G_bits 6 1505#define CCflag_G_mask 0x1 1506#define CCflag_opc_bits 7 1507#define CCflag_opc_mask 0x7 1508#define CCflag_I_bits 10 1509#define CCflag_I_mask 0x1 1510#define CCflag_code_bits 11 1511#define CCflag_code_mask 0x1f 1512 1513#define init_CCflag \ 1514{ \ 1515 CCflag_opcode, \ 1516 CCflag_x_bits, CCflag_x_mask, \ 1517 CCflag_y_bits, CCflag_y_mask, \ 1518 CCflag_G_bits, CCflag_G_mask, \ 1519 CCflag_opc_bits, CCflag_opc_mask, \ 1520 CCflag_I_bits, CCflag_I_mask, \ 1521 CCflag_code_bits, CCflag_code_mask, \ 1522}; 1523 1524 1525/* CC2stat 1526+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1527| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............| 1528+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1529*/ 1530 1531typedef struct 1532{ 1533 unsigned short opcode; 1534 int bits_cbit; 1535 int mask_cbit; 1536 int bits_op; 1537 int mask_op; 1538 int bits_D; 1539 int mask_D; 1540 int bits_code; 1541 int mask_code; 1542} CC2stat; 1543 1544#define CC2stat_opcode 0x0300 1545#define CC2stat_cbit_bits 0 1546#define CC2stat_cbit_mask 0x1f 1547#define CC2stat_op_bits 5 1548#define CC2stat_op_mask 0x3 1549#define CC2stat_D_bits 7 1550#define CC2stat_D_mask 0x1 1551#define CC2stat_code_bits 8 1552#define CC2stat_code_mask 0xff 1553 1554#define init_CC2stat \ 1555{ \ 1556 CC2stat_opcode, \ 1557 CC2stat_cbit_bits, CC2stat_cbit_mask, \ 1558 CC2stat_op_bits, CC2stat_op_mask, \ 1559 CC2stat_D_bits, CC2stat_D_mask, \ 1560 CC2stat_code_bits, CC2stat_code_mask \ 1561}; 1562 1563 1564/* REGMV 1565+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1566| 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......| 1567+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1568*/ 1569 1570typedef struct 1571{ 1572 unsigned short opcode; 1573 int bits_src; 1574 int mask_src; 1575 int bits_dst; 1576 int mask_dst; 1577 int bits_gs; 1578 int mask_gs; 1579 int bits_gd; 1580 int mask_gd; 1581 int bits_code; 1582 int mask_code; 1583} RegMv; 1584 1585#define RegMv_opcode 0x3000 1586#define RegMv_src_bits 0 1587#define RegMv_src_mask 0x7 1588#define RegMv_dst_bits 3 1589#define RegMv_dst_mask 0x7 1590#define RegMv_gs_bits 6 1591#define RegMv_gs_mask 0x7 1592#define RegMv_gd_bits 9 1593#define RegMv_gd_mask 0x7 1594#define RegMv_code_bits 12 1595#define RegMv_code_mask 0xf 1596 1597#define init_RegMv \ 1598{ \ 1599 RegMv_opcode, \ 1600 RegMv_src_bits, RegMv_src_mask, \ 1601 RegMv_dst_bits, RegMv_dst_mask, \ 1602 RegMv_gs_bits, RegMv_gs_mask, \ 1603 RegMv_gd_bits, RegMv_gd_mask, \ 1604 RegMv_code_bits, RegMv_code_mask \ 1605}; 1606 1607 1608/* COMPI2opD 1609+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1610| 0 | 1 | 1 | 0 | 0 |.op|.isrc......................|.dst.......| 1611+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1612*/ 1613 1614typedef struct 1615{ 1616 unsigned short opcode; 1617 int bits_dst; 1618 int mask_dst; 1619 int bits_src; 1620 int mask_src; 1621 int bits_op; 1622 int mask_op; 1623 int bits_code; 1624 int mask_code; 1625} COMPI2opD; 1626 1627#define COMPI2opD_opcode 0x6000 1628#define COMPI2opD_dst_bits 0 1629#define COMPI2opD_dst_mask 0x7 1630#define COMPI2opD_src_bits 3 1631#define COMPI2opD_src_mask 0x7f 1632#define COMPI2opD_op_bits 10 1633#define COMPI2opD_op_mask 0x1 1634#define COMPI2opD_code_bits 11 1635#define COMPI2opD_code_mask 0x1f 1636 1637#define init_COMPI2opD \ 1638{ \ 1639 COMPI2opD_opcode, \ 1640 COMPI2opD_dst_bits, COMPI2opD_dst_mask, \ 1641 COMPI2opD_src_bits, COMPI2opD_src_mask, \ 1642 COMPI2opD_op_bits, COMPI2opD_op_mask, \ 1643 COMPI2opD_code_bits, COMPI2opD_code_mask \ 1644}; 1645 1646/* COMPI2opP 1647+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1648| 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......| 1649+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1650*/ 1651 1652typedef COMPI2opD COMPI2opP; 1653 1654#define COMPI2opP_opcode 0x6800 1655#define COMPI2opP_dst_bits 0 1656#define COMPI2opP_dst_mask 0x7 1657#define COMPI2opP_src_bits 3 1658#define COMPI2opP_src_mask 0x7f 1659#define COMPI2opP_op_bits 10 1660#define COMPI2opP_op_mask 0x1 1661#define COMPI2opP_code_bits 11 1662#define COMPI2opP_code_mask 0x1f 1663 1664#define init_COMPI2opP \ 1665{ \ 1666 COMPI2opP_opcode, \ 1667 COMPI2opP_dst_bits, COMPI2opP_dst_mask, \ 1668 COMPI2opP_src_bits, COMPI2opP_src_mask, \ 1669 COMPI2opP_op_bits, COMPI2opP_op_mask, \ 1670 COMPI2opP_code_bits, COMPI2opP_code_mask \ 1671}; 1672 1673 1674/* dagMODim 1675+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1676| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....| 1677+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1678*/ 1679 1680typedef struct 1681{ 1682 unsigned short opcode; 1683 int bits_i; 1684 int mask_i; 1685 int bits_m; 1686 int mask_m; 1687 int bits_op; 1688 int mask_op; 1689 int bits_code2; 1690 int mask_code2; 1691 int bits_br; 1692 int mask_br; 1693 int bits_code; 1694 int mask_code; 1695} DagMODim; 1696 1697#define DagMODim_opcode 0x9e60 1698#define DagMODim_i_bits 0 1699#define DagMODim_i_mask 0x3 1700#define DagMODim_m_bits 2 1701#define DagMODim_m_mask 0x3 1702#define DagMODim_op_bits 4 1703#define DagMODim_op_mask 0x1 1704#define DagMODim_code2_bits 5 1705#define DagMODim_code2_mask 0x3 1706#define DagMODim_br_bits 7 1707#define DagMODim_br_mask 0x1 1708#define DagMODim_code_bits 8 1709#define DagMODim_code_mask 0xff 1710 1711#define init_DagMODim \ 1712{ \ 1713 DagMODim_opcode, \ 1714 DagMODim_i_bits, DagMODim_i_mask, \ 1715 DagMODim_m_bits, DagMODim_m_mask, \ 1716 DagMODim_op_bits, DagMODim_op_mask, \ 1717 DagMODim_code2_bits, DagMODim_code2_mask, \ 1718 DagMODim_br_bits, DagMODim_br_mask, \ 1719 DagMODim_code_bits, DagMODim_code_mask \ 1720}; 1721 1722/* dagMODik 1723+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1724| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....| 1725+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1726*/ 1727 1728typedef struct 1729{ 1730 unsigned short opcode; 1731 int bits_i; 1732 int mask_i; 1733 int bits_op; 1734 int mask_op; 1735 int bits_code; 1736 int mask_code; 1737} DagMODik; 1738 1739#define DagMODik_opcode 0x9f60 1740#define DagMODik_i_bits 0 1741#define DagMODik_i_mask 0x3 1742#define DagMODik_op_bits 2 1743#define DagMODik_op_mask 0x3 1744#define DagMODik_code_bits 3 1745#define DagMODik_code_mask 0xfff 1746 1747#define init_DagMODik \ 1748{ \ 1749 DagMODik_opcode, \ 1750 DagMODik_i_bits, DagMODik_i_mask, \ 1751 DagMODik_op_bits, DagMODik_op_mask, \ 1752 DagMODik_code_bits, DagMODik_code_mask \ 1753}; 1754 1755#endif 1756