1226031Sstas/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. 2226031Sstas 3226031Sstas Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 4226031Sstas 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011 5226031Sstas Free Software Foundation, Inc. 6226031Sstas 7226031Sstas This file is part of GDB. 8226031Sstas 9226031Sstas This program is free software; you can redistribute it and/or modify 10226031Sstas it under the terms of the GNU General Public License as published by 11226031Sstas the Free Software Foundation; either version 3 of the License, or 12226031Sstas (at your option) any later version. 13226031Sstas 14226031Sstas This program is distributed in the hope that it will be useful, 15226031Sstas but WITHOUT ANY WARRANTY; without even the implied warranty of 16226031Sstas MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17226031Sstas GNU General Public License for more details. 18226031Sstas 19226031Sstas You should have received a copy of the GNU General Public License 20226031Sstas along with this program. If not, see <http://www.gnu.org/licenses/>. */ 21226031Sstas 22226031Sstas#include "defs.h" 23226031Sstas#include "doublest.h" 24226031Sstas#include "frame.h" 25226031Sstas#include "frame-unwind.h" 26226031Sstas#include "frame-base.h" 27226031Sstas#include "dwarf2-frame.h" 28226031Sstas#include "inferior.h" 29226031Sstas#include "symtab.h" 30226031Sstas#include "value.h" 31226031Sstas#include "gdbcmd.h" 32226031Sstas#include "gdbcore.h" 33226031Sstas#include "dis-asm.h" 34226031Sstas#include "symfile.h" 35226031Sstas#include "objfiles.h" 36226031Sstas#include "gdb_string.h" 37226031Sstas#include "linespec.h" 38226031Sstas#include "regcache.h" 39226031Sstas#include "reggroups.h" 40226031Sstas#include "arch-utils.h" 41226031Sstas#include "osabi.h" 42226031Sstas#include "block.h" 43226031Sstas#include "infcall.h" 44226031Sstas#include "trad-frame.h" 45226031Sstas 46226031Sstas#include "elf-bfd.h" 47226031Sstas 48226031Sstas#include "alpha-tdep.h" 49226031Sstas 50226031Sstas/* Instruction decoding. The notations for registers, immediates and 51226031Sstas opcodes are the same as the one used in Compaq's Alpha architecture 52226031Sstas handbook. */ 53226031Sstas 54226031Sstas#define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26) 55226031Sstas 56226031Sstas/* Memory instruction format */ 57226031Sstas#define MEM_RA(insn) ((insn & 0x03e00000) >> 21) 58226031Sstas#define MEM_RB(insn) ((insn & 0x001f0000) >> 16) 59226031Sstas#define MEM_DISP(insn) \ 60226031Sstas (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff)) 61226031Sstas 62226031Sstasstatic const int lda_opcode = 0x08; 63226031Sstasstatic const int stq_opcode = 0x2d; 64226031Sstas 65226031Sstas/* Branch instruction format */ 66226031Sstas#define BR_RA(insn) MEM_RA(insn) 67226031Sstas 68226031Sstasstatic const int bne_opcode = 0x3d; 69226031Sstas 70226031Sstas/* Operate instruction format */ 71226031Sstas#define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5) 72226031Sstas#define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000) 73226031Sstas#define OPR_RA(insn) MEM_RA(insn) 74226031Sstas#define OPR_RC(insn) ((insn & 0x1f)) 75226031Sstas#define OPR_LIT(insn) ((insn & 0x1fe000) >> 13) 76226031Sstas 77226031Sstasstatic const int subq_opcode = 0x10; 78226031Sstasstatic const int subq_function = 0x29; 79226031Sstas 80226031Sstas 81226031Sstas/* Return the name of the REGNO register. 82226031Sstas 83226031Sstas An empty name corresponds to a register number that used to 84226031Sstas be used for a virtual register. That virtual register has 85226031Sstas been removed, but the index is still reserved to maintain 86226031Sstas compatibility with existing remote alpha targets. */ 87226031Sstas 88226031Sstasstatic const char * 89226031Sstasalpha_register_name (struct gdbarch *gdbarch, int regno) 90226031Sstas{ 91226031Sstas static const char * const register_names[] = 92226031Sstas { 93226031Sstas "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", 94226031Sstas "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", 95226031Sstas "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", 96226031Sstas "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", 97226031Sstas "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 98226031Sstas "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 99226031Sstas "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 100226031Sstas "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", 101226031Sstas "pc", "", "unique" 102226031Sstas }; 103226031Sstas 104226031Sstas if (regno < 0) 105226031Sstas return NULL; 106226031Sstas if (regno >= ARRAY_SIZE(register_names)) 107226031Sstas return NULL; 108226031Sstas return register_names[regno]; 109226031Sstas} 110226031Sstas 111226031Sstasstatic int 112226031Sstasalpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno) 113226031Sstas{ 114226031Sstas return (strlen (alpha_register_name (gdbarch, regno)) == 0); 115226031Sstas} 116226031Sstas 117226031Sstasstatic int 118226031Sstasalpha_cannot_store_register (struct gdbarch *gdbarch, int regno) 119226031Sstas{ 120226031Sstas return (regno == ALPHA_ZERO_REGNUM 121226031Sstas || strlen (alpha_register_name (gdbarch, regno)) == 0); 122226031Sstas} 123226031Sstas 124226031Sstasstatic struct type * 125226031Sstasalpha_register_type (struct gdbarch *gdbarch, int regno) 126226031Sstas{ 127226031Sstas if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) 128226031Sstas return builtin_type (gdbarch)->builtin_data_ptr; 129226031Sstas if (regno == ALPHA_PC_REGNUM) 130226031Sstas return builtin_type (gdbarch)->builtin_func_ptr; 131226031Sstas 132226031Sstas /* Don't need to worry about little vs big endian until 133226031Sstas some jerk tries to port to alpha-unicosmk. */ 134226031Sstas if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) 135226031Sstas return builtin_type (gdbarch)->builtin_double; 136226031Sstas 137226031Sstas return builtin_type (gdbarch)->builtin_int64; 138226031Sstas} 139226031Sstas 140226031Sstas/* Is REGNUM a member of REGGROUP? */ 141226031Sstas 142226031Sstasstatic int 143226031Sstasalpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, 144226031Sstas struct reggroup *group) 145226031Sstas{ 146226031Sstas /* Filter out any registers eliminated, but whose regnum is 147226031Sstas reserved for backward compatibility, e.g. the vfp. */ 148226031Sstas if (gdbarch_register_name (gdbarch, regnum) == NULL 149226031Sstas || *gdbarch_register_name (gdbarch, regnum) == '\0') 150226031Sstas return 0; 151226031Sstas 152226031Sstas if (group == all_reggroup) 153226031Sstas return 1; 154226031Sstas 155226031Sstas /* Zero should not be saved or restored. Technically it is a general 156226031Sstas register (just as $f31 would be a float if we represented it), but 157226031Sstas there's no point displaying it during "info regs", so leave it out 158226031Sstas of all groups except for "all". */ 159226031Sstas if (regnum == ALPHA_ZERO_REGNUM) 160226031Sstas return 0; 161226031Sstas 162226031Sstas /* All other registers are saved and restored. */ 163226031Sstas if (group == save_reggroup || group == restore_reggroup) 164226031Sstas return 1; 165226031Sstas 166226031Sstas /* All other groups are non-overlapping. */ 167226031Sstas 168226031Sstas /* Since this is really a PALcode memory slot... */ 169226031Sstas if (regnum == ALPHA_UNIQUE_REGNUM) 170226031Sstas return group == system_reggroup; 171226031Sstas 172226031Sstas /* Force the FPCR to be considered part of the floating point state. */ 173226031Sstas if (regnum == ALPHA_FPCR_REGNUM) 174226031Sstas return group == float_reggroup; 175226031Sstas 176226031Sstas if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) 177226031Sstas return group == float_reggroup; 178226031Sstas else 179226031Sstas return group == general_reggroup; 180226031Sstas} 181226031Sstas 182226031Sstas/* The following represents exactly the conversion performed by 183226031Sstas the LDS instruction. This applies to both single-precision 184226031Sstas floating point and 32-bit integers. */ 185226031Sstas 186226031Sstasstatic void 187226031Sstasalpha_lds (struct gdbarch *gdbarch, void *out, const void *in) 188226031Sstas{ 189226031Sstas enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 190226031Sstas ULONGEST mem = extract_unsigned_integer (in, 4, byte_order); 191226031Sstas ULONGEST frac = (mem >> 0) & 0x7fffff; 192226031Sstas ULONGEST sign = (mem >> 31) & 1; 193226031Sstas ULONGEST exp_msb = (mem >> 30) & 1; 194226031Sstas ULONGEST exp_low = (mem >> 23) & 0x7f; 195226031Sstas ULONGEST exp, reg; 196226031Sstas 197226031Sstas exp = (exp_msb << 10) | exp_low; 198226031Sstas if (exp_msb) 199226031Sstas { 200226031Sstas if (exp_low == 0x7f) 201226031Sstas exp = 0x7ff; 202226031Sstas } 203226031Sstas else 204226031Sstas { 205226031Sstas if (exp_low != 0x00) 206226031Sstas exp |= 0x380; 207226031Sstas } 208226031Sstas 209226031Sstas reg = (sign << 63) | (exp << 52) | (frac << 29); 210226031Sstas store_unsigned_integer (out, 8, byte_order, reg); 211226031Sstas} 212226031Sstas 213226031Sstas/* Similarly, this represents exactly the conversion performed by 214226031Sstas the STS instruction. */ 215226031Sstas 216226031Sstasstatic void 217226031Sstasalpha_sts (struct gdbarch *gdbarch, void *out, const void *in) 218226031Sstas{ 219226031Sstas enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 220226031Sstas ULONGEST reg, mem; 221226031Sstas 222226031Sstas reg = extract_unsigned_integer (in, 8, byte_order); 223226031Sstas mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); 224226031Sstas store_unsigned_integer (out, 4, byte_order, mem); 225226031Sstas} 226226031Sstas 227226031Sstas/* The alpha needs a conversion between register and memory format if the 228226031Sstas register is a floating point register and memory format is float, as the 229226031Sstas register format must be double or memory format is an integer with 4 230226031Sstas bytes or less, as the representation of integers in floating point 231226031Sstas registers is different. */ 232226031Sstas 233226031Sstasstatic int 234226031Sstasalpha_convert_register_p (struct gdbarch *gdbarch, int regno, 235226031Sstas struct type *type) 236226031Sstas{ 237226031Sstas return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31 238226031Sstas && TYPE_LENGTH (type) != 8); 239226031Sstas} 240 241static int 242alpha_register_to_value (struct frame_info *frame, int regnum, 243 struct type *valtype, gdb_byte *out, 244 int *optimizedp, int *unavailablep) 245{ 246 struct gdbarch *gdbarch = get_frame_arch (frame); 247 gdb_byte in[MAX_REGISTER_SIZE]; 248 249 /* Convert to TYPE. */ 250 if (!get_frame_register_bytes (frame, regnum, 0, 251 register_size (gdbarch, regnum), 252 in, optimizedp, unavailablep)) 253 return 0; 254 255 if (TYPE_LENGTH (valtype) == 4) 256 { 257 alpha_sts (gdbarch, out, in); 258 *optimizedp = *unavailablep = 0; 259 return 1; 260 } 261 262 error (_("Cannot retrieve value from floating point register")); 263} 264 265static void 266alpha_value_to_register (struct frame_info *frame, int regnum, 267 struct type *valtype, const gdb_byte *in) 268{ 269 gdb_byte out[MAX_REGISTER_SIZE]; 270 271 switch (TYPE_LENGTH (valtype)) 272 { 273 case 4: 274 alpha_lds (get_frame_arch (frame), out, in); 275 break; 276 default: 277 error (_("Cannot store value in floating point register")); 278 } 279 put_frame_register (frame, regnum, out); 280} 281 282 283/* The alpha passes the first six arguments in the registers, the rest on 284 the stack. The register arguments are stored in ARG_REG_BUFFER, and 285 then moved into the register file; this simplifies the passing of a 286 large struct which extends from the registers to the stack, plus avoids 287 three ptrace invocations per word. 288 289 We don't bother tracking which register values should go in integer 290 regs or fp regs; we load the same values into both. 291 292 If the called function is returning a structure, the address of the 293 structure to be returned is passed as a hidden first argument. */ 294 295static CORE_ADDR 296alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 297 struct regcache *regcache, CORE_ADDR bp_addr, 298 int nargs, struct value **args, CORE_ADDR sp, 299 int struct_return, CORE_ADDR struct_addr) 300{ 301 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 302 int i; 303 int accumulate_size = struct_return ? 8 : 0; 304 struct alpha_arg 305 { 306 const gdb_byte *contents; 307 int len; 308 int offset; 309 }; 310 struct alpha_arg *alpha_args 311 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); 312 struct alpha_arg *m_arg; 313 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; 314 int required_arg_regs; 315 CORE_ADDR func_addr = find_function_addr (function, NULL); 316 317 /* The ABI places the address of the called function in T12. */ 318 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); 319 320 /* Set the return address register to point to the entry point 321 of the program, where a breakpoint lies in wait. */ 322 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); 323 324 /* Lay out the arguments in memory. */ 325 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) 326 { 327 struct value *arg = args[i]; 328 struct type *arg_type = check_typedef (value_type (arg)); 329 330 /* Cast argument to long if necessary as the compiler does it too. */ 331 switch (TYPE_CODE (arg_type)) 332 { 333 case TYPE_CODE_INT: 334 case TYPE_CODE_BOOL: 335 case TYPE_CODE_CHAR: 336 case TYPE_CODE_RANGE: 337 case TYPE_CODE_ENUM: 338 if (TYPE_LENGTH (arg_type) == 4) 339 { 340 /* 32-bit values must be sign-extended to 64 bits 341 even if the base data type is unsigned. */ 342 arg_type = builtin_type (gdbarch)->builtin_int32; 343 arg = value_cast (arg_type, arg); 344 } 345 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) 346 { 347 arg_type = builtin_type (gdbarch)->builtin_int64; 348 arg = value_cast (arg_type, arg); 349 } 350 break; 351 352 case TYPE_CODE_FLT: 353 /* "float" arguments loaded in registers must be passed in 354 register format, aka "double". */ 355 if (accumulate_size < sizeof (arg_reg_buffer) 356 && TYPE_LENGTH (arg_type) == 4) 357 { 358 arg_type = builtin_type (gdbarch)->builtin_double; 359 arg = value_cast (arg_type, arg); 360 } 361 /* Tru64 5.1 has a 128-bit long double, and passes this by 362 invisible reference. No one else uses this data type. */ 363 else if (TYPE_LENGTH (arg_type) == 16) 364 { 365 /* Allocate aligned storage. */ 366 sp = (sp & -16) - 16; 367 368 /* Write the real data into the stack. */ 369 write_memory (sp, value_contents (arg), 16); 370 371 /* Construct the indirection. */ 372 arg_type = lookup_pointer_type (arg_type); 373 arg = value_from_pointer (arg_type, sp); 374 } 375 break; 376 377 case TYPE_CODE_COMPLEX: 378 /* ??? The ABI says that complex values are passed as two 379 separate scalar values. This distinction only matters 380 for complex float. However, GCC does not implement this. */ 381 382 /* Tru64 5.1 has a 128-bit long double, and passes this by 383 invisible reference. */ 384 if (TYPE_LENGTH (arg_type) == 32) 385 { 386 /* Allocate aligned storage. */ 387 sp = (sp & -16) - 16; 388 389 /* Write the real data into the stack. */ 390 write_memory (sp, value_contents (arg), 32); 391 392 /* Construct the indirection. */ 393 arg_type = lookup_pointer_type (arg_type); 394 arg = value_from_pointer (arg_type, sp); 395 } 396 break; 397 398 default: 399 break; 400 } 401 m_arg->len = TYPE_LENGTH (arg_type); 402 m_arg->offset = accumulate_size; 403 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; 404 m_arg->contents = value_contents (arg); 405 } 406 407 /* Determine required argument register loads, loading an argument register 408 is expensive as it uses three ptrace calls. */ 409 required_arg_regs = accumulate_size / 8; 410 if (required_arg_regs > ALPHA_NUM_ARG_REGS) 411 required_arg_regs = ALPHA_NUM_ARG_REGS; 412 413 /* Make room for the arguments on the stack. */ 414 if (accumulate_size < sizeof(arg_reg_buffer)) 415 accumulate_size = 0; 416 else 417 accumulate_size -= sizeof(arg_reg_buffer); 418 sp -= accumulate_size; 419 420 /* Keep sp aligned to a multiple of 16 as the ABI requires. */ 421 sp &= ~15; 422 423 /* `Push' arguments on the stack. */ 424 for (i = nargs; m_arg--, --i >= 0;) 425 { 426 const gdb_byte *contents = m_arg->contents; 427 int offset = m_arg->offset; 428 int len = m_arg->len; 429 430 /* Copy the bytes destined for registers into arg_reg_buffer. */ 431 if (offset < sizeof(arg_reg_buffer)) 432 { 433 if (offset + len <= sizeof(arg_reg_buffer)) 434 { 435 memcpy (arg_reg_buffer + offset, contents, len); 436 continue; 437 } 438 else 439 { 440 int tlen = sizeof(arg_reg_buffer) - offset; 441 memcpy (arg_reg_buffer + offset, contents, tlen); 442 offset += tlen; 443 contents += tlen; 444 len -= tlen; 445 } 446 } 447 448 /* Everything else goes to the stack. */ 449 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); 450 } 451 if (struct_return) 452 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, 453 byte_order, struct_addr); 454 455 /* Load the argument registers. */ 456 for (i = 0; i < required_arg_regs; i++) 457 { 458 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, 459 arg_reg_buffer + i*ALPHA_REGISTER_SIZE); 460 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, 461 arg_reg_buffer + i*ALPHA_REGISTER_SIZE); 462 } 463 464 /* Finally, update the stack pointer. */ 465 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); 466 467 return sp; 468} 469 470/* Extract from REGCACHE the value about to be returned from a function 471 and copy it into VALBUF. */ 472 473static void 474alpha_extract_return_value (struct type *valtype, struct regcache *regcache, 475 gdb_byte *valbuf) 476{ 477 struct gdbarch *gdbarch = get_regcache_arch (regcache); 478 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 479 int length = TYPE_LENGTH (valtype); 480 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; 481 ULONGEST l; 482 483 switch (TYPE_CODE (valtype)) 484 { 485 case TYPE_CODE_FLT: 486 switch (length) 487 { 488 case 4: 489 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); 490 alpha_sts (gdbarch, valbuf, raw_buffer); 491 break; 492 493 case 8: 494 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 495 break; 496 497 case 16: 498 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); 499 read_memory (l, valbuf, 16); 500 break; 501 502 default: 503 internal_error (__FILE__, __LINE__, 504 _("unknown floating point width")); 505 } 506 break; 507 508 case TYPE_CODE_COMPLEX: 509 switch (length) 510 { 511 case 8: 512 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ 513 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 514 break; 515 516 case 16: 517 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 518 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); 519 break; 520 521 case 32: 522 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); 523 read_memory (l, valbuf, 32); 524 break; 525 526 default: 527 internal_error (__FILE__, __LINE__, 528 _("unknown floating point width")); 529 } 530 break; 531 532 default: 533 /* Assume everything else degenerates to an integer. */ 534 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); 535 store_unsigned_integer (valbuf, length, byte_order, l); 536 break; 537 } 538} 539 540/* Insert the given value into REGCACHE as if it was being 541 returned by a function. */ 542 543static void 544alpha_store_return_value (struct type *valtype, struct regcache *regcache, 545 const gdb_byte *valbuf) 546{ 547 struct gdbarch *gdbarch = get_regcache_arch (regcache); 548 int length = TYPE_LENGTH (valtype); 549 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; 550 ULONGEST l; 551 552 switch (TYPE_CODE (valtype)) 553 { 554 case TYPE_CODE_FLT: 555 switch (length) 556 { 557 case 4: 558 alpha_lds (gdbarch, raw_buffer, valbuf); 559 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); 560 break; 561 562 case 8: 563 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 564 break; 565 566 case 16: 567 /* FIXME: 128-bit long doubles are returned like structures: 568 by writing into indirect storage provided by the caller 569 as the first argument. */ 570 error (_("Cannot set a 128-bit long double return value.")); 571 572 default: 573 internal_error (__FILE__, __LINE__, 574 _("unknown floating point width")); 575 } 576 break; 577 578 case TYPE_CODE_COMPLEX: 579 switch (length) 580 { 581 case 8: 582 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ 583 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 584 break; 585 586 case 16: 587 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 588 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); 589 break; 590 591 case 32: 592 /* FIXME: 128-bit long doubles are returned like structures: 593 by writing into indirect storage provided by the caller 594 as the first argument. */ 595 error (_("Cannot set a 128-bit long double return value.")); 596 597 default: 598 internal_error (__FILE__, __LINE__, 599 _("unknown floating point width")); 600 } 601 break; 602 603 default: 604 /* Assume everything else degenerates to an integer. */ 605 /* 32-bit values must be sign-extended to 64 bits 606 even if the base data type is unsigned. */ 607 if (length == 4) 608 valtype = builtin_type (gdbarch)->builtin_int32; 609 l = unpack_long (valtype, valbuf); 610 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); 611 break; 612 } 613} 614 615static enum return_value_convention 616alpha_return_value (struct gdbarch *gdbarch, struct type *func_type, 617 struct type *type, struct regcache *regcache, 618 gdb_byte *readbuf, const gdb_byte *writebuf) 619{ 620 enum type_code code = TYPE_CODE (type); 621 622 if ((code == TYPE_CODE_STRUCT 623 || code == TYPE_CODE_UNION 624 || code == TYPE_CODE_ARRAY) 625 && gdbarch_tdep (gdbarch)->return_in_memory (type)) 626 { 627 if (readbuf) 628 { 629 ULONGEST addr; 630 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); 631 read_memory (addr, readbuf, TYPE_LENGTH (type)); 632 } 633 634 return RETURN_VALUE_ABI_RETURNS_ADDRESS; 635 } 636 637 if (readbuf) 638 alpha_extract_return_value (type, regcache, readbuf); 639 if (writebuf) 640 alpha_store_return_value (type, regcache, writebuf); 641 642 return RETURN_VALUE_REGISTER_CONVENTION; 643} 644 645static int 646alpha_return_in_memory_always (struct type *type) 647{ 648 return 1; 649} 650 651static const gdb_byte * 652alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) 653{ 654 static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */ 655 656 *len = sizeof(break_insn); 657 return break_insn; 658} 659 660 661/* This returns the PC of the first insn after the prologue. 662 If we can't find the prologue, then return 0. */ 663 664CORE_ADDR 665alpha_after_prologue (CORE_ADDR pc) 666{ 667 struct symtab_and_line sal; 668 CORE_ADDR func_addr, func_end; 669 670 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 671 return 0; 672 673 sal = find_pc_line (func_addr, 0); 674 if (sal.end < func_end) 675 return sal.end; 676 677 /* The line after the prologue is after the end of the function. In this 678 case, tell the caller to find the prologue the hard way. */ 679 return 0; 680} 681 682/* Read an instruction from memory at PC, looking through breakpoints. */ 683 684unsigned int 685alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc) 686{ 687 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 688 gdb_byte buf[ALPHA_INSN_SIZE]; 689 int status; 690 691 status = target_read_memory (pc, buf, sizeof (buf)); 692 if (status) 693 memory_error (status, pc); 694 return extract_unsigned_integer (buf, sizeof (buf), byte_order); 695} 696 697/* To skip prologues, I use this predicate. Returns either PC itself 698 if the code at PC does not look like a function prologue; otherwise 699 returns an address that (if we're lucky) follows the prologue. If 700 LENIENT, then we must skip everything which is involved in setting 701 up the frame (it's OK to skip more, just so long as we don't skip 702 anything which might clobber the registers which are being saved. */ 703 704static CORE_ADDR 705alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 706{ 707 unsigned long inst; 708 int offset; 709 CORE_ADDR post_prologue_pc; 710 gdb_byte buf[ALPHA_INSN_SIZE]; 711 712 /* Silently return the unaltered pc upon memory errors. 713 This could happen on OSF/1 if decode_line_1 tries to skip the 714 prologue for quickstarted shared library functions when the 715 shared library is not yet mapped in. 716 Reading target memory is slow over serial lines, so we perform 717 this check only if the target has shared libraries (which all 718 Alpha targets do). */ 719 if (target_read_memory (pc, buf, sizeof (buf))) 720 return pc; 721 722 /* See if we can determine the end of the prologue via the symbol table. 723 If so, then return either PC, or the PC after the prologue, whichever 724 is greater. */ 725 726 post_prologue_pc = alpha_after_prologue (pc); 727 if (post_prologue_pc != 0) 728 return max (pc, post_prologue_pc); 729 730 /* Can't determine prologue from the symbol table, need to examine 731 instructions. */ 732 733 /* Skip the typical prologue instructions. These are the stack adjustment 734 instruction and the instructions that save registers on the stack 735 or in the gcc frame. */ 736 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE) 737 { 738 inst = alpha_read_insn (gdbarch, pc + offset); 739 740 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ 741 continue; 742 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ 743 continue; 744 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ 745 continue; 746 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ 747 continue; 748 749 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ 750 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ 751 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ 752 continue; 753 754 if (inst == 0x47de040f) /* bis sp,sp,fp */ 755 continue; 756 if (inst == 0x47fe040f) /* bis zero,sp,fp */ 757 continue; 758 759 break; 760 } 761 return pc + offset; 762} 763 764 765/* Figure out where the longjmp will land. 766 We expect the first arg to be a pointer to the jmp_buf structure from 767 which we extract the PC (JB_PC) that we will land at. The PC is copied 768 into the "pc". This routine returns true on success. */ 769 770static int 771alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) 772{ 773 struct gdbarch *gdbarch = get_frame_arch (frame); 774 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 775 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 776 CORE_ADDR jb_addr; 777 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; 778 779 jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM); 780 781 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), 782 raw_buffer, tdep->jb_elt_size)) 783 return 0; 784 785 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order); 786 return 1; 787} 788 789 790/* Frame unwinder for signal trampolines. We use alpha tdep bits that 791 describe the location and shape of the sigcontext structure. After 792 that, all registers are in memory, so it's easy. */ 793/* ??? Shouldn't we be able to do this generically, rather than with 794 OSABI data specific to Alpha? */ 795 796struct alpha_sigtramp_unwind_cache 797{ 798 CORE_ADDR sigcontext_addr; 799}; 800 801static struct alpha_sigtramp_unwind_cache * 802alpha_sigtramp_frame_unwind_cache (struct frame_info *this_frame, 803 void **this_prologue_cache) 804{ 805 struct alpha_sigtramp_unwind_cache *info; 806 struct gdbarch_tdep *tdep; 807 808 if (*this_prologue_cache) 809 return *this_prologue_cache; 810 811 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); 812 *this_prologue_cache = info; 813 814 tdep = gdbarch_tdep (get_frame_arch (this_frame)); 815 info->sigcontext_addr = tdep->sigcontext_addr (this_frame); 816 817 return info; 818} 819 820/* Return the address of REGNUM in a sigtramp frame. Since this is 821 all arithmetic, it doesn't seem worthwhile to cache it. */ 822 823static CORE_ADDR 824alpha_sigtramp_register_address (struct gdbarch *gdbarch, 825 CORE_ADDR sigcontext_addr, int regnum) 826{ 827 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 828 829 if (regnum >= 0 && regnum < 32) 830 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8; 831 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32) 832 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8; 833 else if (regnum == ALPHA_PC_REGNUM) 834 return sigcontext_addr + tdep->sc_pc_offset; 835 836 return 0; 837} 838 839/* Given a GDB frame, determine the address of the calling function's 840 frame. This will be used to create a new GDB frame struct. */ 841 842static void 843alpha_sigtramp_frame_this_id (struct frame_info *this_frame, 844 void **this_prologue_cache, 845 struct frame_id *this_id) 846{ 847 struct gdbarch *gdbarch = get_frame_arch (this_frame); 848 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 849 struct alpha_sigtramp_unwind_cache *info 850 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); 851 CORE_ADDR stack_addr, code_addr; 852 853 /* If the OSABI couldn't locate the sigcontext, give up. */ 854 if (info->sigcontext_addr == 0) 855 return; 856 857 /* If we have dynamic signal trampolines, find their start. 858 If we do not, then we must assume there is a symbol record 859 that can provide the start address. */ 860 if (tdep->dynamic_sigtramp_offset) 861 { 862 int offset; 863 code_addr = get_frame_pc (this_frame); 864 offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr); 865 if (offset >= 0) 866 code_addr -= offset; 867 else 868 code_addr = 0; 869 } 870 else 871 code_addr = get_frame_func (this_frame); 872 873 /* The stack address is trivially read from the sigcontext. */ 874 stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr, 875 ALPHA_SP_REGNUM); 876 stack_addr = get_frame_memory_unsigned (this_frame, stack_addr, 877 ALPHA_REGISTER_SIZE); 878 879 *this_id = frame_id_build (stack_addr, code_addr); 880} 881 882/* Retrieve the value of REGNUM in FRAME. Don't give up! */ 883 884static struct value * 885alpha_sigtramp_frame_prev_register (struct frame_info *this_frame, 886 void **this_prologue_cache, int regnum) 887{ 888 struct alpha_sigtramp_unwind_cache *info 889 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); 890 CORE_ADDR addr; 891 892 if (info->sigcontext_addr != 0) 893 { 894 /* All integer and fp registers are stored in memory. */ 895 addr = alpha_sigtramp_register_address (get_frame_arch (this_frame), 896 info->sigcontext_addr, regnum); 897 if (addr != 0) 898 return frame_unwind_got_memory (this_frame, regnum, addr); 899 } 900 901 /* This extra register may actually be in the sigcontext, but our 902 current description of it in alpha_sigtramp_frame_unwind_cache 903 doesn't include it. Too bad. Fall back on whatever's in the 904 outer frame. */ 905 return frame_unwind_got_register (this_frame, regnum, regnum); 906} 907 908static int 909alpha_sigtramp_frame_sniffer (const struct frame_unwind *self, 910 struct frame_info *this_frame, 911 void **this_prologue_cache) 912{ 913 struct gdbarch *gdbarch = get_frame_arch (this_frame); 914 CORE_ADDR pc = get_frame_pc (this_frame); 915 char *name; 916 917 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead 918 look at tramp-frame.h and other simplier per-architecture 919 sigtramp unwinders. */ 920 921 /* We shouldn't even bother to try if the OSABI didn't register a 922 sigcontext_addr handler or pc_in_sigtramp hander. */ 923 if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL) 924 return 0; 925 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL) 926 return 0; 927 928 /* Otherwise we should be in a signal frame. */ 929 find_pc_partial_function (pc, &name, NULL, NULL); 930 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (gdbarch, pc, name)) 931 return 1; 932 933 return 0; 934} 935 936static const struct frame_unwind alpha_sigtramp_frame_unwind = { 937 SIGTRAMP_FRAME, 938 default_frame_unwind_stop_reason, 939 alpha_sigtramp_frame_this_id, 940 alpha_sigtramp_frame_prev_register, 941 NULL, 942 alpha_sigtramp_frame_sniffer 943}; 944 945 946 947/* Heuristic_proc_start may hunt through the text section for a long 948 time across a 2400 baud serial line. Allows the user to limit this 949 search. */ 950static unsigned int heuristic_fence_post = 0; 951 952/* Attempt to locate the start of the function containing PC. We assume that 953 the previous function ends with an about_to_return insn. Not foolproof by 954 any means, since gcc is happy to put the epilogue in the middle of a 955 function. But we're guessing anyway... */ 956 957static CORE_ADDR 958alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc) 959{ 960 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 961 CORE_ADDR last_non_nop = pc; 962 CORE_ADDR fence = pc - heuristic_fence_post; 963 CORE_ADDR orig_pc = pc; 964 CORE_ADDR func; 965 struct inferior *inf; 966 967 if (pc == 0) 968 return 0; 969 970 /* First see if we can find the start of the function from minimal 971 symbol information. This can succeed with a binary that doesn't 972 have debug info, but hasn't been stripped. */ 973 func = get_pc_function_start (pc); 974 if (func) 975 return func; 976 977 if (heuristic_fence_post == UINT_MAX 978 || fence < tdep->vm_min_address) 979 fence = tdep->vm_min_address; 980 981 /* Search back for previous return; also stop at a 0, which might be 982 seen for instance before the start of a code section. Don't include 983 nops, since this usually indicates padding between functions. */ 984 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE) 985 { 986 unsigned int insn = alpha_read_insn (gdbarch, pc); 987 switch (insn) 988 { 989 case 0: /* invalid insn */ 990 case 0x6bfa8001: /* ret $31,($26),1 */ 991 return last_non_nop; 992 993 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ 994 case 0x47ff041f: /* nop: bis $31,$31,$31 */ 995 break; 996 997 default: 998 last_non_nop = pc; 999 break; 1000 } 1001 } 1002 1003 inf = current_inferior (); 1004 1005 /* It's not clear to me why we reach this point when stopping quietly, 1006 but with this test, at least we don't print out warnings for every 1007 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ 1008 if (inf->control.stop_soon == NO_STOP_QUIETLY) 1009 { 1010 static int blurb_printed = 0; 1011 1012 if (fence == tdep->vm_min_address) 1013 warning (_("Hit beginning of text section without finding \ 1014enclosing function for address %s"), paddress (gdbarch, orig_pc)); 1015 else 1016 warning (_("Hit heuristic-fence-post without finding \ 1017enclosing function for address %s"), paddress (gdbarch, orig_pc)); 1018 1019 if (!blurb_printed) 1020 { 1021 printf_filtered (_("\ 1022This warning occurs if you are debugging a function without any symbols\n\ 1023(for example, in a stripped executable). In that case, you may wish to\n\ 1024increase the size of the search with the `set heuristic-fence-post' command.\n\ 1025\n\ 1026Otherwise, you told GDB there was a function where there isn't one, or\n\ 1027(more likely) you have encountered a bug in GDB.\n")); 1028 blurb_printed = 1; 1029 } 1030 } 1031 1032 return 0; 1033} 1034 1035/* Fallback alpha frame unwinder. Uses instruction scanning and knows 1036 something about the traditional layout of alpha stack frames. */ 1037 1038struct alpha_heuristic_unwind_cache 1039{ 1040 CORE_ADDR vfp; 1041 CORE_ADDR start_pc; 1042 struct trad_frame_saved_reg *saved_regs; 1043 int return_reg; 1044}; 1045 1046/* If a probing loop sequence starts at PC, simulate it and compute 1047 FRAME_SIZE and PC after its execution. Otherwise, return with PC and 1048 FRAME_SIZE unchanged. */ 1049 1050static void 1051alpha_heuristic_analyze_probing_loop (struct gdbarch *gdbarch, CORE_ADDR *pc, 1052 int *frame_size) 1053{ 1054 CORE_ADDR cur_pc = *pc; 1055 int cur_frame_size = *frame_size; 1056 int nb_of_iterations, reg_index, reg_probe; 1057 unsigned int insn; 1058 1059 /* The following pattern is recognized as a probing loop: 1060 1061 lda REG_INDEX,NB_OF_ITERATIONS 1062 lda REG_PROBE,<immediate>(sp) 1063 1064 LOOP_START: 1065 stq zero,<immediate>(REG_PROBE) 1066 subq REG_INDEX,0x1,REG_INDEX 1067 lda REG_PROBE,<immediate>(REG_PROBE) 1068 bne REG_INDEX, LOOP_START 1069 1070 lda sp,<immediate>(REG_PROBE) 1071 1072 If anything different is found, the function returns without 1073 changing PC and FRAME_SIZE. Otherwise, PC will point immediately 1074 after this sequence, and FRAME_SIZE will be updated. */ 1075 1076 /* lda REG_INDEX,NB_OF_ITERATIONS */ 1077 1078 insn = alpha_read_insn (gdbarch, cur_pc); 1079 if (INSN_OPCODE (insn) != lda_opcode) 1080 return; 1081 reg_index = MEM_RA (insn); 1082 nb_of_iterations = MEM_DISP (insn); 1083 1084 /* lda REG_PROBE,<immediate>(sp) */ 1085 1086 cur_pc += ALPHA_INSN_SIZE; 1087 insn = alpha_read_insn (gdbarch, cur_pc); 1088 if (INSN_OPCODE (insn) != lda_opcode 1089 || MEM_RB (insn) != ALPHA_SP_REGNUM) 1090 return; 1091 reg_probe = MEM_RA (insn); 1092 cur_frame_size -= MEM_DISP (insn); 1093 1094 /* stq zero,<immediate>(REG_PROBE) */ 1095 1096 cur_pc += ALPHA_INSN_SIZE; 1097 insn = alpha_read_insn (gdbarch, cur_pc); 1098 if (INSN_OPCODE (insn) != stq_opcode 1099 || MEM_RA (insn) != 0x1f 1100 || MEM_RB (insn) != reg_probe) 1101 return; 1102 1103 /* subq REG_INDEX,0x1,REG_INDEX */ 1104 1105 cur_pc += ALPHA_INSN_SIZE; 1106 insn = alpha_read_insn (gdbarch, cur_pc); 1107 if (INSN_OPCODE (insn) != subq_opcode 1108 || !OPR_HAS_IMMEDIATE (insn) 1109 || OPR_FUNCTION (insn) != subq_function 1110 || OPR_LIT(insn) != 1 1111 || OPR_RA (insn) != reg_index 1112 || OPR_RC (insn) != reg_index) 1113 return; 1114 1115 /* lda REG_PROBE,<immediate>(REG_PROBE) */ 1116 1117 cur_pc += ALPHA_INSN_SIZE; 1118 insn = alpha_read_insn (gdbarch, cur_pc); 1119 if (INSN_OPCODE (insn) != lda_opcode 1120 || MEM_RA (insn) != reg_probe 1121 || MEM_RB (insn) != reg_probe) 1122 return; 1123 cur_frame_size -= MEM_DISP (insn) * nb_of_iterations; 1124 1125 /* bne REG_INDEX, LOOP_START */ 1126 1127 cur_pc += ALPHA_INSN_SIZE; 1128 insn = alpha_read_insn (gdbarch, cur_pc); 1129 if (INSN_OPCODE (insn) != bne_opcode 1130 || MEM_RA (insn) != reg_index) 1131 return; 1132 1133 /* lda sp,<immediate>(REG_PROBE) */ 1134 1135 cur_pc += ALPHA_INSN_SIZE; 1136 insn = alpha_read_insn (gdbarch, cur_pc); 1137 if (INSN_OPCODE (insn) != lda_opcode 1138 || MEM_RA (insn) != ALPHA_SP_REGNUM 1139 || MEM_RB (insn) != reg_probe) 1140 return; 1141 cur_frame_size -= MEM_DISP (insn); 1142 1143 *pc = cur_pc; 1144 *frame_size = cur_frame_size; 1145} 1146 1147static struct alpha_heuristic_unwind_cache * 1148alpha_heuristic_frame_unwind_cache (struct frame_info *this_frame, 1149 void **this_prologue_cache, 1150 CORE_ADDR start_pc) 1151{ 1152 struct gdbarch *gdbarch = get_frame_arch (this_frame); 1153 struct alpha_heuristic_unwind_cache *info; 1154 ULONGEST val; 1155 CORE_ADDR limit_pc, cur_pc; 1156 int frame_reg, frame_size, return_reg, reg; 1157 1158 if (*this_prologue_cache) 1159 return *this_prologue_cache; 1160 1161 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); 1162 *this_prologue_cache = info; 1163 info->saved_regs = trad_frame_alloc_saved_regs (this_frame); 1164 1165 limit_pc = get_frame_pc (this_frame); 1166 if (start_pc == 0) 1167 start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc); 1168 info->start_pc = start_pc; 1169 1170 frame_reg = ALPHA_SP_REGNUM; 1171 frame_size = 0; 1172 return_reg = -1; 1173 1174 /* If we've identified a likely place to start, do code scanning. */ 1175 if (start_pc != 0) 1176 { 1177 /* Limit the forward search to 50 instructions. */ 1178 if (start_pc + 200 < limit_pc) 1179 limit_pc = start_pc + 200; 1180 1181 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE) 1182 { 1183 unsigned int word = alpha_read_insn (gdbarch, cur_pc); 1184 1185 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ 1186 { 1187 if (word & 0x8000) 1188 { 1189 /* Consider only the first stack allocation instruction 1190 to contain the static size of the frame. */ 1191 if (frame_size == 0) 1192 frame_size = (-word) & 0xffff; 1193 } 1194 else 1195 { 1196 /* Exit loop if a positive stack adjustment is found, which 1197 usually means that the stack cleanup code in the function 1198 epilogue is reached. */ 1199 break; 1200 } 1201 } 1202 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ 1203 { 1204 reg = (word & 0x03e00000) >> 21; 1205 1206 /* Ignore this instruction if we have already encountered 1207 an instruction saving the same register earlier in the 1208 function code. The current instruction does not tell 1209 us where the original value upon function entry is saved. 1210 All it says is that the function we are scanning reused 1211 that register for some computation of its own, and is now 1212 saving its result. */ 1213 if (trad_frame_addr_p(info->saved_regs, reg)) 1214 continue; 1215 1216 if (reg == 31) 1217 continue; 1218 1219 /* Do not compute the address where the register was saved yet, 1220 because we don't know yet if the offset will need to be 1221 relative to $sp or $fp (we can not compute the address 1222 relative to $sp if $sp is updated during the execution of 1223 the current subroutine, for instance when doing some alloca). 1224 So just store the offset for the moment, and compute the 1225 address later when we know whether this frame has a frame 1226 pointer or not. */ 1227 /* Hack: temporarily add one, so that the offset is non-zero 1228 and we can tell which registers have save offsets below. */ 1229 info->saved_regs[reg].addr = (word & 0xffff) + 1; 1230 1231 /* Starting with OSF/1-3.2C, the system libraries are shipped 1232 without local symbols, but they still contain procedure 1233 descriptors without a symbol reference. GDB is currently 1234 unable to find these procedure descriptors and uses 1235 heuristic_proc_desc instead. 1236 As some low level compiler support routines (__div*, __add*) 1237 use a non-standard return address register, we have to 1238 add some heuristics to determine the return address register, 1239 or stepping over these routines will fail. 1240 Usually the return address register is the first register 1241 saved on the stack, but assembler optimization might 1242 rearrange the register saves. 1243 So we recognize only a few registers (t7, t9, ra) within 1244 the procedure prologue as valid return address registers. 1245 If we encounter a return instruction, we extract the 1246 the return address register from it. 1247 1248 FIXME: Rewriting GDB to access the procedure descriptors, 1249 e.g. via the minimal symbol table, might obviate this 1250 hack. */ 1251 if (return_reg == -1 1252 && cur_pc < (start_pc + 80) 1253 && (reg == ALPHA_T7_REGNUM 1254 || reg == ALPHA_T9_REGNUM 1255 || reg == ALPHA_RA_REGNUM)) 1256 return_reg = reg; 1257 } 1258 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ 1259 return_reg = (word >> 16) & 0x1f; 1260 else if (word == 0x47de040f) /* bis sp,sp,fp */ 1261 frame_reg = ALPHA_GCC_FP_REGNUM; 1262 else if (word == 0x47fe040f) /* bis zero,sp,fp */ 1263 frame_reg = ALPHA_GCC_FP_REGNUM; 1264 1265 alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size); 1266 } 1267 1268 /* If we haven't found a valid return address register yet, keep 1269 searching in the procedure prologue. */ 1270 if (return_reg == -1) 1271 { 1272 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) 1273 { 1274 unsigned int word = alpha_read_insn (gdbarch, cur_pc); 1275 1276 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ 1277 { 1278 reg = (word & 0x03e00000) >> 21; 1279 if (reg == ALPHA_T7_REGNUM 1280 || reg == ALPHA_T9_REGNUM 1281 || reg == ALPHA_RA_REGNUM) 1282 { 1283 return_reg = reg; 1284 break; 1285 } 1286 } 1287 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ 1288 { 1289 return_reg = (word >> 16) & 0x1f; 1290 break; 1291 } 1292 1293 cur_pc += ALPHA_INSN_SIZE; 1294 } 1295 } 1296 } 1297 1298 /* Failing that, do default to the customary RA. */ 1299 if (return_reg == -1) 1300 return_reg = ALPHA_RA_REGNUM; 1301 info->return_reg = return_reg; 1302 1303 val = get_frame_register_unsigned (this_frame, frame_reg); 1304 info->vfp = val + frame_size; 1305 1306 /* Convert offsets to absolute addresses. See above about adding 1307 one to the offsets to make all detected offsets non-zero. */ 1308 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) 1309 if (trad_frame_addr_p(info->saved_regs, reg)) 1310 info->saved_regs[reg].addr += val - 1; 1311 1312 /* The stack pointer of the previous frame is computed by popping 1313 the current stack frame. */ 1314 if (!trad_frame_addr_p (info->saved_regs, ALPHA_SP_REGNUM)) 1315 trad_frame_set_value (info->saved_regs, ALPHA_SP_REGNUM, info->vfp); 1316 1317 return info; 1318} 1319 1320/* Given a GDB frame, determine the address of the calling function's 1321 frame. This will be used to create a new GDB frame struct. */ 1322 1323static void 1324alpha_heuristic_frame_this_id (struct frame_info *this_frame, 1325 void **this_prologue_cache, 1326 struct frame_id *this_id) 1327{ 1328 struct alpha_heuristic_unwind_cache *info 1329 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); 1330 1331 *this_id = frame_id_build (info->vfp, info->start_pc); 1332} 1333 1334/* Retrieve the value of REGNUM in FRAME. Don't give up! */ 1335 1336static struct value * 1337alpha_heuristic_frame_prev_register (struct frame_info *this_frame, 1338 void **this_prologue_cache, int regnum) 1339{ 1340 struct alpha_heuristic_unwind_cache *info 1341 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); 1342 1343 /* The PC of the previous frame is stored in the link register of 1344 the current frame. Frob regnum so that we pull the value from 1345 the correct place. */ 1346 if (regnum == ALPHA_PC_REGNUM) 1347 regnum = info->return_reg; 1348 1349 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); 1350} 1351 1352static const struct frame_unwind alpha_heuristic_frame_unwind = { 1353 NORMAL_FRAME, 1354 default_frame_unwind_stop_reason, 1355 alpha_heuristic_frame_this_id, 1356 alpha_heuristic_frame_prev_register, 1357 NULL, 1358 default_frame_sniffer 1359}; 1360 1361static CORE_ADDR 1362alpha_heuristic_frame_base_address (struct frame_info *this_frame, 1363 void **this_prologue_cache) 1364{ 1365 struct alpha_heuristic_unwind_cache *info 1366 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); 1367 1368 return info->vfp; 1369} 1370 1371static const struct frame_base alpha_heuristic_frame_base = { 1372 &alpha_heuristic_frame_unwind, 1373 alpha_heuristic_frame_base_address, 1374 alpha_heuristic_frame_base_address, 1375 alpha_heuristic_frame_base_address 1376}; 1377 1378/* Just like reinit_frame_cache, but with the right arguments to be 1379 callable as an sfunc. Used by the "set heuristic-fence-post" command. */ 1380 1381static void 1382reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) 1383{ 1384 reinit_frame_cache (); 1385} 1386 1387 1388/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that 1389 dummy frame. The frame ID's base needs to match the TOS value 1390 saved by save_dummy_frame_tos(), and the PC match the dummy frame's 1391 breakpoint. */ 1392 1393static struct frame_id 1394alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) 1395{ 1396 ULONGEST base; 1397 base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM); 1398 return frame_id_build (base, get_frame_pc (this_frame)); 1399} 1400 1401static CORE_ADDR 1402alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 1403{ 1404 ULONGEST pc; 1405 pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM); 1406 return pc; 1407} 1408 1409 1410/* Helper routines for alpha*-nat.c files to move register sets to and 1411 from core files. The UNIQUE pointer is allowed to be NULL, as most 1412 targets don't supply this value in their core files. */ 1413 1414void 1415alpha_supply_int_regs (struct regcache *regcache, int regno, 1416 const void *r0_r30, const void *pc, const void *unique) 1417{ 1418 const gdb_byte *regs = r0_r30; 1419 int i; 1420 1421 for (i = 0; i < 31; ++i) 1422 if (regno == i || regno == -1) 1423 regcache_raw_supply (regcache, i, regs + i * 8); 1424 1425 if (regno == ALPHA_ZERO_REGNUM || regno == -1) 1426 { 1427 const gdb_byte zero[8] = { 0 }; 1428 1429 regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, zero); 1430 } 1431 1432 if (regno == ALPHA_PC_REGNUM || regno == -1) 1433 regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc); 1434 1435 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) 1436 regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique); 1437} 1438 1439void 1440alpha_fill_int_regs (const struct regcache *regcache, 1441 int regno, void *r0_r30, void *pc, void *unique) 1442{ 1443 gdb_byte *regs = r0_r30; 1444 int i; 1445 1446 for (i = 0; i < 31; ++i) 1447 if (regno == i || regno == -1) 1448 regcache_raw_collect (regcache, i, regs + i * 8); 1449 1450 if (regno == ALPHA_PC_REGNUM || regno == -1) 1451 regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc); 1452 1453 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) 1454 regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique); 1455} 1456 1457void 1458alpha_supply_fp_regs (struct regcache *regcache, int regno, 1459 const void *f0_f30, const void *fpcr) 1460{ 1461 const gdb_byte *regs = f0_f30; 1462 int i; 1463 1464 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) 1465 if (regno == i || regno == -1) 1466 regcache_raw_supply (regcache, i, 1467 regs + (i - ALPHA_FP0_REGNUM) * 8); 1468 1469 if (regno == ALPHA_FPCR_REGNUM || regno == -1) 1470 regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr); 1471} 1472 1473void 1474alpha_fill_fp_regs (const struct regcache *regcache, 1475 int regno, void *f0_f30, void *fpcr) 1476{ 1477 gdb_byte *regs = f0_f30; 1478 int i; 1479 1480 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) 1481 if (regno == i || regno == -1) 1482 regcache_raw_collect (regcache, i, 1483 regs + (i - ALPHA_FP0_REGNUM) * 8); 1484 1485 if (regno == ALPHA_FPCR_REGNUM || regno == -1) 1486 regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr); 1487} 1488 1489 1490 1491/* Return nonzero if the G_floating register value in REG is equal to 1492 zero for FP control instructions. */ 1493 1494static int 1495fp_register_zero_p (LONGEST reg) 1496{ 1497 /* Check that all bits except the sign bit are zero. */ 1498 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1; 1499 1500 return ((reg & zero_mask) == 0); 1501} 1502 1503/* Return the value of the sign bit for the G_floating register 1504 value held in REG. */ 1505 1506static int 1507fp_register_sign_bit (LONGEST reg) 1508{ 1509 const LONGEST sign_mask = (LONGEST) 1 << 63; 1510 1511 return ((reg & sign_mask) != 0); 1512} 1513 1514/* alpha_software_single_step() is called just before we want to resume 1515 the inferior, if we want to single-step it but there is no hardware 1516 or kernel single-step support (NetBSD on Alpha, for example). We find 1517 the target of the coming instruction and breakpoint it. */ 1518 1519static CORE_ADDR 1520alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) 1521{ 1522 struct gdbarch *gdbarch = get_frame_arch (frame); 1523 unsigned int insn; 1524 unsigned int op; 1525 int regno; 1526 int offset; 1527 LONGEST rav; 1528 1529 insn = alpha_read_insn (gdbarch, pc); 1530 1531 /* Opcode is top 6 bits. */ 1532 op = (insn >> 26) & 0x3f; 1533 1534 if (op == 0x1a) 1535 { 1536 /* Jump format: target PC is: 1537 RB & ~3 */ 1538 return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3); 1539 } 1540 1541 if ((op & 0x30) == 0x30) 1542 { 1543 /* Branch format: target PC is: 1544 (new PC) + (4 * sext(displacement)) */ 1545 if (op == 0x30 /* BR */ 1546 || op == 0x34) /* BSR */ 1547 { 1548 branch_taken: 1549 offset = (insn & 0x001fffff); 1550 if (offset & 0x00100000) 1551 offset |= 0xffe00000; 1552 offset *= ALPHA_INSN_SIZE; 1553 return (pc + ALPHA_INSN_SIZE + offset); 1554 } 1555 1556 /* Need to determine if branch is taken; read RA. */ 1557 regno = (insn >> 21) & 0x1f; 1558 switch (op) 1559 { 1560 case 0x31: /* FBEQ */ 1561 case 0x36: /* FBGE */ 1562 case 0x37: /* FBGT */ 1563 case 0x33: /* FBLE */ 1564 case 0x32: /* FBLT */ 1565 case 0x35: /* FBNE */ 1566 regno += gdbarch_fp0_regnum (gdbarch); 1567 } 1568 1569 rav = get_frame_register_signed (frame, regno); 1570 1571 switch (op) 1572 { 1573 case 0x38: /* BLBC */ 1574 if ((rav & 1) == 0) 1575 goto branch_taken; 1576 break; 1577 case 0x3c: /* BLBS */ 1578 if (rav & 1) 1579 goto branch_taken; 1580 break; 1581 case 0x39: /* BEQ */ 1582 if (rav == 0) 1583 goto branch_taken; 1584 break; 1585 case 0x3d: /* BNE */ 1586 if (rav != 0) 1587 goto branch_taken; 1588 break; 1589 case 0x3a: /* BLT */ 1590 if (rav < 0) 1591 goto branch_taken; 1592 break; 1593 case 0x3b: /* BLE */ 1594 if (rav <= 0) 1595 goto branch_taken; 1596 break; 1597 case 0x3f: /* BGT */ 1598 if (rav > 0) 1599 goto branch_taken; 1600 break; 1601 case 0x3e: /* BGE */ 1602 if (rav >= 0) 1603 goto branch_taken; 1604 break; 1605 1606 /* Floating point branches. */ 1607 1608 case 0x31: /* FBEQ */ 1609 if (fp_register_zero_p (rav)) 1610 goto branch_taken; 1611 break; 1612 case 0x36: /* FBGE */ 1613 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav)) 1614 goto branch_taken; 1615 break; 1616 case 0x37: /* FBGT */ 1617 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav)) 1618 goto branch_taken; 1619 break; 1620 case 0x33: /* FBLE */ 1621 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav)) 1622 goto branch_taken; 1623 break; 1624 case 0x32: /* FBLT */ 1625 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav)) 1626 goto branch_taken; 1627 break; 1628 case 0x35: /* FBNE */ 1629 if (! fp_register_zero_p (rav)) 1630 goto branch_taken; 1631 break; 1632 } 1633 } 1634 1635 /* Not a branch or branch not taken; target PC is: 1636 pc + 4 */ 1637 return (pc + ALPHA_INSN_SIZE); 1638} 1639 1640int 1641alpha_software_single_step (struct frame_info *frame) 1642{ 1643 struct gdbarch *gdbarch = get_frame_arch (frame); 1644 struct address_space *aspace = get_frame_address_space (frame); 1645 CORE_ADDR pc, next_pc; 1646 1647 pc = get_frame_pc (frame); 1648 next_pc = alpha_next_pc (frame, pc); 1649 1650 insert_single_step_breakpoint (gdbarch, aspace, next_pc); 1651 return 1; 1652} 1653 1654 1655/* Initialize the current architecture based on INFO. If possible, re-use an 1656 architecture from ARCHES, which is a list of architectures already created 1657 during this debugging session. 1658 1659 Called e.g. at program startup, when reading a core file, and when reading 1660 a binary file. */ 1661 1662static struct gdbarch * 1663alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 1664{ 1665 struct gdbarch_tdep *tdep; 1666 struct gdbarch *gdbarch; 1667 1668 /* Try to determine the ABI of the object we are loading. */ 1669 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) 1670 { 1671 /* If it's an ECOFF file, assume it's OSF/1. */ 1672 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) 1673 info.osabi = GDB_OSABI_OSF1; 1674 } 1675 1676 /* Find a candidate among extant architectures. */ 1677 arches = gdbarch_list_lookup_by_info (arches, &info); 1678 if (arches != NULL) 1679 return arches->gdbarch; 1680 1681 tdep = xmalloc (sizeof (struct gdbarch_tdep)); 1682 gdbarch = gdbarch_alloc (&info, tdep); 1683 1684 /* Lowest text address. This is used by heuristic_proc_start() 1685 to decide when to stop looking. */ 1686 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL; 1687 1688 tdep->dynamic_sigtramp_offset = NULL; 1689 tdep->sigcontext_addr = NULL; 1690 tdep->sc_pc_offset = 2 * 8; 1691 tdep->sc_regs_offset = 4 * 8; 1692 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8; 1693 1694 tdep->jb_pc = -1; /* longjmp support not enabled by default. */ 1695 1696 tdep->return_in_memory = alpha_return_in_memory_always; 1697 1698 /* Type sizes */ 1699 set_gdbarch_short_bit (gdbarch, 16); 1700 set_gdbarch_int_bit (gdbarch, 32); 1701 set_gdbarch_long_bit (gdbarch, 64); 1702 set_gdbarch_long_long_bit (gdbarch, 64); 1703 set_gdbarch_float_bit (gdbarch, 32); 1704 set_gdbarch_double_bit (gdbarch, 64); 1705 set_gdbarch_long_double_bit (gdbarch, 64); 1706 set_gdbarch_ptr_bit (gdbarch, 64); 1707 1708 /* Register info */ 1709 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); 1710 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); 1711 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); 1712 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); 1713 1714 set_gdbarch_register_name (gdbarch, alpha_register_name); 1715 set_gdbarch_register_type (gdbarch, alpha_register_type); 1716 1717 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); 1718 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); 1719 1720 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); 1721 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); 1722 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); 1723 1724 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); 1725 1726 /* Prologue heuristics. */ 1727 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); 1728 1729 /* Disassembler. */ 1730 set_gdbarch_print_insn (gdbarch, print_insn_alpha); 1731 1732 /* Call info. */ 1733 1734 set_gdbarch_return_value (gdbarch, alpha_return_value); 1735 1736 /* Settings for calling functions in the inferior. */ 1737 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); 1738 1739 /* Methods for saving / extracting a dummy frame's ID. */ 1740 set_gdbarch_dummy_id (gdbarch, alpha_dummy_id); 1741 1742 /* Return the unwound PC value. */ 1743 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); 1744 1745 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1746 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); 1747 1748 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); 1749 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE); 1750 set_gdbarch_cannot_step_breakpoint (gdbarch, 1); 1751 1752 /* Hook in ABI-specific overrides, if they have been registered. */ 1753 gdbarch_init_osabi (info, gdbarch); 1754 1755 /* Now that we have tuned the configuration, set a few final things 1756 based on what the OS ABI has told us. */ 1757 1758 if (tdep->jb_pc >= 0) 1759 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); 1760 1761 frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind); 1762 frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind); 1763 1764 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); 1765 1766 return gdbarch; 1767} 1768 1769void 1770alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) 1771{ 1772 dwarf2_append_unwinders (gdbarch); 1773 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); 1774} 1775 1776extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ 1777 1778void 1779_initialize_alpha_tdep (void) 1780{ 1781 struct cmd_list_element *c; 1782 1783 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); 1784 1785 /* Let the user set the fence post for heuristic_proc_start. */ 1786 1787 /* We really would like to have both "0" and "unlimited" work, but 1788 command.c doesn't deal with that. So make it a var_zinteger 1789 because the user can always use "999999" or some such for unlimited. */ 1790 /* We need to throw away the frame cache when we set this, since it 1791 might change our ability to get backtraces. */ 1792 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support, 1793 &heuristic_fence_post, _("\ 1794Set the distance searched for the start of a function."), _("\ 1795Show the distance searched for the start of a function."), _("\ 1796If you are debugging a stripped executable, GDB needs to search through the\n\ 1797program for the start of a function. This command sets the distance of the\n\ 1798search. The only need to set it is when debugging a stripped executable."), 1799 reinit_frame_cache_sfunc, 1800 NULL, /* FIXME: i18n: The distance searched for 1801 the start of a function is \"%d\". */ 1802 &setlist, &showlist); 1803} 1804