1/* spu.h -- Assembler for spu
2
3   Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4
5   This file is part of GAS, the GNU Assembler.
6
7   GAS is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 3, or (at your option)
10   any later version.
11
12   GAS is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with GAS; see the file COPYING.  If not, write to the Free
19   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20   02110-1301, USA.  */
21
22#ifndef TC_SPU
23#define TC_SPU 1
24
25#include "opcode/spu.h"
26
27#define TARGET_FORMAT "elf32-spu"
28#define TARGET_ARCH bfd_arch_spu
29#define TARGET_NAME "elf32-spu"
30
31#define TARGET_BYTES_BIG_ENDIAN 1
32
33struct tc_fix_info {
34  unsigned short arg_format;
35  unsigned short insn_tag;
36};
37
38/* fixS will have a member named tc_fix_data of this type.  */
39#define TC_FIX_TYPE struct tc_fix_info
40#define TC_INIT_FIX_DATA(FIXP) \
41  do						\
42    {						\
43      (FIXP)->tc_fix_data.arg_format = 0;	\
44      (FIXP)->tc_fix_data.insn_tag = 0;		\
45    }						\
46  while (0)
47
48/* Don't reduce function symbols to section symbols, and don't adjust
49   references to PPU symbols.  */
50#define tc_fix_adjustable(FIXP) \
51  (!(S_IS_FUNCTION ((FIXP)->fx_addsy)			\
52     || (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU32	\
53     || (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU64	\
54     || (FIXP)->fx_r_type == BFD_RELOC_SPU_ADD_PIC))
55
56/* Keep relocs on calls.  Branches to function symbols are tail or
57   sibling calls.  */
58#define TC_FORCE_RELOCATION(FIXP) \
59  ((FIXP)->tc_fix_data.insn_tag == M_BRSL		\
60   || (FIXP)->tc_fix_data.insn_tag == M_BRASL		\
61   || (((FIXP)->tc_fix_data.insn_tag == M_BR		\
62	|| (FIXP)->tc_fix_data.insn_tag == M_BRA)	\
63       && (FIXP)->fx_addsy != NULL			\
64       && S_IS_FUNCTION ((FIXP)->fx_addsy))		\
65   || (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU32		\
66   || (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU64		\
67   || (FIXP)->fx_r_type == BFD_RELOC_SPU_ADD_PIC	\
68   || generic_force_reloc (FIXP))
69
70/* Values passed to md_apply_fix don't include symbol values.  */
71#define MD_APPLY_SYM_VALUE(FIX) 0
72
73/* The spu uses pseudo-ops with no leading period.  */
74#define NO_PSEUDO_DOT 1
75
76/* Don't warn on word overflow; it happens on %hi relocs.  */
77#undef WARN_SIGNED_OVERFLOW_WORD
78
79#define DIFF_EXPR_OK
80
81#define WORKING_DOT_WORD
82
83#define md_number_to_chars number_to_chars_bigendian
84
85#define md_convert_frag(b,s,f)		{as_fatal (_("spu convert_frag\n"));}
86
87/* We don't need to do anything special for undefined symbols.  */
88#define md_undefined_symbol(s) 0
89
90extern symbolS *section_symbol (asection *);
91#define md_operand(e) \
92  do {								\
93    if (strncasecmp (input_line_pointer, "@ppu", 4) == 0)	\
94      {								\
95	e->X_op = O_symbol;					\
96	if (abs_section_sym == NULL)				\
97	  abs_section_sym = section_symbol (absolute_section);	\
98	e->X_add_symbol = abs_section_sym;			\
99	e->X_add_number = 0;					\
100      }								\
101  } while (0)
102
103/* Fill in rs_align_code fragments.  */
104extern void spu_handle_align (fragS *);
105#define HANDLE_ALIGN(frag)  spu_handle_align (frag)
106
107#define MAX_MEM_FOR_RS_ALIGN_CODE  (7 + 8)
108
109#endif /* TC_SPU */
110