1//=- HexagonMachineFuctionInfo.h - Hexagon machine function info --*- C++ -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10#ifndef HexagonMACHINEFUNCTIONINFO_H 11#define HexagonMACHINEFUNCTIONINFO_H 12 13#include "llvm/CodeGen/MachineFunction.h" 14 15namespace llvm { 16 17 namespace Hexagon { 18 const unsigned int StartPacket = 0x1; 19 const unsigned int EndPacket = 0x2; 20 } 21 22 23/// Hexagon target-specific information for each MachineFunction. 24class HexagonMachineFunctionInfo : public MachineFunctionInfo { 25 // SRetReturnReg - Some subtargets require that sret lowering includes 26 // returning the value of the returned struct in a register. This field 27 // holds the virtual register into which the sret argument is passed. 28 unsigned SRetReturnReg; 29 std::vector<MachineInstr*> AllocaAdjustInsts; 30 int VarArgsFrameIndex; 31 bool HasClobberLR; 32 33 std::map<const MachineInstr*, unsigned> PacketInfo; 34 35 36public: 37 HexagonMachineFunctionInfo() : SRetReturnReg(0), HasClobberLR(0) {} 38 39 HexagonMachineFunctionInfo(MachineFunction &MF) : SRetReturnReg(0), 40 HasClobberLR(0) {} 41 42 unsigned getSRetReturnReg() const { return SRetReturnReg; } 43 void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } 44 45 void addAllocaAdjustInst(MachineInstr* MI) { 46 AllocaAdjustInsts.push_back(MI); 47 } 48 const std::vector<MachineInstr*>& getAllocaAdjustInsts() { 49 return AllocaAdjustInsts; 50 } 51 52 void setVarArgsFrameIndex(int v) { VarArgsFrameIndex = v; } 53 int getVarArgsFrameIndex() { return VarArgsFrameIndex; } 54 55 void setStartPacket(MachineInstr* MI) { 56 PacketInfo[MI] |= Hexagon::StartPacket; 57 } 58 void setEndPacket(MachineInstr* MI) { 59 PacketInfo[MI] |= Hexagon::EndPacket; 60 } 61 bool isStartPacket(const MachineInstr* MI) const { 62 return (PacketInfo.count(MI) && 63 (PacketInfo.find(MI)->second & Hexagon::StartPacket)); 64 } 65 bool isEndPacket(const MachineInstr* MI) const { 66 return (PacketInfo.count(MI) && 67 (PacketInfo.find(MI)->second & Hexagon::EndPacket)); 68 } 69 void setHasClobberLR(bool v) { HasClobberLR = v; } 70 bool hasClobberLR() const { return HasClobberLR; } 71 72}; 73} // End llvm namespace 74 75#endif 76