1//===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the live stack slot analysis pass. It is analogous to
11// live interval analysis except it's analyzing liveness of stack slots rather
12// than registers.
13//
14//===----------------------------------------------------------------------===//
15
16#define DEBUG_TYPE "livestacks"
17#include "llvm/CodeGen/LiveStackAnalysis.h"
18#include "llvm/CodeGen/LiveIntervalAnalysis.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/Target/TargetRegisterInfo.h"
21#include "llvm/Support/Debug.h"
22#include "llvm/Support/raw_ostream.h"
23#include "llvm/ADT/Statistic.h"
24#include <limits>
25using namespace llvm;
26
27char LiveStacks::ID = 0;
28INITIALIZE_PASS_BEGIN(LiveStacks, "livestacks",
29                "Live Stack Slot Analysis", false, false)
30INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
31INITIALIZE_PASS_END(LiveStacks, "livestacks",
32                "Live Stack Slot Analysis", false, false)
33
34char &llvm::LiveStacksID = LiveStacks::ID;
35
36void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
37  AU.setPreservesAll();
38  AU.addPreserved<SlotIndexes>();
39  AU.addRequiredTransitive<SlotIndexes>();
40  MachineFunctionPass::getAnalysisUsage(AU);
41}
42
43void LiveStacks::releaseMemory() {
44  // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
45  VNInfoAllocator.Reset();
46  S2IMap.clear();
47  S2RCMap.clear();
48}
49
50bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {
51  TRI = MF.getTarget().getRegisterInfo();
52  // FIXME: No analysis is being done right now. We are relying on the
53  // register allocators to provide the information.
54  return false;
55}
56
57LiveInterval &
58LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
59  assert(Slot >= 0 && "Spill slot indice must be >= 0");
60  SS2IntervalMap::iterator I = S2IMap.find(Slot);
61  if (I == S2IMap.end()) {
62    I = S2IMap.insert(I, std::make_pair(Slot,
63            LiveInterval(TargetRegisterInfo::index2StackSlot(Slot), 0.0F)));
64    S2RCMap.insert(std::make_pair(Slot, RC));
65  } else {
66    // Use the largest common subclass register class.
67    const TargetRegisterClass *OldRC = S2RCMap[Slot];
68    S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
69  }
70  return I->second;
71}
72
73/// print - Implement the dump method.
74void LiveStacks::print(raw_ostream &OS, const Module*) const {
75
76  OS << "********** INTERVALS **********\n";
77  for (const_iterator I = begin(), E = end(); I != E; ++I) {
78    I->second.print(OS);
79    int Slot = I->first;
80    const TargetRegisterClass *RC = getIntervalRegClass(Slot);
81    if (RC)
82      OS << " [" << RC->getName() << "]\n";
83    else
84      OS << " [Unknown]\n";
85  }
86}
87