1/* BFD back-end for Renesas H8/300 COFF binaries. 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2000, 2001, 2002, 2003, 2004, 2005, 2006 4 Free Software Foundation, Inc. 5 Written by Steve Chamberlain, <sac@cygnus.com>. 6 7 This file is part of BFD, the Binary File Descriptor library. 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 22 23#include "bfd.h" 24#include "sysdep.h" 25#include "libbfd.h" 26#include "bfdlink.h" 27#include "genlink.h" 28#include "coff/h8300.h" 29#include "coff/internal.h" 30#include "libcoff.h" 31#include "libiberty.h" 32 33#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1) 34 35/* We derive a hash table from the basic BFD hash table to 36 hold entries in the function vector. Aside from the 37 info stored by the basic hash table, we need the offset 38 of a particular entry within the hash table as well as 39 the offset where we'll add the next entry. */ 40 41struct funcvec_hash_entry 42 { 43 /* The basic hash table entry. */ 44 struct bfd_hash_entry root; 45 46 /* The offset within the vectors section where 47 this entry lives. */ 48 bfd_vma offset; 49 }; 50 51struct funcvec_hash_table 52 { 53 /* The basic hash table. */ 54 struct bfd_hash_table root; 55 56 bfd *abfd; 57 58 /* Offset at which we'll add the next entry. */ 59 unsigned int offset; 60 }; 61 62static struct bfd_hash_entry * 63funcvec_hash_newfunc 64 (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); 65 66static bfd_reloc_status_type special 67 (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **); 68static int select_reloc 69 (reloc_howto_type *); 70static void rtype2howto 71 (arelent *, struct internal_reloc *); 72static void reloc_processing 73 (arelent *, struct internal_reloc *, asymbol **, bfd *, asection *); 74static bfd_boolean h8300_symbol_address_p 75 (bfd *, asection *, bfd_vma); 76static int h8300_reloc16_estimate 77 (bfd *, asection *, arelent *, unsigned int, 78 struct bfd_link_info *); 79static void h8300_reloc16_extra_cases 80 (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *, 81 bfd_byte *, unsigned int *, unsigned int *); 82static bfd_boolean h8300_bfd_link_add_symbols 83 (bfd *, struct bfd_link_info *); 84 85/* To lookup a value in the function vector hash table. */ 86#define funcvec_hash_lookup(table, string, create, copy) \ 87 ((struct funcvec_hash_entry *) \ 88 bfd_hash_lookup (&(table)->root, (string), (create), (copy))) 89 90/* The derived h8300 COFF linker table. Note it's derived from 91 the generic linker hash table, not the COFF backend linker hash 92 table! We use this to attach additional data structures we 93 need while linking on the h8300. */ 94struct h8300_coff_link_hash_table { 95 /* The main hash table. */ 96 struct generic_link_hash_table root; 97 98 /* Section for the vectors table. This gets attached to a 99 random input bfd, we keep it here for easy access. */ 100 asection *vectors_sec; 101 102 /* Hash table of the functions we need to enter into the function 103 vector. */ 104 struct funcvec_hash_table *funcvec_hash_table; 105}; 106 107static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *); 108 109/* Get the H8/300 COFF linker hash table from a link_info structure. */ 110 111#define h8300_coff_hash_table(p) \ 112 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p)))) 113 114/* Initialize fields within a funcvec hash table entry. Called whenever 115 a new entry is added to the funcvec hash table. */ 116 117static struct bfd_hash_entry * 118funcvec_hash_newfunc (struct bfd_hash_entry *entry, 119 struct bfd_hash_table *gen_table, 120 const char *string) 121{ 122 struct funcvec_hash_entry *ret; 123 struct funcvec_hash_table *table; 124 125 ret = (struct funcvec_hash_entry *) entry; 126 table = (struct funcvec_hash_table *) gen_table; 127 128 /* Allocate the structure if it has not already been allocated by a 129 subclass. */ 130 if (ret == NULL) 131 ret = ((struct funcvec_hash_entry *) 132 bfd_hash_allocate (gen_table, 133 sizeof (struct funcvec_hash_entry))); 134 if (ret == NULL) 135 return NULL; 136 137 /* Call the allocation method of the superclass. */ 138 ret = ((struct funcvec_hash_entry *) 139 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string)); 140 141 if (ret == NULL) 142 return NULL; 143 144 /* Note where this entry will reside in the function vector table. */ 145 ret->offset = table->offset; 146 147 /* Bump the offset at which we store entries in the function 148 vector. We'd like to bump up the size of the vectors section, 149 but it's not easily available here. */ 150 switch (bfd_get_mach (table->abfd)) 151 { 152 case bfd_mach_h8300: 153 case bfd_mach_h8300hn: 154 case bfd_mach_h8300sn: 155 table->offset += 2; 156 break; 157 case bfd_mach_h8300h: 158 case bfd_mach_h8300s: 159 table->offset += 4; 160 break; 161 default: 162 return NULL; 163 } 164 165 /* Everything went OK. */ 166 return (struct bfd_hash_entry *) ret; 167} 168 169/* Initialize the function vector hash table. */ 170 171static bfd_boolean 172funcvec_hash_table_init (struct funcvec_hash_table *table, 173 bfd *abfd, 174 struct bfd_hash_entry *(*newfunc) 175 (struct bfd_hash_entry *, 176 struct bfd_hash_table *, 177 const char *), 178 unsigned int entsize) 179{ 180 /* Initialize our local fields, then call the generic initialization 181 routine. */ 182 table->offset = 0; 183 table->abfd = abfd; 184 return (bfd_hash_table_init (&table->root, newfunc, entsize)); 185} 186 187/* Create the derived linker hash table. We use a derived hash table 188 basically to hold "static" information during an H8/300 coff link 189 without using static variables. */ 190 191static struct bfd_link_hash_table * 192h8300_coff_link_hash_table_create (bfd *abfd) 193{ 194 struct h8300_coff_link_hash_table *ret; 195 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table); 196 197 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt); 198 if (ret == NULL) 199 return NULL; 200 if (!_bfd_link_hash_table_init (&ret->root.root, abfd, 201 _bfd_generic_link_hash_newfunc, 202 sizeof (struct generic_link_hash_entry))) 203 { 204 free (ret); 205 return NULL; 206 } 207 208 /* Initialize our data. */ 209 ret->vectors_sec = NULL; 210 ret->funcvec_hash_table = NULL; 211 212 /* OK. Everything's initialized, return the base pointer. */ 213 return &ret->root.root; 214} 215 216/* Special handling for H8/300 relocs. 217 We only come here for pcrel stuff and return normally if not an -r link. 218 When doing -r, we can't do any arithmetic for the pcrel stuff, because 219 the code in reloc.c assumes that we can manipulate the targets of 220 the pcrel branches. This isn't so, since the H8/300 can do relaxing, 221 which means that the gap after the instruction may not be enough to 222 contain the offset required for the branch, so we have to use only 223 the addend until the final link. */ 224 225static bfd_reloc_status_type 226special (bfd *abfd ATTRIBUTE_UNUSED, 227 arelent *reloc_entry ATTRIBUTE_UNUSED, 228 asymbol *symbol ATTRIBUTE_UNUSED, 229 PTR data ATTRIBUTE_UNUSED, 230 asection *input_section ATTRIBUTE_UNUSED, 231 bfd *output_bfd, 232 char **error_message ATTRIBUTE_UNUSED) 233{ 234 if (output_bfd == (bfd *) NULL) 235 return bfd_reloc_continue; 236 237 /* Adjust the reloc address to that in the output section. */ 238 reloc_entry->address += input_section->output_offset; 239 return bfd_reloc_ok; 240} 241 242static reloc_howto_type howto_table[] = { 243 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE), 244 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 245 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE), 246 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE), 247 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE), 248 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE), 249 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 250 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE), 251 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 252 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE), 253 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE), 254 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE), 255 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE), 256 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 257 258 /* An indirect reference to a function. This causes the function's address 259 to be added to the function vector in lo-mem and puts the address of 260 the function vector's entry in the jsr instruction. */ 261 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE), 262 263 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative 264 branch is turned into an 8-bit pc-relative branch. */ 265 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE), 266 267 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE), 268 269 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 270 271 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE), 272 273 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE), 274}; 275 276/* Turn a howto into a reloc number. */ 277 278#define SELECT_RELOC(x,howto) \ 279 { x.r_type = select_reloc (howto); } 280 281#define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \ 282 && H8300HNBADMAG(x) && H8300SNBADMAG(x)) 283#define H8300 1 /* Customize coffcode.h */ 284#define __A_MAGIC_SET__ 285 286/* Code to swap in the reloc. */ 287#define SWAP_IN_RELOC_OFFSET H_GET_32 288#define SWAP_OUT_RELOC_OFFSET H_PUT_32 289#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ 290 dst->r_stuff[0] = 'S'; \ 291 dst->r_stuff[1] = 'C'; 292 293static int 294select_reloc (reloc_howto_type *howto) 295{ 296 return howto->type; 297} 298 299/* Code to turn a r_type into a howto ptr, uses the above howto table. */ 300 301static void 302rtype2howto (arelent *internal, struct internal_reloc *dst) 303{ 304 switch (dst->r_type) 305 { 306 case R_RELBYTE: 307 internal->howto = howto_table + 0; 308 break; 309 case R_RELWORD: 310 internal->howto = howto_table + 1; 311 break; 312 case R_RELLONG: 313 internal->howto = howto_table + 2; 314 break; 315 case R_PCRBYTE: 316 internal->howto = howto_table + 3; 317 break; 318 case R_PCRWORD: 319 internal->howto = howto_table + 4; 320 break; 321 case R_PCRLONG: 322 internal->howto = howto_table + 5; 323 break; 324 case R_MOV16B1: 325 internal->howto = howto_table + 6; 326 break; 327 case R_MOV16B2: 328 internal->howto = howto_table + 7; 329 break; 330 case R_JMP1: 331 internal->howto = howto_table + 8; 332 break; 333 case R_JMP2: 334 internal->howto = howto_table + 9; 335 break; 336 case R_JMPL1: 337 internal->howto = howto_table + 10; 338 break; 339 case R_JMPL2: 340 internal->howto = howto_table + 11; 341 break; 342 case R_MOV24B1: 343 internal->howto = howto_table + 12; 344 break; 345 case R_MOV24B2: 346 internal->howto = howto_table + 13; 347 break; 348 case R_MEM_INDIRECT: 349 internal->howto = howto_table + 14; 350 break; 351 case R_PCRWORD_B: 352 internal->howto = howto_table + 15; 353 break; 354 case R_MOVL1: 355 internal->howto = howto_table + 16; 356 break; 357 case R_MOVL2: 358 internal->howto = howto_table + 17; 359 break; 360 case R_BCC_INV: 361 internal->howto = howto_table + 18; 362 break; 363 case R_JMP_DEL: 364 internal->howto = howto_table + 19; 365 break; 366 default: 367 abort (); 368 break; 369 } 370} 371 372#define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry) 373 374/* Perform any necessary magic to the addend in a reloc entry. */ 375 376#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \ 377 cache_ptr->addend = ext_reloc.r_offset; 378 379#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \ 380 reloc_processing (relent, reloc, symbols, abfd, section) 381 382static void 383reloc_processing (arelent *relent, struct internal_reloc *reloc, 384 asymbol **symbols, bfd *abfd, asection *section) 385{ 386 relent->address = reloc->r_vaddr; 387 rtype2howto (relent, reloc); 388 389 if (((int) reloc->r_symndx) > 0) 390 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx]; 391 else 392 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; 393 394 relent->addend = reloc->r_offset; 395 relent->address -= section->vma; 396} 397 398static bfd_boolean 399h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address) 400{ 401 asymbol **s; 402 403 s = _bfd_generic_link_get_symbols (abfd); 404 BFD_ASSERT (s != (asymbol **) NULL); 405 406 /* Search all the symbols for one in INPUT_SECTION with 407 address ADDRESS. */ 408 while (*s) 409 { 410 asymbol *p = *s; 411 412 if (p->section == input_section 413 && (input_section->output_section->vma 414 + input_section->output_offset 415 + p->value) == address) 416 return TRUE; 417 s++; 418 } 419 return FALSE; 420} 421 422/* If RELOC represents a relaxable instruction/reloc, change it into 423 the relaxed reloc, notify the linker that symbol addresses 424 have changed (bfd_perform_slip) and return how much the current 425 section has shrunk by. 426 427 FIXME: Much of this code has knowledge of the ordering of entries 428 in the howto table. This needs to be fixed. */ 429 430static int 431h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc, 432 unsigned int shrink, struct bfd_link_info *link_info) 433{ 434 bfd_vma value; 435 bfd_vma dot; 436 bfd_vma gap; 437 static asection *last_input_section = NULL; 438 static arelent *last_reloc = NULL; 439 440 /* The address of the thing to be relocated will have moved back by 441 the size of the shrink - but we don't change reloc->address here, 442 since we need it to know where the relocation lives in the source 443 uncooked section. */ 444 bfd_vma address = reloc->address - shrink; 445 446 if (input_section != last_input_section) 447 last_reloc = NULL; 448 449 /* Only examine the relocs which might be relaxable. */ 450 switch (reloc->howto->type) 451 { 452 /* This is the 16-/24-bit absolute branch which could become an 453 8-bit pc-relative branch. */ 454 case R_JMP1: 455 case R_JMPL1: 456 /* Get the address of the target of this branch. */ 457 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 458 459 /* Get the address of the next instruction (not the reloc). */ 460 dot = (input_section->output_section->vma 461 + input_section->output_offset + address); 462 463 /* Adjust for R_JMP1 vs R_JMPL1. */ 464 dot += (reloc->howto->type == R_JMP1 ? 1 : 2); 465 466 /* Compute the distance from this insn to the branch target. */ 467 gap = value - dot; 468 469 /* If the distance is within -128..+128 inclusive, then we can relax 470 this jump. +128 is valid since the target will move two bytes 471 closer if we do relax this branch. */ 472 if ((int) gap >= -128 && (int) gap <= 128) 473 { 474 bfd_byte code; 475 476 if (!bfd_get_section_contents (abfd, input_section, & code, 477 reloc->address, 1)) 478 break; 479 code = bfd_get_8 (abfd, & code); 480 481 /* It's possible we may be able to eliminate this branch entirely; 482 if the previous instruction is a branch around this instruction, 483 and there's no label at this instruction, then we can reverse 484 the condition on the previous branch and eliminate this jump. 485 486 original: new: 487 bCC lab1 bCC' lab2 488 jmp lab2 489 lab1: lab1: 490 491 This saves 4 bytes instead of two, and should be relatively 492 common. 493 494 Only perform this optimisation for jumps (code 0x5a) not 495 subroutine calls, as otherwise it could transform: 496 497 mov.w r0,r0 498 beq .L1 499 jsr @_bar 500 .L1: rts 501 _bar: rts 502 into: 503 mov.w r0,r0 504 bne _bar 505 rts 506 _bar: rts 507 508 which changes the call (jsr) into a branch (bne). */ 509 if (code == 0x5a 510 && gap <= 126 511 && last_reloc 512 && last_reloc->howto->type == R_PCRBYTE) 513 { 514 bfd_vma last_value; 515 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info, 516 input_section) + 1; 517 518 if (last_value == dot + 2 519 && last_reloc->address + 1 == reloc->address 520 && !h8300_symbol_address_p (abfd, input_section, dot - 2)) 521 { 522 reloc->howto = howto_table + 19; 523 last_reloc->howto = howto_table + 18; 524 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr; 525 last_reloc->addend = reloc->addend; 526 shrink += 4; 527 bfd_perform_slip (abfd, 4, input_section, address); 528 break; 529 } 530 } 531 532 /* Change the reloc type. */ 533 reloc->howto = reloc->howto + 1; 534 535 /* This shrinks this section by two bytes. */ 536 shrink += 2; 537 bfd_perform_slip (abfd, 2, input_section, address); 538 } 539 break; 540 541 /* This is the 16-bit pc-relative branch which could become an 8-bit 542 pc-relative branch. */ 543 case R_PCRWORD: 544 /* Get the address of the target of this branch, add one to the value 545 because the addend field in PCrel jumps is off by -1. */ 546 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1; 547 548 /* Get the address of the next instruction if we were to relax. */ 549 dot = input_section->output_section->vma + 550 input_section->output_offset + address; 551 552 /* Compute the distance from this insn to the branch target. */ 553 gap = value - dot; 554 555 /* If the distance is within -128..+128 inclusive, then we can relax 556 this jump. +128 is valid since the target will move two bytes 557 closer if we do relax this branch. */ 558 if ((int) gap >= -128 && (int) gap <= 128) 559 { 560 /* Change the reloc type. */ 561 reloc->howto = howto_table + 15; 562 563 /* This shrinks this section by two bytes. */ 564 shrink += 2; 565 bfd_perform_slip (abfd, 2, input_section, address); 566 } 567 break; 568 569 /* This is a 16-bit absolute address in a mov.b insn, which can 570 become an 8-bit absolute address if it's in the right range. */ 571 case R_MOV16B1: 572 /* Get the address of the data referenced by this mov.b insn. */ 573 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 574 value = bfd_h8300_pad_address (abfd, value); 575 576 /* If the address is in the top 256 bytes of the address space 577 then we can relax this instruction. */ 578 if (value >= 0xffffff00u) 579 { 580 /* Change the reloc type. */ 581 reloc->howto = reloc->howto + 1; 582 583 /* This shrinks this section by two bytes. */ 584 shrink += 2; 585 bfd_perform_slip (abfd, 2, input_section, address); 586 } 587 break; 588 589 /* Similarly for a 24-bit absolute address in a mov.b. Note that 590 if we can't relax this into an 8-bit absolute, we'll fall through 591 and try to relax it into a 16-bit absolute. */ 592 case R_MOV24B1: 593 /* Get the address of the data referenced by this mov.b insn. */ 594 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 595 value = bfd_h8300_pad_address (abfd, value); 596 597 if (value >= 0xffffff00u) 598 { 599 /* Change the reloc type. */ 600 reloc->howto = reloc->howto + 1; 601 602 /* This shrinks this section by four bytes. */ 603 shrink += 4; 604 bfd_perform_slip (abfd, 4, input_section, address); 605 606 /* Done with this reloc. */ 607 break; 608 } 609 610 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit 611 reloc. */ 612 613 /* This is a 24-/32-bit absolute address in a mov insn, which can 614 become an 16-bit absolute address if it's in the right range. */ 615 case R_MOVL1: 616 /* Get the address of the data referenced by this mov insn. */ 617 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 618 value = bfd_h8300_pad_address (abfd, value); 619 620 /* If the address is a sign-extended 16-bit value then we can 621 relax this instruction. */ 622 if (value <= 0x7fff || value >= 0xffff8000u) 623 { 624 /* Change the reloc type. */ 625 reloc->howto = howto_table + 17; 626 627 /* This shrinks this section by two bytes. */ 628 shrink += 2; 629 bfd_perform_slip (abfd, 2, input_section, address); 630 } 631 break; 632 633 /* No other reloc types represent relaxing opportunities. */ 634 default: 635 break; 636 } 637 638 last_reloc = reloc; 639 last_input_section = input_section; 640 return shrink; 641} 642 643/* Handle relocations for the H8/300, including relocs for relaxed 644 instructions. 645 646 FIXME: Not all relocations check for overflow! */ 647 648static void 649h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info, 650 struct bfd_link_order *link_order, arelent *reloc, 651 bfd_byte *data, unsigned int *src_ptr, 652 unsigned int *dst_ptr) 653{ 654 unsigned int src_address = *src_ptr; 655 unsigned int dst_address = *dst_ptr; 656 asection *input_section = link_order->u.indirect.section; 657 bfd_vma value; 658 bfd_vma dot; 659 int gap, tmp; 660 unsigned char temp_code; 661 662 switch (reloc->howto->type) 663 { 664 /* Generic 8-bit pc-relative relocation. */ 665 case R_PCRBYTE: 666 /* Get the address of the target of this branch. */ 667 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 668 669 dot = (input_section->output_offset 670 + dst_address 671 + link_order->u.indirect.section->output_section->vma); 672 673 gap = value - dot; 674 675 /* Sanity check. */ 676 if (gap < -128 || gap > 126) 677 { 678 if (! ((*link_info->callbacks->reloc_overflow) 679 (link_info, NULL, 680 bfd_asymbol_name (*reloc->sym_ptr_ptr), 681 reloc->howto->name, reloc->addend, input_section->owner, 682 input_section, reloc->address))) 683 abort (); 684 } 685 686 /* Everything looks OK. Apply the relocation and update the 687 src/dst address appropriately. */ 688 bfd_put_8 (abfd, gap, data + dst_address); 689 dst_address++; 690 src_address++; 691 692 /* All done. */ 693 break; 694 695 /* Generic 16-bit pc-relative relocation. */ 696 case R_PCRWORD: 697 /* Get the address of the target of this branch. */ 698 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 699 700 /* Get the address of the instruction (not the reloc). */ 701 dot = (input_section->output_offset 702 + dst_address 703 + link_order->u.indirect.section->output_section->vma + 1); 704 705 gap = value - dot; 706 707 /* Sanity check. */ 708 if (gap > 32766 || gap < -32768) 709 { 710 if (! ((*link_info->callbacks->reloc_overflow) 711 (link_info, NULL, 712 bfd_asymbol_name (*reloc->sym_ptr_ptr), 713 reloc->howto->name, reloc->addend, input_section->owner, 714 input_section, reloc->address))) 715 abort (); 716 } 717 718 /* Everything looks OK. Apply the relocation and update the 719 src/dst address appropriately. */ 720 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address); 721 dst_address += 2; 722 src_address += 2; 723 724 /* All done. */ 725 break; 726 727 /* Generic 8-bit absolute relocation. */ 728 case R_RELBYTE: 729 /* Get the address of the object referenced by this insn. */ 730 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 731 732 bfd_put_8 (abfd, value & 0xff, data + dst_address); 733 dst_address += 1; 734 src_address += 1; 735 736 /* All done. */ 737 break; 738 739 /* Various simple 16-bit absolute relocations. */ 740 case R_MOV16B1: 741 case R_JMP1: 742 case R_RELWORD: 743 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 744 bfd_put_16 (abfd, value, data + dst_address); 745 dst_address += 2; 746 src_address += 2; 747 break; 748 749 /* Various simple 24-/32-bit absolute relocations. */ 750 case R_MOV24B1: 751 case R_MOVL1: 752 case R_RELLONG: 753 /* Get the address of the target of this branch. */ 754 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 755 bfd_put_32 (abfd, value, data + dst_address); 756 dst_address += 4; 757 src_address += 4; 758 break; 759 760 /* Another 24-/32-bit absolute relocation. */ 761 case R_JMPL1: 762 /* Get the address of the target of this branch. */ 763 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 764 765 value = ((value & 0x00ffffff) 766 | (bfd_get_32 (abfd, data + src_address) & 0xff000000)); 767 bfd_put_32 (abfd, value, data + dst_address); 768 dst_address += 4; 769 src_address += 4; 770 break; 771 772 /* This is a 24-/32-bit absolute address in one of the following 773 instructions: 774 775 "band", "bclr", "biand", "bild", "bior", "bist", "bixor", 776 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w", 777 "stc.w" and "mov.[bwl]" 778 779 We may relax this into an 16-bit absolute address if it's in 780 the right range. */ 781 case R_MOVL2: 782 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 783 value = bfd_h8300_pad_address (abfd, value); 784 785 /* Sanity check. */ 786 if (value <= 0x7fff || value >= 0xffff8000u) 787 { 788 /* Insert the 16-bit value into the proper location. */ 789 bfd_put_16 (abfd, value, data + dst_address); 790 791 /* Fix the opcode. For all the instructions that belong to 792 this relaxation, we simply need to turn off bit 0x20 in 793 the previous byte. */ 794 data[dst_address - 1] &= ~0x20; 795 dst_address += 2; 796 src_address += 4; 797 } 798 else 799 { 800 if (! ((*link_info->callbacks->reloc_overflow) 801 (link_info, NULL, 802 bfd_asymbol_name (*reloc->sym_ptr_ptr), 803 reloc->howto->name, reloc->addend, input_section->owner, 804 input_section, reloc->address))) 805 abort (); 806 } 807 break; 808 809 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */ 810 case R_JMP2: 811 /* Get the address of the target of this branch. */ 812 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 813 814 /* Get the address of the next instruction. */ 815 dot = (input_section->output_offset 816 + dst_address 817 + link_order->u.indirect.section->output_section->vma + 1); 818 819 gap = value - dot; 820 821 /* Sanity check. */ 822 if (gap < -128 || gap > 126) 823 { 824 if (! ((*link_info->callbacks->reloc_overflow) 825 (link_info, NULL, 826 bfd_asymbol_name (*reloc->sym_ptr_ptr), 827 reloc->howto->name, reloc->addend, input_section->owner, 828 input_section, reloc->address))) 829 abort (); 830 } 831 832 /* Now fix the instruction itself. */ 833 switch (data[dst_address - 1]) 834 { 835 case 0x5e: 836 /* jsr -> bsr */ 837 bfd_put_8 (abfd, 0x55, data + dst_address - 1); 838 break; 839 case 0x5a: 840 /* jmp -> bra */ 841 bfd_put_8 (abfd, 0x40, data + dst_address - 1); 842 break; 843 844 default: 845 abort (); 846 } 847 848 /* Write out the 8-bit value. */ 849 bfd_put_8 (abfd, gap, data + dst_address); 850 851 dst_address += 1; 852 src_address += 3; 853 854 break; 855 856 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */ 857 case R_PCRWORD_B: 858 /* Get the address of the target of this branch. */ 859 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 860 861 /* Get the address of the instruction (not the reloc). */ 862 dot = (input_section->output_offset 863 + dst_address 864 + link_order->u.indirect.section->output_section->vma - 1); 865 866 gap = value - dot; 867 868 /* Sanity check. */ 869 if (gap < -128 || gap > 126) 870 { 871 if (! ((*link_info->callbacks->reloc_overflow) 872 (link_info, NULL, 873 bfd_asymbol_name (*reloc->sym_ptr_ptr), 874 reloc->howto->name, reloc->addend, input_section->owner, 875 input_section, reloc->address))) 876 abort (); 877 } 878 879 /* Now fix the instruction. */ 880 switch (data[dst_address - 2]) 881 { 882 case 0x58: 883 /* bCC:16 -> bCC:8 */ 884 /* Get the second byte of the original insn, which contains 885 the condition code. */ 886 tmp = data[dst_address - 1]; 887 888 /* Compute the fisrt byte of the relaxed instruction. The 889 original sequence 0x58 0xX0 is relaxed to 0x4X, where X 890 represents the condition code. */ 891 tmp &= 0xf0; 892 tmp >>= 4; 893 tmp |= 0x40; 894 895 /* Write it. */ 896 bfd_put_8 (abfd, tmp, data + dst_address - 2); 897 break; 898 899 case 0x5c: 900 /* bsr:16 -> bsr:8 */ 901 bfd_put_8 (abfd, 0x55, data + dst_address - 2); 902 break; 903 904 default: 905 abort (); 906 } 907 908 /* Output the target. */ 909 bfd_put_8 (abfd, gap, data + dst_address - 1); 910 911 /* We don't advance dst_address -- the 8-bit reloc is applied at 912 dst_address - 1, so the next insn should begin at dst_address. */ 913 src_address += 2; 914 915 break; 916 917 /* Similarly for a 24-bit absolute that is now 8 bits. */ 918 case R_JMPL2: 919 /* Get the address of the target of this branch. */ 920 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 921 922 /* Get the address of the instruction (not the reloc). */ 923 dot = (input_section->output_offset 924 + dst_address 925 + link_order->u.indirect.section->output_section->vma + 2); 926 927 gap = value - dot; 928 929 /* Fix the instruction. */ 930 switch (data[src_address]) 931 { 932 case 0x5e: 933 /* jsr -> bsr */ 934 bfd_put_8 (abfd, 0x55, data + dst_address); 935 break; 936 case 0x5a: 937 /* jmp ->bra */ 938 bfd_put_8 (abfd, 0x40, data + dst_address); 939 break; 940 default: 941 abort (); 942 } 943 944 bfd_put_8 (abfd, gap, data + dst_address + 1); 945 dst_address += 2; 946 src_address += 4; 947 948 break; 949 950 /* This is a 16-bit absolute address in one of the following 951 instructions: 952 953 "band", "bclr", "biand", "bild", "bior", "bist", "bixor", 954 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and 955 "mov.b" 956 957 We may relax this into an 8-bit absolute address if it's in 958 the right range. */ 959 case R_MOV16B2: 960 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 961 962 /* All instructions with R_H8_DIR16B2 start with 0x6a. */ 963 if (data[dst_address - 2] != 0x6a) 964 abort (); 965 966 temp_code = data[src_address - 1]; 967 968 /* If this is a mov.b instruction, clear the lower nibble, which 969 contains the source/destination register number. */ 970 if ((temp_code & 0x10) != 0x10) 971 temp_code &= 0xf0; 972 973 /* Fix up the opcode. */ 974 switch (temp_code) 975 { 976 case 0x00: 977 /* This is mov.b @aa:16,Rd. */ 978 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; 979 break; 980 case 0x80: 981 /* This is mov.b Rs,@aa:16. */ 982 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; 983 break; 984 case 0x18: 985 /* This is a bit-maniputation instruction that stores one 986 bit into memory, one of "bclr", "bist", "bnot", "bset", 987 and "bst". */ 988 data[dst_address - 2] = 0x7f; 989 break; 990 case 0x10: 991 /* This is a bit-maniputation instruction that loads one bit 992 from memory, one of "band", "biand", "bild", "bior", 993 "bixor", "bld", "bor", "btst", and "bxor". */ 994 data[dst_address - 2] = 0x7e; 995 break; 996 default: 997 abort (); 998 } 999 1000 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); 1001 src_address += 2; 1002 break; 1003 1004 /* This is a 24-bit absolute address in one of the following 1005 instructions: 1006 1007 "band", "bclr", "biand", "bild", "bior", "bist", "bixor", 1008 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and 1009 "mov.b" 1010 1011 We may relax this into an 8-bit absolute address if it's in 1012 the right range. */ 1013 case R_MOV24B2: 1014 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 1015 1016 /* All instructions with R_MOV24B2 start with 0x6a. */ 1017 if (data[dst_address - 2] != 0x6a) 1018 abort (); 1019 1020 temp_code = data[src_address - 1]; 1021 1022 /* If this is a mov.b instruction, clear the lower nibble, which 1023 contains the source/destination register number. */ 1024 if ((temp_code & 0x30) != 0x30) 1025 temp_code &= 0xf0; 1026 1027 /* Fix up the opcode. */ 1028 switch (temp_code) 1029 { 1030 case 0x20: 1031 /* This is mov.b @aa:24/32,Rd. */ 1032 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; 1033 break; 1034 case 0xa0: 1035 /* This is mov.b Rs,@aa:24/32. */ 1036 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; 1037 break; 1038 case 0x38: 1039 /* This is a bit-maniputation instruction that stores one 1040 bit into memory, one of "bclr", "bist", "bnot", "bset", 1041 and "bst". */ 1042 data[dst_address - 2] = 0x7f; 1043 break; 1044 case 0x30: 1045 /* This is a bit-maniputation instruction that loads one bit 1046 from memory, one of "band", "biand", "bild", "bior", 1047 "bixor", "bld", "bor", "btst", and "bxor". */ 1048 data[dst_address - 2] = 0x7e; 1049 break; 1050 default: 1051 abort (); 1052 } 1053 1054 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); 1055 src_address += 4; 1056 break; 1057 1058 case R_BCC_INV: 1059 /* Get the address of the target of this branch. */ 1060 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 1061 1062 dot = (input_section->output_offset 1063 + dst_address 1064 + link_order->u.indirect.section->output_section->vma) + 1; 1065 1066 gap = value - dot; 1067 1068 /* Sanity check. */ 1069 if (gap < -128 || gap > 126) 1070 { 1071 if (! ((*link_info->callbacks->reloc_overflow) 1072 (link_info, NULL, 1073 bfd_asymbol_name (*reloc->sym_ptr_ptr), 1074 reloc->howto->name, reloc->addend, input_section->owner, 1075 input_section, reloc->address))) 1076 abort (); 1077 } 1078 1079 /* Everything looks OK. Fix the condition in the instruction, apply 1080 the relocation, and update the src/dst address appropriately. */ 1081 1082 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1, 1083 data + dst_address - 1); 1084 bfd_put_8 (abfd, gap, data + dst_address); 1085 dst_address++; 1086 src_address++; 1087 1088 /* All done. */ 1089 break; 1090 1091 case R_JMP_DEL: 1092 src_address += 4; 1093 break; 1094 1095 /* An 8-bit memory indirect instruction (jmp/jsr). 1096 1097 There's several things that need to be done to handle 1098 this relocation. 1099 1100 If this is a reloc against the absolute symbol, then 1101 we should handle it just R_RELBYTE. Likewise if it's 1102 for a symbol with a value ge 0 and le 0xff. 1103 1104 Otherwise it's a jump/call through the function vector, 1105 and the linker is expected to set up the function vector 1106 and put the right value into the jump/call instruction. */ 1107 case R_MEM_INDIRECT: 1108 { 1109 /* We need to find the symbol so we can determine it's 1110 address in the function vector table. */ 1111 asymbol *symbol; 1112 const char *name; 1113 struct funcvec_hash_table *ftab; 1114 struct funcvec_hash_entry *h; 1115 struct h8300_coff_link_hash_table *htab; 1116 asection *vectors_sec; 1117 1118 if (link_info->hash->creator != abfd->xvec) 1119 { 1120 (*_bfd_error_handler) 1121 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"), 1122 link_info->hash->creator->name); 1123 1124 /* What else can we do? This function doesn't allow return 1125 of an error, and we don't want to call abort as that 1126 indicates an internal error. */ 1127#ifndef EXIT_FAILURE 1128#define EXIT_FAILURE 1 1129#endif 1130 xexit (EXIT_FAILURE); 1131 } 1132 htab = h8300_coff_hash_table (link_info); 1133 vectors_sec = htab->vectors_sec; 1134 1135 /* First see if this is a reloc against the absolute symbol 1136 or against a symbol with a nonnegative value <= 0xff. */ 1137 symbol = *(reloc->sym_ptr_ptr); 1138 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 1139 if (symbol == bfd_abs_section_ptr->symbol 1140 || value <= 0xff) 1141 { 1142 /* This should be handled in a manner very similar to 1143 R_RELBYTES. If the value is in range, then just slam 1144 the value into the right location. Else trigger a 1145 reloc overflow callback. */ 1146 if (value <= 0xff) 1147 { 1148 bfd_put_8 (abfd, value, data + dst_address); 1149 dst_address += 1; 1150 src_address += 1; 1151 } 1152 else 1153 { 1154 if (! ((*link_info->callbacks->reloc_overflow) 1155 (link_info, NULL, 1156 bfd_asymbol_name (*reloc->sym_ptr_ptr), 1157 reloc->howto->name, reloc->addend, input_section->owner, 1158 input_section, reloc->address))) 1159 abort (); 1160 } 1161 break; 1162 } 1163 1164 /* This is a jump/call through a function vector, and we're 1165 expected to create the function vector ourselves. 1166 1167 First look up this symbol in the linker hash table -- we need 1168 the derived linker symbol which holds this symbol's index 1169 in the function vector. */ 1170 name = symbol->name; 1171 if (symbol->flags & BSF_LOCAL) 1172 { 1173 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); 1174 1175 if (new_name == NULL) 1176 abort (); 1177 1178 sprintf (new_name, "%s_%08x", name, symbol->section->id); 1179 name = new_name; 1180 } 1181 1182 ftab = htab->funcvec_hash_table; 1183 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); 1184 1185 /* This shouldn't ever happen. If it does that means we've got 1186 data corruption of some kind. Aborting seems like a reasonable 1187 thing to do here. */ 1188 if (h == NULL || vectors_sec == NULL) 1189 abort (); 1190 1191 /* Place the address of the function vector entry into the 1192 reloc's address. */ 1193 bfd_put_8 (abfd, 1194 vectors_sec->output_offset + h->offset, 1195 data + dst_address); 1196 1197 dst_address++; 1198 src_address++; 1199 1200 /* Now create an entry in the function vector itself. */ 1201 switch (bfd_get_mach (input_section->owner)) 1202 { 1203 case bfd_mach_h8300: 1204 case bfd_mach_h8300hn: 1205 case bfd_mach_h8300sn: 1206 bfd_put_16 (abfd, 1207 bfd_coff_reloc16_get_value (reloc, 1208 link_info, 1209 input_section), 1210 vectors_sec->contents + h->offset); 1211 break; 1212 case bfd_mach_h8300h: 1213 case bfd_mach_h8300s: 1214 bfd_put_32 (abfd, 1215 bfd_coff_reloc16_get_value (reloc, 1216 link_info, 1217 input_section), 1218 vectors_sec->contents + h->offset); 1219 break; 1220 default: 1221 abort (); 1222 } 1223 1224 /* Gross. We've already written the contents of the vector section 1225 before we get here... So we write it again with the new data. */ 1226 bfd_set_section_contents (vectors_sec->output_section->owner, 1227 vectors_sec->output_section, 1228 vectors_sec->contents, 1229 (file_ptr) vectors_sec->output_offset, 1230 vectors_sec->size); 1231 break; 1232 } 1233 1234 default: 1235 abort (); 1236 break; 1237 1238 } 1239 1240 *src_ptr = src_address; 1241 *dst_ptr = dst_address; 1242} 1243 1244/* Routine for the h8300 linker. 1245 1246 This routine is necessary to handle the special R_MEM_INDIRECT 1247 relocs on the h8300. It's responsible for generating a vectors 1248 section and attaching it to an input bfd as well as sizing 1249 the vectors section. It also creates our vectors hash table. 1250 1251 It uses the generic linker routines to actually add the symbols. 1252 from this BFD to the bfd linker hash table. It may add a few 1253 selected static symbols to the bfd linker hash table. */ 1254 1255static bfd_boolean 1256h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info) 1257{ 1258 asection *sec; 1259 struct funcvec_hash_table *funcvec_hash_table; 1260 bfd_size_type amt; 1261 struct h8300_coff_link_hash_table *htab; 1262 1263 /* Add the symbols using the generic code. */ 1264 _bfd_generic_link_add_symbols (abfd, info); 1265 1266 if (info->hash->creator != abfd->xvec) 1267 return TRUE; 1268 1269 htab = h8300_coff_hash_table (info); 1270 1271 /* If we haven't created a vectors section, do so now. */ 1272 if (!htab->vectors_sec) 1273 { 1274 flagword flags; 1275 1276 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */ 1277 flags = (SEC_ALLOC | SEC_LOAD 1278 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY); 1279 htab->vectors_sec = bfd_make_section_with_flags (abfd, ".vectors", 1280 flags); 1281 1282 /* If the section wasn't created, or we couldn't set the flags, 1283 quit quickly now, rather than dying a painful death later. */ 1284 if (!htab->vectors_sec) 1285 return FALSE; 1286 1287 /* Also create the vector hash table. */ 1288 amt = sizeof (struct funcvec_hash_table); 1289 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt); 1290 1291 if (!funcvec_hash_table) 1292 return FALSE; 1293 1294 /* And initialize the funcvec hash table. */ 1295 if (!funcvec_hash_table_init (funcvec_hash_table, abfd, 1296 funcvec_hash_newfunc, 1297 sizeof (struct funcvec_hash_entry))) 1298 { 1299 bfd_release (abfd, funcvec_hash_table); 1300 return FALSE; 1301 } 1302 1303 /* Store away a pointer to the funcvec hash table. */ 1304 htab->funcvec_hash_table = funcvec_hash_table; 1305 } 1306 1307 /* Load up the function vector hash table. */ 1308 funcvec_hash_table = htab->funcvec_hash_table; 1309 1310 /* Now scan the relocs for all the sections in this bfd; create 1311 additional space in the .vectors section as needed. */ 1312 for (sec = abfd->sections; sec; sec = sec->next) 1313 { 1314 long reloc_size, reloc_count, i; 1315 asymbol **symbols; 1316 arelent **relocs; 1317 1318 /* Suck in the relocs, symbols & canonicalize them. */ 1319 reloc_size = bfd_get_reloc_upper_bound (abfd, sec); 1320 if (reloc_size <= 0) 1321 continue; 1322 1323 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size); 1324 if (!relocs) 1325 return FALSE; 1326 1327 /* The symbols should have been read in by _bfd_generic link_add_symbols 1328 call abovec, so we can cheat and use the pointer to them that was 1329 saved in the above call. */ 1330 symbols = _bfd_generic_link_get_symbols(abfd); 1331 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols); 1332 if (reloc_count <= 0) 1333 { 1334 free (relocs); 1335 continue; 1336 } 1337 1338 /* Now walk through all the relocations in this section. */ 1339 for (i = 0; i < reloc_count; i++) 1340 { 1341 arelent *reloc = relocs[i]; 1342 asymbol *symbol = *(reloc->sym_ptr_ptr); 1343 const char *name; 1344 1345 /* We've got an indirect reloc. See if we need to add it 1346 to the function vector table. At this point, we have 1347 to add a new entry for each unique symbol referenced 1348 by an R_MEM_INDIRECT relocation except for a reloc 1349 against the absolute section symbol. */ 1350 if (reloc->howto->type == R_MEM_INDIRECT 1351 && symbol != bfd_abs_section_ptr->symbol) 1352 1353 { 1354 struct funcvec_hash_table *ftab; 1355 struct funcvec_hash_entry *h; 1356 1357 name = symbol->name; 1358 if (symbol->flags & BSF_LOCAL) 1359 { 1360 char *new_name; 1361 1362 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); 1363 if (new_name == NULL) 1364 abort (); 1365 1366 sprintf (new_name, "%s_%08x", name, symbol->section->id); 1367 name = new_name; 1368 } 1369 1370 /* Look this symbol up in the function vector hash table. */ 1371 ftab = htab->funcvec_hash_table; 1372 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); 1373 1374 /* If this symbol isn't already in the hash table, add 1375 it and bump up the size of the hash table. */ 1376 if (h == NULL) 1377 { 1378 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE); 1379 if (h == NULL) 1380 { 1381 free (relocs); 1382 return FALSE; 1383 } 1384 1385 /* Bump the size of the vectors section. Each vector 1386 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */ 1387 switch (bfd_get_mach (abfd)) 1388 { 1389 case bfd_mach_h8300: 1390 case bfd_mach_h8300hn: 1391 case bfd_mach_h8300sn: 1392 htab->vectors_sec->size += 2; 1393 break; 1394 case bfd_mach_h8300h: 1395 case bfd_mach_h8300s: 1396 htab->vectors_sec->size += 4; 1397 break; 1398 default: 1399 abort (); 1400 } 1401 } 1402 } 1403 } 1404 1405 /* We're done with the relocations, release them. */ 1406 free (relocs); 1407 } 1408 1409 /* Now actually allocate some space for the function vector. It's 1410 wasteful to do this more than once, but this is easier. */ 1411 sec = htab->vectors_sec; 1412 if (sec->size != 0) 1413 { 1414 /* Free the old contents. */ 1415 if (sec->contents) 1416 free (sec->contents); 1417 1418 /* Allocate new contents. */ 1419 sec->contents = bfd_malloc (sec->size); 1420 } 1421 1422 return TRUE; 1423} 1424 1425#define coff_reloc16_extra_cases h8300_reloc16_extra_cases 1426#define coff_reloc16_estimate h8300_reloc16_estimate 1427#define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols 1428#define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create 1429 1430#define COFF_LONG_FILENAMES 1431#include "coffcode.h" 1432 1433#undef coff_bfd_get_relocated_section_contents 1434#undef coff_bfd_relax_section 1435#define coff_bfd_get_relocated_section_contents \ 1436 bfd_coff_reloc16_get_relocated_section_contents 1437#define coff_bfd_relax_section bfd_coff_reloc16_relax_section 1438 1439CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE) 1440