1/* 2 * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved. 3 * 4 * @APPLE_LICENSE_HEADER_START@ 5 * 6 * The contents of this file constitute Original Code as defined in and 7 * are subject to the Apple Public Source License Version 1.1 (the 8 * "License"). You may not use this file except in compliance with the 9 * License. Please obtain a copy of the License at 10 * http://www.apple.com/publicsource and read it before using this file. 11 * 12 * This Original Code and all software distributed under the License are 13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER 14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the 17 * License for the specific language governing rights and limitations 18 * under the License. 19 * 20 * @APPLE_LICENSE_HEADER_END@ 21 */ 22/* 23 File: Video.h 24 25 Contains: Video Driver Interfaces. 26 27 Copyright: (c) 1986-2000 by Apple Computer, Inc., all rights reserved 28 29 Bugs?: For bug reports, consult the following page on 30 the World Wide Web: 31 32 http://developer.apple.com/bugreporter/ 33 34*/ 35#ifndef __IOMACOSVIDEO__ 36#define __IOMACOSVIDEO__ 37 38#define PRAGMA_STRUCT_ALIGN 1 39#define FOUR_CHAR_CODE(x) (x) 40#include <IOKit/ndrvsupport/IOMacOSTypes.h> 41 42#ifdef __cplusplus 43extern "C" { 44#endif 45 46#ifndef __LP64__ 47#pragma options align=mac68k 48#endif 49 50enum { 51 mBaseOffset = 1, /*Id of mBaseOffset.*/ 52 mRowBytes = 2, /*Video sResource parameter Id's */ 53 mBounds = 3, /*Video sResource parameter Id's */ 54 mVersion = 4, /*Video sResource parameter Id's */ 55 mHRes = 5, /*Video sResource parameter Id's */ 56 mVRes = 6, /*Video sResource parameter Id's */ 57 mPixelType = 7, /*Video sResource parameter Id's */ 58 mPixelSize = 8, /*Video sResource parameter Id's */ 59 mCmpCount = 9, /*Video sResource parameter Id's */ 60 mCmpSize = 10, /*Video sResource parameter Id's */ 61 mPlaneBytes = 11, /*Video sResource parameter Id's */ 62 mVertRefRate = 14, /*Video sResource parameter Id's */ 63 mVidParams = 1, /*Video parameter block id.*/ 64 mTable = 2, /*Offset to the table.*/ 65 mPageCnt = 3, /*Number of pages*/ 66 mDevType = 4, /*Device Type*/ 67 oneBitMode = 128, /*Id of OneBitMode Parameter list.*/ 68 twoBitMode = 129, /*Id of TwoBitMode Parameter list.*/ 69 fourBitMode = 130, /*Id of FourBitMode Parameter list.*/ 70 eightBitMode = 131 /*Id of EightBitMode Parameter list.*/ 71}; 72 73enum { 74 sixteenBitMode = 132, /*Id of SixteenBitMode Parameter list.*/ 75 thirtyTwoBitMode = 133, /*Id of ThirtyTwoBitMode Parameter list.*/ 76 firstVidMode = 128, /*The new, better way to do the above. */ 77 secondVidMode = 129, /* QuickDraw only supports six video */ 78 thirdVidMode = 130, /* at this time. */ 79 fourthVidMode = 131, 80 fifthVidMode = 132, 81 sixthVidMode = 133, 82 spGammaDir = 64, 83 spVidNamesDir = 65 84}; 85 86typedef UInt32 AVIDType; 87typedef AVIDType DisplayIDType; 88typedef IODisplayModeID DisplayModeID; 89typedef UInt16 DepthMode; 90typedef UInt32 VideoDeviceType; 91typedef UInt32 GammaTableID; 92 93/* csTimingFormat values in VDTimingInfo */ 94/* look in the declaration rom for timing info */ 95enum { 96 kDeclROMtables = FOUR_CHAR_CODE('decl'), 97 kDetailedTimingFormat = FOUR_CHAR_CODE('arba') /* Timing is a detailed timing*/ 98}; 99 100/* Size of a block of EDID (Extended Display Identification Data) */ 101enum { 102 kDDCBlockSize = 128 103}; 104 105/* ddcBlockType constants*/ 106enum { 107 kDDCBlockTypeEDID = 0 /* EDID block type. */ 108}; 109 110/* ddcFlags constants*/ 111enum { 112 kDDCForceReadBit = 0, /* Force a new read of the EDID. */ 113 kDDCForceReadMask = (1 << kDDCForceReadBit) /* Mask for kddcForceReadBit. */ 114}; 115 116 117/* Timing mode constants for Display Manager MultiMode support 118 Corresponding .h equates are in Video.h 119 .a equates are in Video.a 120 .r equates are in DepVideoEqu.r 121 122 The second enum is the old names (for compatibility). 123 The first enum is the new names. 124*/ 125enum { 126 timingInvalid = 0, /* Unknown timing... force user to confirm. */ 127 timingInvalid_SM_T24 = 8, /* Work around bug in SM Thunder24 card.*/ 128 timingApple_FixedRateLCD = 42, /* Lump all fixed-rate LCDs into one category.*/ 129 timingApple_512x384_60hz = 130, /* 512x384 (60 Hz) Rubik timing. */ 130 timingApple_560x384_60hz = 135, /* 560x384 (60 Hz) Rubik-560 timing. */ 131 timingApple_640x480_67hz = 140, /* 640x480 (67 Hz) HR timing. */ 132 timingApple_640x400_67hz = 145, /* 640x400 (67 Hz) HR-400 timing. */ 133 timingVESA_640x480_60hz = 150, /* 640x480 (60 Hz) VGA timing. */ 134 timingVESA_640x480_72hz = 152, /* 640x480 (72 Hz) VGA timing. */ 135 timingVESA_640x480_75hz = 154, /* 640x480 (75 Hz) VGA timing. */ 136 timingVESA_640x480_85hz = 158, /* 640x480 (85 Hz) VGA timing. */ 137 timingGTF_640x480_120hz = 159, /* 640x480 (120 Hz) VESA Generalized Timing Formula */ 138 timingApple_640x870_75hz = 160, /* 640x870 (75 Hz) FPD timing.*/ 139 timingApple_640x818_75hz = 165, /* 640x818 (75 Hz) FPD-818 timing.*/ 140 timingApple_832x624_75hz = 170, /* 832x624 (75 Hz) GoldFish timing.*/ 141 timingVESA_800x600_56hz = 180, /* 800x600 (56 Hz) SVGA timing. */ 142 timingVESA_800x600_60hz = 182, /* 800x600 (60 Hz) SVGA timing. */ 143 timingVESA_800x600_72hz = 184, /* 800x600 (72 Hz) SVGA timing. */ 144 timingVESA_800x600_75hz = 186, /* 800x600 (75 Hz) SVGA timing. */ 145 timingVESA_800x600_85hz = 188, /* 800x600 (85 Hz) SVGA timing. */ 146 timingVESA_1024x768_60hz = 190, /* 1024x768 (60 Hz) VESA 1K-60Hz timing. */ 147 timingVESA_1024x768_70hz = 200, /* 1024x768 (70 Hz) VESA 1K-70Hz timing. */ 148 timingVESA_1024x768_75hz = 204, /* 1024x768 (75 Hz) VESA 1K-75Hz timing (very similar to timingApple_1024x768_75hz). */ 149 timingVESA_1024x768_85hz = 208, /* 1024x768 (85 Hz) VESA timing. */ 150 timingApple_1024x768_75hz = 210, /* 1024x768 (75 Hz) Apple 19" RGB. */ 151 timingApple_1152x870_75hz = 220, /* 1152x870 (75 Hz) Apple 21" RGB. */ 152 timingAppleNTSC_ST = 230, /* 512x384 (60 Hz, interlaced, non-convolved). */ 153 timingAppleNTSC_FF = 232, /* 640x480 (60 Hz, interlaced, non-convolved). */ 154 timingAppleNTSC_STconv = 234, /* 512x384 (60 Hz, interlaced, convolved). */ 155 timingAppleNTSC_FFconv = 236, /* 640x480 (60 Hz, interlaced, convolved). */ 156 timingApplePAL_ST = 238, /* 640x480 (50 Hz, interlaced, non-convolved). */ 157 timingApplePAL_FF = 240, /* 768x576 (50 Hz, interlaced, non-convolved). */ 158 timingApplePAL_STconv = 242, /* 640x480 (50 Hz, interlaced, convolved). */ 159 timingApplePAL_FFconv = 244, /* 768x576 (50 Hz, interlaced, convolved). */ 160 timingVESA_1280x960_75hz = 250, /* 1280x960 (75 Hz) */ 161 timingVESA_1280x960_60hz = 252, /* 1280x960 (60 Hz) */ 162 timingVESA_1280x960_85hz = 254, /* 1280x960 (85 Hz) */ 163 timingVESA_1280x1024_60hz = 260, /* 1280x1024 (60 Hz) */ 164 timingVESA_1280x1024_75hz = 262, /* 1280x1024 (75 Hz) */ 165 timingVESA_1280x1024_85hz = 268, /* 1280x1024 (85 Hz) */ 166 timingVESA_1600x1200_60hz = 280, /* 1600x1200 (60 Hz) VESA timing. */ 167 timingVESA_1600x1200_65hz = 282, /* 1600x1200 (65 Hz) VESA timing. */ 168 timingVESA_1600x1200_70hz = 284, /* 1600x1200 (70 Hz) VESA timing. */ 169 timingVESA_1600x1200_75hz = 286, /* 1600x1200 (75 Hz) VESA timing (pixel clock is 189.2 Mhz dot clock). */ 170 timingVESA_1600x1200_80hz = 288, /* 1600x1200 (80 Hz) VESA timing (pixel clock is 216>? Mhz dot clock) - proposed only. */ 171 timingVESA_1600x1200_85hz = 289, /* 1600x1200 (85 Hz) VESA timing (pixel clock is 229.5 Mhz dot clock). */ 172 timingVESA_1792x1344_60hz = 296, /* 1792x1344 (60 Hz) VESA timing (204.75 Mhz dot clock). */ 173 timingVESA_1792x1344_75hz = 298, /* 1792x1344 (75 Hz) VESA timing (261.75 Mhz dot clock). */ 174 timingVESA_1856x1392_60hz = 300, /* 1856x1392 (60 Hz) VESA timing (218.25 Mhz dot clock). */ 175 timingVESA_1856x1392_75hz = 302, /* 1856x1392 (75 Hz) VESA timing (288 Mhz dot clock). */ 176 timingVESA_1920x1440_60hz = 304, /* 1920x1440 (60 Hz) VESA timing (234 Mhz dot clock). */ 177 timingVESA_1920x1440_75hz = 306, /* 1920x1440 (75 Hz) VESA timing (297 Mhz dot clock). */ 178 timingSMPTE240M_60hz = 400, /* 60Hz V, 33.75KHz H, interlaced timing, 16:9 aspect, typical resolution of 1920x1035. */ 179 timingFilmRate_48hz = 410, /* 48Hz V, 25.20KHz H, non-interlaced timing, typical resolution of 640x480. */ 180 timingSony_1600x1024_76hz = 500, /* 1600x1024 (76 Hz) Sony timing (pixel clock is 170.447 Mhz dot clock). */ 181 timingSony_1920x1080_60hz = 510, /* 1920x1080 (60 Hz) Sony timing (pixel clock is 159.84 Mhz dot clock). */ 182 timingSony_1920x1080_72hz = 520, /* 1920x1080 (72 Hz) Sony timing (pixel clock is 216.023 Mhz dot clock). */ 183 timingSony_1920x1200_76hz = 540, /* 1900x1200 (76 Hz) Sony timing (pixel clock is 243.20 Mhz dot clock). */ 184 timingApple_0x0_0hz_Offline = 550 /* Indicates that this timing will take the display off-line and remove it from the system. */ 185}; 186 187 188/* Deprecated timing names.*/ 189enum { 190 timingApple12 = timingApple_512x384_60hz, 191 timingApple12x = timingApple_560x384_60hz, 192 timingApple13 = timingApple_640x480_67hz, 193 timingApple13x = timingApple_640x400_67hz, 194 timingAppleVGA = timingVESA_640x480_60hz, 195 timingApple15 = timingApple_640x870_75hz, 196 timingApple15x = timingApple_640x818_75hz, 197 timingApple16 = timingApple_832x624_75hz, 198 timingAppleSVGA = timingVESA_800x600_56hz, 199 timingApple1Ka = timingVESA_1024x768_60hz, 200 timingApple1Kb = timingVESA_1024x768_70hz, 201 timingApple19 = timingApple_1024x768_75hz, 202 timingApple21 = timingApple_1152x870_75hz, 203 timingSony_1900x1200_74hz = 530, /* 1900x1200 (74 Hz) Sony timing (pixel clock is 236.25 Mhz dot clock). */ 204 timingSony_1900x1200_76hz = timingSony_1920x1200_76hz /* 1900x1200 (76 Hz) Sony timing (pixel clock is 245.48 Mhz dot clock). */ 205}; 206 207/* csConnectFlags values in VDDisplayConnectInfo */ 208enum { 209 kAllModesValid = 0, /* All modes not trimmed by primary init are good close enough to try */ 210 kAllModesSafe = 1, /* All modes not trimmed by primary init are know to be safe */ 211 kReportsTagging = 2, /* Can detect tagged displays (to identify smart monitors) */ 212 kHasDirectConnection = 3, /* True implies that driver can talk directly to device (e.g. serial data link via sense lines) */ 213 kIsMonoDev = 4, /* Says whether there's an RGB (0) or Monochrome (1) connection. */ 214 kUncertainConnection = 5, /* There may not be a display (no sense lines?). */ 215 kTaggingInfoNonStandard = 6, /* Set when csConnectTaggedType/csConnectTaggedData are non-standard (i.e., not the Apple CRT sense codes). */ 216 kReportsDDCConnection = 7, /* Card can do ddc (set kHasDirectConnect && kHasDDCConnect if you actually found a ddc display). */ 217 kHasDDCConnection = 8, /* Card has ddc connect now. */ 218 kConnectionInactive = 9, /* Set when the connection is NOT currently active (generally used in a multiconnection environment). */ 219 kDependentConnection = 10, /* Set when some ascpect of THIS connection depends on another (will generally be set in a kModeSimulscan environment). */ 220 kBuiltInConnection = 11, /* Set when connection is KNOWN to be built-in (this is not the same as kHasDirectConnection). */ 221 kOverrideConnection = 12, /* Set when the reported connection is not the true one, but is one that has been forced through a SetConnection call */ 222 kFastCheckForDDC = 13, /* Set when all 3 are true: 1) sense codes indicate DDC display could be attached 2) attempted fast check 3) DDC failed */ 223 kReportsHotPlugging = 14, /* Detects and reports hot pluggging on connector (via VSL also implies DDC will be up to date w/o force read) */ 224 kStereoSyncConnection = 15 /* Connection supports stereo sync signalling */ 225}; 226 227 228/* csDisplayType values in VDDisplayConnectInfo */ 229enum { 230 kUnknownConnect = 1, /* Not sure how we'll use this, but seems like a good idea. */ 231 kPanelConnect = 2, /* For use with fixed-in-place LCD panels. */ 232 kPanelTFTConnect = 2, /* Alias for kPanelConnect */ 233 kFixedModeCRTConnect = 3, /* For use with fixed-mode (i.e., very limited range) displays. */ 234 kMultiModeCRT1Connect = 4, /* 320x200 maybe, 12" maybe, 13" (default), 16" certain, 19" maybe, 21" maybe */ 235 kMultiModeCRT2Connect = 5, /* 320x200 maybe, 12" maybe, 13" certain, 16" (default), 19" certain, 21" maybe */ 236 kMultiModeCRT3Connect = 6, /* 320x200 maybe, 12" maybe, 13" certain, 16" certain, 19" default, 21" certain */ 237 kMultiModeCRT4Connect = 7, /* Expansion to large multi mode (not yet used) */ 238 kModelessConnect = 8, /* Expansion to modeless model (not yet used) */ 239 kFullPageConnect = 9, /* 640x818 (to get 8bpp in 512K case) and 640x870 (these two only) */ 240 kVGAConnect = 10, /* 640x480 VGA default -- question everything else */ 241 kNTSCConnect = 11, /* NTSC ST (default), FF, STconv, FFconv */ 242 kPALConnect = 12, /* PAL ST (default), FF, STconv, FFconv */ 243 kHRConnect = 13, /* Straight-6 connect -- 640x480 and 640x400 (to get 8bpp in 256K case) (these two only) */ 244 kPanelFSTNConnect = 14, /* For use with fixed-in-place LCD FSTN (aka "Supertwist") panels */ 245 kMonoTwoPageConnect = 15, /* 1152x870 Apple color two-page display */ 246 kColorTwoPageConnect = 16, /* 1152x870 Apple B&W two-page display */ 247 kColor16Connect = 17, /* 832x624 Apple B&W two-page display */ 248 kColor19Connect = 18, /* 1024x768 Apple B&W two-page display */ 249 kGenericCRT = 19, /* Indicates nothing except that connection is CRT in nature. */ 250 kGenericLCD = 20, /* Indicates nothing except that connection is LCD in nature. */ 251 kDDCConnect = 21, /* DDC connection, always set kHasDDCConnection */ 252 kNoConnect = 22 /* No display is connected - load sensing or similar level of hardware detection is assumed (used by resident drivers that support hot plugging when nothing is currently connected) */ 253}; 254 255/* csTimingFlags values in VDTimingInfoRec */ 256enum { 257 kModeValid = 0, /* Says that this mode should NOT be trimmed. */ 258 kModeSafe = 1, /* This mode does not need confirmation */ 259 kModeDefault = 2, /* This is the default mode for this type of connection */ 260 kModeShowNow = 3, /* This mode should always be shown (even though it may require a confirm) */ 261 kModeNotResize = 4, /* This mode should not be used to resize the display (eg. mode selects a different connector on card) */ 262 kModeRequiresPan = 5, /* This mode has more pixels than are actually displayed */ 263 kModeInterlaced = 6, /* This mode is interlaced (single pixel lines look bad). */ 264 kModeShowNever = 7, /* This mode should not be shown in the user interface. */ 265 kModeSimulscan = 8, /* Indicates that more than one display connection can be driven from a single framebuffer controller. */ 266 kModeNotPreset = 9, /* Indicates that the timing is not a factory preset for the current display (geometry may need correction) */ 267 kModeBuiltIn = 10, /* Indicates that the display mode is for the built-in connect only (on multiconnect devices like the PB 3400) Only the driver is quieried */ 268 kModeStretched = 11, /* Indicates that the display mode will be stretched/distorted to match the display aspect ratio */ 269 kModeNotGraphicsQuality = 12, /* Indicates that the display mode is not the highest quality (eg. stretching artifacts). Intended as a hint */ 270 kModeValidateAgainstDisplay = 13 /* Indicates that this mode should be validated against the display EDID */ 271}; 272 273/* csDepthFlags in VDVideoParametersInfoRec */ 274enum { 275 kDepthDependent = 0, /* Says that this depth mode may cause dependent changes in other framebuffers (and . */ 276 kDepthDependentMask = (1 << kDepthDependent) /* mask for kDepthDependent */ 277}; 278 279/* csResolutionFlags bit flags for VDResolutionInfoRec */ 280enum { 281 kResolutionHasMultipleDepthSizes = 0 /* Says that this mode has different csHorizontalPixels, csVerticalLines at different depths (usually slightly larger at lower depths) */ 282}; 283 284 285enum { 286 /* Power Mode constants for VDPowerStateRec.powerState. Note the numeric order does not match the power state order */ 287 kAVPowerOff = 0, /* Power fully off*/ 288 kAVPowerStandby = 1, 289 kAVPowerSuspend = 2, 290 kAVPowerOn = 3, 291 kHardwareSleep = 128, 292 kHardwareWake = 129, 293 kHardwareWakeFromSuspend = 130, 294 kHardwareWakeToDoze = 131, 295 kHardwareWakeToDozeFromSuspend = 132, 296 kHardwarePark = 133, 297 kHardwareDrive = 134 298}; 299 300/* Reduced perf level, for GetPowerState, SetPowerState*/ 301enum { 302 kPowerStateReducedPowerMask = 0x00000300, 303 kPowerStateFullPower = 0x00000000, 304 kPowerStateReducedPower1 = 0x00000100, 305 kPowerStateReducedPower2 = 0x00000200, 306 kPowerStateReducedPower3 = 0x00000300 307}; 308 309enum { 310 /* Power Mode masks and bits for VDPowerStateRec.powerFlags. */ 311 kPowerStateNeedsRefresh = 0, /* When leaving this power mode, a display will need refreshing */ 312 kPowerStateSleepAwareBit = 1, /* if gestaltPCCardDockingSelectorFix, Docking mgr checks this bit before checking kPowerStateSleepAllowedBit */ 313 kPowerStateSleepForbiddenBit = 2, /* if kPowerStateSleepAwareBit, Docking mgr checks this bit before sleeping */ 314 kPowerStateSleepCanPowerOffBit = 3, /* supports power down sleep (ie PCI power off)*/ 315 kPowerStateSleepNoDPMSBit = 4, /* Bug #2425210. Do not use DPMS with this display.*/ 316 kPowerStateSleepWaketoDozeBit = 5, /* Supports Wake to Doze */ 317 kPowerStateSleepWakeNeedsProbeBit = 6, /* Does not sense connection changes on wake */ 318 319 kPowerStateNeedsRefreshMask = (1 << kPowerStateNeedsRefresh), 320 kPowerStateSleepAwareMask = (1 << kPowerStateSleepAwareBit), 321 kPowerStateSleepForbiddenMask = (1 << kPowerStateSleepForbiddenBit), 322 kPowerStateSleepCanPowerOffMask = (1 << kPowerStateSleepCanPowerOffBit), 323 kPowerStateSleepNoDPMSMask = (1 << kPowerStateSleepNoDPMSBit), 324 kPowerStateSleepWaketoDozeMask = (1 << kPowerStateSleepWaketoDozeBit), 325 kPowerStateSleepWakeNeedsProbeMask = (1 << kPowerStateSleepWakeNeedsProbeBit), 326 327 kPowerStateSupportsReducedPower1Bit = 10, 328 kPowerStateSupportsReducedPower2Bit = 11, 329 kPowerStateSupportsReducedPower3Bit = 12, 330 kPowerStateSupportsReducedPower1BitMask = (1 << 10), 331 kPowerStateSupportsReducedPower2BitMask = (1 << 11), 332 kPowerStateSupportsReducedPower3BitMask = (1 << 12) 333}; 334 335 336enum { 337 /* Control Codes */ 338 cscReset = 0, 339 cscKillIO = 1, 340 cscSetMode = 2, 341 cscSetEntries = 3, 342 cscSetGamma = 4, 343 cscGrayPage = 5, 344 cscGrayScreen = 5, 345 cscSetGray = 6, 346 cscSetInterrupt = 7, 347 cscDirectSetEntries = 8, 348 cscSetDefaultMode = 9, 349 cscSwitchMode = 10, /* Takes a VDSwitchInfoPtr */ 350 cscSetSync = 11, /* Takes a VDSyncInfoPtr */ 351 cscSavePreferredConfiguration = 16, /* Takes a VDSwitchInfoPtr */ 352 cscSetHardwareCursor = 22, /* Takes a VDSetHardwareCursorPtr */ 353 cscDrawHardwareCursor = 23, /* Takes a VDDrawHardwareCursorPtr */ 354 cscSetConvolution = 24, /* Takes a VDConvolutionInfoPtr */ 355 cscSetPowerState = 25, /* Takes a VDPowerStatePtr */ 356 cscPrivateControlCall = 26, /* Takes a VDPrivateSelectorDataRec*/ 357 cscSetMultiConnect = 28, /* From a GDI point of view, this call should be implemented completely in the HAL and not at all in the core.*/ 358 cscSetClutBehavior = 29, /* Takes a VDClutBehavior */ 359 cscSetDetailedTiming = 31, /* Takes a VDDetailedTimingPtr */ 360 cscDoCommunication = 33, /* Takes a VDCommunicationPtr */ 361 cscProbeConnection = 34, /* Takes nil pointer */ 362 /* (may generate a kFBConnectInterruptServiceType service interrupt) */ 363 cscSetScaler = 36, /* Takes a VDScalerPtr */ 364 cscSetMirror = 37, /* Takes a VDMirrorPtr*/ 365 cscSetFeatureConfiguration = 38, /* Takes a VDConfigurationPtr*/ 366 cscUnusedCall = 127 /* This call used to expand the scrn resource. Its imbedded data contains more control info */ 367}; 368 369enum { 370 /* Status Codes */ 371 cscGetMode = 2, 372 cscGetEntries = 3, 373 cscGetPageCnt = 4, 374 cscGetPages = 4, /* This is what C&D 2 calls it. */ 375 cscGetPageBase = 5, 376 cscGetBaseAddr = 5, /* This is what C&D 2 calls it. */ 377 cscGetGray = 6, 378 cscGetInterrupt = 7, 379 cscGetGamma = 8, 380 cscGetDefaultMode = 9, 381 cscGetCurMode = 10, /* Takes a VDSwitchInfoPtr */ 382 cscGetSync = 11, /* Takes a VDSyncInfoPtr */ 383 cscGetConnection = 12, /* Return information about the connection to the display */ 384 cscGetModeTiming = 13, /* Return timing info for a mode */ 385 cscGetModeBaseAddress = 14, /* Return base address information about a particular mode */ 386 cscGetScanProc = 15, /* QuickTime scan chasing routine */ 387 cscGetPreferredConfiguration = 16, /* Takes a VDSwitchInfoPtr */ 388 cscGetNextResolution = 17, /* Takes a VDResolutionInfoPtr */ 389 cscGetVideoParameters = 18, /* Takes a VDVideoParametersInfoPtr */ 390 cscGetGammaInfoList = 20, /* Takes a VDGetGammaListPtr */ 391 cscRetrieveGammaTable = 21, /* Takes a VDRetrieveGammaPtr */ 392 cscSupportsHardwareCursor = 22, /* Takes a VDSupportsHardwareCursorPtr */ 393 cscGetHardwareCursorDrawState = 23, /* Takes a VDHardwareCursorDrawStatePtr */ 394 cscGetConvolution = 24, /* Takes a VDConvolutionInfoPtr */ 395 cscGetPowerState = 25, /* Takes a VDPowerStatePtr */ 396 cscPrivateStatusCall = 26, /* Takes a VDPrivateSelectorDataRec*/ 397 cscGetDDCBlock = 27, /* Takes a VDDDCBlockRec */ 398 cscGetMultiConnect = 28, /* From a GDI point of view, this call should be implemented completely in the HAL and not at all in the core.*/ 399 cscGetClutBehavior = 29, /* Takes a VDClutBehavior */ 400 cscGetTimingRanges = 30, /* Takes a VDDisplayTimingRangePtr */ 401 cscGetDetailedTiming = 31, /* Takes a VDDetailedTimingPtr */ 402 cscGetCommunicationInfo = 32, /* Takes a VDCommunicationInfoPtr */ 403 cscGetScalerInfo = 35, /* Takes a VDScalerInfoPtr */ 404 cscGetScaler = 36, /* Takes a VDScalerPtr */ 405 cscGetMirror = 37, /* Takes a VDMirrorPtr*/ 406 cscGetFeatureConfiguration = 38, /* Takes a VDConfigurationPtr*/ 407 cscGetFeatureList = 39 408}; 409 410/* Bit definitions for the Get/Set Sync call*/ 411enum { 412 kDisableHorizontalSyncBit = 0, 413 kDisableVerticalSyncBit = 1, 414 kDisableCompositeSyncBit = 2, 415 kEnableSyncOnBlue = 3, 416 kEnableSyncOnGreen = 4, 417 kEnableSyncOnRed = 5, 418 kNoSeparateSyncControlBit = 6, 419 kTriStateSyncBit = 7, 420 kHorizontalSyncMask = 0x01, 421 kVerticalSyncMask = 0x02, 422 kCompositeSyncMask = 0x04, 423 kDPMSSyncMask = 0x07, 424 kTriStateSyncMask = 0x80, 425 kSyncOnBlueMask = 0x08, 426 kSyncOnGreenMask = 0x10, 427 kSyncOnRedMask = 0x20, 428 kSyncOnMask = 0x38 429}; 430 431enum { 432 /* Power Mode constants for translating DPMS modes to Get/SetSync calls. */ 433 kDPMSSyncOn = 0, 434 kDPMSSyncStandby = 1, 435 kDPMSSyncSuspend = 2, 436 kDPMSSyncOff = 7 437}; 438 439/* Bit definitions for the Get/Set Convolution call*/ 440enum { 441 kConvolved = 0, 442 kLiveVideoPassThru = 1, 443 kConvolvedMask = 0x01, 444 kLiveVideoPassThruMask = 0x02 445}; 446 447 448 449struct VPBlock { 450 UInt32 vpBaseOffset; /*Offset to page zero of video RAM (From minorBaseOS).*/ 451#if __LP64__ 452 UInt32 vpRowBytes; /*Width of each row of video memory.*/ 453#else 454 SInt16 vpRowBytes; /*Width of each row of video memory.*/ 455#endif 456 Rect vpBounds; /*BoundsRect for the video display (gives dimensions).*/ 457 SInt16 vpVersion; /*PixelMap version number.*/ 458 SInt16 vpPackType; 459 UInt32 vpPackSize; 460 UInt32 vpHRes; /*Horizontal resolution of the device (pixels per inch).*/ 461 UInt32 vpVRes; /*Vertical resolution of the device (pixels per inch).*/ 462 SInt16 vpPixelType; /*Defines the pixel type.*/ 463 SInt16 vpPixelSize; /*Number of bits in pixel.*/ 464 SInt16 vpCmpCount; /*Number of components in pixel.*/ 465 SInt16 vpCmpSize; /*Number of bits per component*/ 466 UInt32 vpPlaneBytes; /*Offset from one plane to the next.*/ 467}; 468typedef struct VPBlock VPBlock; 469typedef VPBlock * VPBlockPtr; 470 471struct VDEntryRecord { 472 Ptr csTable; /* pointer to color table entry=value, r,g,b:INTEGER*/ 473}; 474typedef struct VDEntryRecord VDEntryRecord; 475 476typedef VDEntryRecord * VDEntRecPtr; 477/* Parm block for SetGray control call */ 478 479struct VDGrayRecord { 480 Boolean csMode; /*Same as GDDevType value (0=color, 1=mono)*/ 481 SInt8 filler; 482}; 483typedef struct VDGrayRecord VDGrayRecord; 484 485typedef VDGrayRecord * VDGrayPtr; 486/* Parm block for SetInterrupt call */ 487 488struct VDFlagRecord { 489 SInt8 csMode; 490 SInt8 filler; 491}; 492typedef struct VDFlagRecord VDFlagRecord; 493 494typedef VDFlagRecord * VDFlagRecPtr; 495/* Parm block for SetEntries control call */ 496 497struct VDSetEntryRecord { 498 ColorSpec * csTable; /*Pointer to an array of color specs*/ 499 SInt16 csStart; /*Which spec in array to start with, or -1*/ 500 SInt16 csCount; /*Number of color spec entries to set*/ 501}; 502typedef struct VDSetEntryRecord VDSetEntryRecord; 503 504typedef VDSetEntryRecord * VDSetEntryPtr; 505/* Parm block for SetGamma control call */ 506 507struct VDGammaRecord { 508 Ptr csGTable; /*pointer to gamma table*/ 509}; 510typedef struct VDGammaRecord VDGammaRecord; 511 512typedef VDGammaRecord * VDGamRecPtr; 513 514struct VDSwitchInfoRec { 515 DepthMode csMode; /* mode depth*/ 516 DisplayModeID csData; /* functional sResource of mode*/ 517 UInt16 csPage; /* page to switch in*/ 518 Ptr csBaseAddr; /* base address of page (return value)*/ 519 uintptr_t csReserved; /* Reserved (set to 0) */ 520}; 521typedef struct VDSwitchInfoRec VDSwitchInfoRec; 522 523typedef VDSwitchInfoRec * VDSwitchInfoPtr; 524 525struct VDTimingInfoRec { 526 DisplayModeID csTimingMode; /* timing mode (a la InitGDevice) */ 527 uintptr_t csTimingReserved; /* reserved */ 528 UInt32 csTimingFormat; /* what format is the timing info */ 529 UInt32 csTimingData; /* data supplied by driver */ 530 UInt32 csTimingFlags; /* mode within device */ 531}; 532typedef struct VDTimingInfoRec VDTimingInfoRec; 533 534typedef VDTimingInfoRec * VDTimingInfoPtr; 535 536struct VDDisplayConnectInfoRec { 537 UInt16 csDisplayType; /* Type of display connected */ 538 UInt8 csConnectTaggedType; /* type of tagging */ 539 UInt8 csConnectTaggedData; /* tagging data */ 540 UInt32 csConnectFlags; /* tell us about the connection */ 541 uintptr_t csDisplayComponent; /* if the card has a direct connection to the display, it returns the display component here (FUTURE) */ 542 uintptr_t csConnectReserved; /* reserved */ 543}; 544typedef struct VDDisplayConnectInfoRec VDDisplayConnectInfoRec; 545 546typedef VDDisplayConnectInfoRec * VDDisplayConnectInfoPtr; 547 548struct VDMultiConnectInfoRec { 549 UInt32 csDisplayCountOrNumber; /* For GetMultiConnect, returns count n of 1..n connections; otherwise, indicates the ith connection.*/ 550 VDDisplayConnectInfoRec csConnectInfo; /* Standard VDDisplayConnectionInfo for connection i.*/ 551}; 552typedef struct VDMultiConnectInfoRec VDMultiConnectInfoRec; 553 554typedef VDMultiConnectInfoRec * VDMultiConnectInfoPtr; 555/* RawSenseCode 556 This abstract data type is not exactly abstract. Rather, it is merely enumerated constants 557 for the possible raw sense code values when 'standard' sense code hardware is implemented. 558 559 For 'standard' sense code hardware, the raw sense is obtained as follows: 560 o Instruct the frame buffer controller NOT to actively drive any of the monitor sense lines 561 o Read the state of the monitor sense lines 2, 1, and 0. (2 is the MSB, 0 the LSB) 562 563 IMPORTANT Note: 564 When the 'kTaggingInfoNonStandard' bit of 'csConnectFlags' is FALSE, then these constants 565 are valid 'csConnectTaggedType' values in 'VDDisplayConnectInfo' 566 567*/ 568typedef UInt8 RawSenseCode; 569enum { 570 kRSCZero = 0, 571 kRSCOne = 1, 572 kRSCTwo = 2, 573 kRSCThree = 3, 574 kRSCFour = 4, 575 kRSCFive = 5, 576 kRSCSix = 6, 577 kRSCSeven = 7 578}; 579 580 581/* ExtendedSenseCode 582 This abstract data type is not exactly abstract. Rather, it is merely enumerated constants 583 for the values which are possible when the extended sense algorithm is applied to hardware 584 which implements 'standard' sense code hardware. 585 586 For 'standard' sense code hardware, the extended sense code algorithm is as follows: 587 (Note: as described here, sense line 'A' corresponds to '2', 'B' to '1', and 'C' to '0') 588 o Drive sense line 'A' low and read the values of 'B' and 'C'. 589 o Drive sense line 'B' low and read the values of 'A' and 'C'. 590 o Drive sense line 'C' low and read the values of 'A' and 'B'. 591 592 In this way, a six-bit number of the form BC/AC/AB is generated. 593 594 IMPORTANT Note: 595 When the 'kTaggingInfoNonStandard' bit of 'csConnectFlags' is FALSE, then these constants 596 are valid 'csConnectTaggedData' values in 'VDDisplayConnectInfo' 597 598*/ 599typedef UInt8 ExtendedSenseCode; 600enum { 601 kESCZero21Inch = 0x00, /* 21" RGB */ 602 kESCOnePortraitMono = 0x14, /* Portrait Monochrome */ 603 kESCTwo12Inch = 0x21, /* 12" RGB */ 604 kESCThree21InchRadius = 0x31, /* 21" RGB (Radius) */ 605 kESCThree21InchMonoRadius = 0x34, /* 21" Monochrome (Radius) */ 606 kESCThree21InchMono = 0x35, /* 21" Monochrome */ 607 kESCFourNTSC = 0x0A, /* NTSC */ 608 kESCFivePortrait = 0x1E, /* Portrait RGB */ 609 kESCSixMSB1 = 0x03, /* MultiScan Band-1 (12" thru 1Six") */ 610 kESCSixMSB2 = 0x0B, /* MultiScan Band-2 (13" thru 19") */ 611 kESCSixMSB3 = 0x23, /* MultiScan Band-3 (13" thru 21") */ 612 kESCSixStandard = 0x2B, /* 13"/14" RGB or 12" Monochrome */ 613 kESCSevenPAL = 0x00, /* PAL */ 614 kESCSevenNTSC = 0x14, /* NTSC */ 615 kESCSevenVGA = 0x17, /* VGA */ 616 kESCSeven16Inch = 0x2D, /* 16" RGB (GoldFish) */ 617 kESCSevenPALAlternate = 0x30, /* PAL (Alternate) */ 618 kESCSeven19Inch = 0x3A, /* Third-Party 19" */ 619 kESCSevenDDC = 0x3E, /* DDC display */ 620 kESCSevenNoDisplay = 0x3F /* No display connected */ 621}; 622 623/* DepthMode 624 This abstract data type is used to to reference RELATIVE pixel depths. 625 Its definition is largely derived from its past usage, analogous to 'xxxVidMode' 626 627 Bits per pixel DOES NOT directly map to 'DepthMode' For example, on some 628 graphics hardware, 'kDepthMode1' may represent 1 BPP, whereas on other 629 hardware, 'kDepthMode1' may represent 8BPP. 630 631 DepthMode IS considered to be ordinal, i.e., operations such as <, >, ==, etc. 632 behave as expected. The values of the constants which comprise the set are such 633 that 'kDepthMode4 < kDepthMode6' behaves as expected. 634*/ 635enum { 636 kDepthMode1 = 128, 637 kDepthMode2 = 129, 638 kDepthMode3 = 130, 639 kDepthMode4 = 131, 640 kDepthMode5 = 132, 641 kDepthMode6 = 133 642}; 643 644enum { 645 kFirstDepthMode = 128, /* These constants are obsolete, and just included */ 646 kSecondDepthMode = 129, /* for clients that have converted to the above */ 647 kThirdDepthMode = 130, /* kDepthModeXXX constants. */ 648 kFourthDepthMode = 131, 649 kFifthDepthMode = 132, 650 kSixthDepthMode = 133 651}; 652 653 654 655struct VDPageInfo { 656 DepthMode csMode; /* mode within device*/ 657 DisplayModeID csData; /* data supplied by driver*/ 658 SInt16 csPage; /* page to switch in*/ 659 Ptr csBaseAddr; /* base address of page*/ 660}; 661typedef struct VDPageInfo VDPageInfo; 662 663typedef VDPageInfo * VDPgInfoPtr; 664 665struct VDSizeInfo { 666 SInt16 csHSize; /* desired/returned h size*/ 667 SInt16 csHPos; /* desired/returned h position*/ 668 SInt16 csVSize; /* desired/returned v size*/ 669 SInt16 csVPos; /* desired/returned v position*/ 670}; 671typedef struct VDSizeInfo VDSizeInfo; 672 673typedef VDSizeInfo * VDSzInfoPtr; 674 675struct VDSettings { 676 SInt16 csParamCnt; /* number of params*/ 677 SInt16 csBrightMax; /* max brightness*/ 678 SInt16 csBrightDef; /* default brightness*/ 679 SInt16 csBrightVal; /* current brightness*/ 680 SInt16 csCntrstMax; /* max contrast*/ 681 SInt16 csCntrstDef; /* default contrast*/ 682 SInt16 csCntrstVal; /* current contrast*/ 683 SInt16 csTintMax; /* max tint*/ 684 SInt16 csTintDef; /* default tint*/ 685 SInt16 csTintVal; /* current tint*/ 686 SInt16 csHueMax; /* max hue*/ 687 SInt16 csHueDef; /* default hue*/ 688 SInt16 csHueVal; /* current hue*/ 689 SInt16 csHorizDef; /* default horizontal*/ 690 SInt16 csHorizVal; /* current horizontal*/ 691 SInt16 csHorizMax; /* max horizontal*/ 692 SInt16 csVertDef; /* default vertical*/ 693 SInt16 csVertVal; /* current vertical*/ 694 SInt16 csVertMax; /* max vertical*/ 695}; 696typedef struct VDSettings VDSettings; 697typedef VDSettings * VDSettingsPtr; 698 699struct VDDefMode { 700 UInt8 csID; 701 SInt8 filler; 702}; 703typedef struct VDDefMode VDDefMode; 704typedef VDDefMode * VDDefModePtr; 705 706struct VDSyncInfoRec { 707 UInt8 csMode; 708 UInt8 csFlags; 709}; 710typedef struct VDSyncInfoRec VDSyncInfoRec; 711 712typedef VDSyncInfoRec * VDSyncInfoPtr; 713/* 714 All displayModeID values from 0x80000000 to 0xFFFFFFFF and 0x00 715 are reserved for Apple Computer. 716*/ 717/* Constants for the cscGetNextResolution call */ 718enum { 719 kDisplayModeIDCurrent = 0x00, /* Reference the Current DisplayModeID */ 720 kDisplayModeIDInvalid = (IODisplayModeID)0xFFFFFFFF, /* A bogus DisplayModeID in all cases */ 721 kDisplayModeIDFindFirstResolution = (IODisplayModeID)0xFFFFFFFE, /* Used in cscGetNextResolution to reset iterator */ 722 kDisplayModeIDNoMoreResolutions = (IODisplayModeID)0xFFFFFFFD, /* Used in cscGetNextResolution to indicate End Of List */ 723 kDisplayModeIDFindFirstProgrammable = (IODisplayModeID)0xFFFFFFFC, /* Used in cscGetNextResolution to find unused programmable timing */ 724 kDisplayModeIDBootProgrammable = (IODisplayModeID)0xFFFFFFFB, /* This is the ID given at boot time by the OF driver to a programmable timing */ 725 kDisplayModeIDReservedBase = (IODisplayModeID)0x80000000 /* Lowest (unsigned) DisplayModeID reserved by Apple */ 726}; 727 728/* Constants for the GetGammaInfoList call */ 729enum { 730 kGammaTableIDFindFirst = (GammaTableID)0xFFFFFFFE, /* Get the first gamma table ID */ 731 kGammaTableIDNoMoreTables = (GammaTableID)0xFFFFFFFD, /* Used to indicate end of list */ 732 kGammaTableIDSpecific = 0x00 /* Return the info for the given table id */ 733}; 734 735/* Constants for GetMultiConnect call*/ 736enum { 737 kGetConnectionCount = 0xFFFFFFFF, /* Used to get the number of possible connections in a "multi-headed" framebuffer environment.*/ 738 kActivateConnection = (0 << kConnectionInactive), /* Used for activating a connection (csConnectFlags value).*/ 739 kDeactivateConnection = (1 << kConnectionInactive) /* Used for deactivating a connection (csConnectFlags value.)*/ 740}; 741 742/* VDCommunicationRec.csBusID values*/ 743enum { 744 kVideoDefaultBus = 0 745}; 746 747 748/* VDCommunicationInfoRec.csBusType values*/ 749enum { 750 kVideoBusTypeInvalid = 0, 751 kVideoBusTypeI2C = 1, 752 kVideoBusTypeDisplayPort = 2 753}; 754 755 756/* VDCommunicationRec.csSendType and VDCommunicationRec.csReplyType values*/ 757enum { 758 kVideoNoTransactionType = 0, /* No transaction*/ 759 kVideoNoTransactionTypeMask = (1 << kVideoNoTransactionType), 760 kVideoSimpleI2CType = 1, /* Simple I2C message*/ 761 kVideoSimpleI2CTypeMask = (1 << kVideoSimpleI2CType), 762 kVideoDDCciReplyType = 2, /* DDC/ci message (with imbedded length)*/ 763 kVideoDDCciReplyTypeMask = (1 << kVideoDDCciReplyType), 764 kVideoCombinedI2CType = 3, /* Combined format I2C R/~W transaction*/ 765 kVideoCombinedI2CTypeMask = (1 << kVideoCombinedI2CType), 766 kVideoDisplayPortNativeType = 4, /* DisplayPort Native */ 767 kVideoDisplayPortNativeTypeMask = (1 << kVideoDisplayPortNativeType) 768}; 769 770// VDCommunicationRec.csCommFlags and VDCommunicationInfoRec.csSupportedCommFlags 771enum { 772 kVideoReplyMicroSecDelayBit = 0, /* If bit set, the driver should delay csMinReplyDelay micro seconds between send and receive*/ 773 kVideoReplyMicroSecDelayMask = (1 << kVideoReplyMicroSecDelayBit), 774 kVideoUsageAddrSubAddrBit = 1, /* If bit set, the driver understands to use the lower 16 bits of the address field as two 8 bit values (address/subaddress) for the I2C transaction*/ 775 kVideoUsageAddrSubAddrMask = (1 << kVideoUsageAddrSubAddrBit) 776}; 777 778 779struct VDResolutionInfoRec { 780 DisplayModeID csPreviousDisplayModeID; /* ID of the previous resolution in a chain */ 781 DisplayModeID csDisplayModeID; /* ID of the next resolution */ 782 UInt32 csHorizontalPixels; /* # of pixels in a horizontal line at the max depth */ 783 UInt32 csVerticalLines; /* # of lines in a screen at the max depth */ 784 Fixed csRefreshRate; /* Vertical Refresh Rate in Hz */ 785 DepthMode csMaxDepthMode; /* 0x80-based number representing max bit depth */ 786 UInt32 csResolutionFlags; /* Reserved - flag bits */ 787 uintptr_t csReserved; /* Reserved */ 788}; 789typedef struct VDResolutionInfoRec VDResolutionInfoRec; 790 791typedef VDResolutionInfoRec * VDResolutionInfoPtr; 792 793struct VDVideoParametersInfoRec { 794 DisplayModeID csDisplayModeID; /* the ID of the resolution we want info on */ 795 DepthMode csDepthMode; /* The bit depth we want the info on (0x80 based) */ 796 VPBlockPtr csVPBlockPtr; /* Pointer to a video parameter block */ 797 UInt32 csPageCount; /* Number of pages supported by the resolution */ 798 VideoDeviceType csDeviceType; /* Device Type: Direct, Fixed or CLUT; */ 799 UInt32 csDepthFlags; /* Flags */ 800}; 801typedef struct VDVideoParametersInfoRec VDVideoParametersInfoRec; 802 803typedef VDVideoParametersInfoRec * VDVideoParametersInfoPtr; 804 805struct VDGammaInfoRec { 806 GammaTableID csLastGammaID; /* the ID of the previous gamma table */ 807 GammaTableID csNextGammaID; /* the ID of the next gamma table */ 808 Ptr csGammaPtr; /* Ptr to a gamma table data */ 809 uintptr_t csReserved; /* Reserved */ 810}; 811typedef struct VDGammaInfoRec VDGammaInfoRec; 812 813typedef VDGammaInfoRec * VDGammaInfoPtr; 814 815struct VDGetGammaListRec { 816 GammaTableID csPreviousGammaTableID; /* ID of the previous gamma table */ 817 GammaTableID csGammaTableID; /* ID of the gamma table following csPreviousDisplayModeID */ 818 UInt32 csGammaTableSize; /* Size of the gamma table in bytes */ 819 char * csGammaTableName; /* Gamma table name (c-string) */ 820}; 821typedef struct VDGetGammaListRec VDGetGammaListRec; 822 823typedef VDGetGammaListRec * VDGetGammaListPtr; 824 825struct VDRetrieveGammaRec { 826 GammaTableID csGammaTableID; /* ID of gamma table to retrieve */ 827 GammaTbl * csGammaTablePtr; /* Location to copy desired gamma to */ 828}; 829typedef struct VDRetrieveGammaRec VDRetrieveGammaRec; 830 831typedef VDRetrieveGammaRec * VDRetrieveGammaPtr; 832 833struct VDSetHardwareCursorRec { 834 void * csCursorRef; /* reference to cursor data */ 835 UInt32 csReserved1; /* reserved for future use */ 836 UInt32 csReserved2; /* should be ignored */ 837}; 838typedef struct VDSetHardwareCursorRec VDSetHardwareCursorRec; 839 840typedef VDSetHardwareCursorRec * VDSetHardwareCursorPtr; 841 842struct VDDrawHardwareCursorRec { 843 SInt32 csCursorX; /* x coordinate */ 844 SInt32 csCursorY; /* y coordinate */ 845 UInt32 csCursorVisible; /* true if cursor is must be visible */ 846 UInt32 csReserved1; /* reserved for future use */ 847 UInt32 csReserved2; /* should be ignored */ 848}; 849typedef struct VDDrawHardwareCursorRec VDDrawHardwareCursorRec; 850 851typedef VDDrawHardwareCursorRec * VDDrawHardwareCursorPtr; 852 853struct VDSupportsHardwareCursorRec { 854 UInt32 csSupportsHardwareCursor; 855 /* true if hardware cursor is supported */ 856 UInt32 csReserved1; /* reserved for future use */ 857 UInt32 csReserved2; /* must be zero */ 858}; 859typedef struct VDSupportsHardwareCursorRec VDSupportsHardwareCursorRec; 860 861typedef VDSupportsHardwareCursorRec * VDSupportsHardwareCursorPtr; 862 863struct VDHardwareCursorDrawStateRec { 864 SInt32 csCursorX; /* x coordinate */ 865 SInt32 csCursorY; /* y coordinate */ 866 UInt32 csCursorVisible; /* true if cursor is visible */ 867 UInt32 csCursorSet; /* true if cursor successfully set by last set control call */ 868 UInt32 csReserved1; /* reserved for future use */ 869 UInt32 csReserved2; /* must be zero */ 870}; 871typedef struct VDHardwareCursorDrawStateRec VDHardwareCursorDrawStateRec; 872 873typedef VDHardwareCursorDrawStateRec * VDHardwareCursorDrawStatePtr; 874 875struct VDConvolutionInfoRec { 876 DisplayModeID csDisplayModeID; /* the ID of the resolution we want info on */ 877 DepthMode csDepthMode; /* The bit depth we want the info on (0x80 based) */ 878 UInt32 csPage; 879 UInt32 csFlags; 880 UInt32 csReserved; 881}; 882typedef struct VDConvolutionInfoRec VDConvolutionInfoRec; 883 884typedef VDConvolutionInfoRec * VDConvolutionInfoPtr; 885 886struct VDPowerStateRec { 887 UInt32 powerState; 888 UInt32 powerFlags; 889 890 uintptr_t powerReserved1; 891 uintptr_t powerReserved2; 892}; 893typedef struct VDPowerStateRec VDPowerStateRec; 894 895typedef VDPowerStateRec * VDPowerStatePtr; 896/* 897 Private Data to video drivers. 898 899 In versions of MacOS with multiple address spaces (System 8), the OS 900 must know the extent of parameters in order to move them between the caller 901 and driver. The old private-selector model for video drivers does not have 902 this information so: 903 904 For post-7.x Systems private calls should be implemented using the cscPrivateCall 905*/ 906 907struct VDPrivateSelectorDataRec { 908 LogicalAddress privateParameters; /* Caller's parameters*/ 909 ByteCount privateParametersSize; /* Size of data sent from caller to driver*/ 910 LogicalAddress privateResults; /* Caller's return area. Can be nil, or same as privateParameters.*/ 911 ByteCount privateResultsSize; /* Size of data driver returns to caller. Can be nil, or same as privateParametersSize.*/ 912}; 913typedef struct VDPrivateSelectorDataRec VDPrivateSelectorDataRec; 914 915 916struct VDPrivateSelectorRec { 917 UInt32 reserved; /* Reserved (set to 0). */ 918 VDPrivateSelectorDataRec data[1]; 919}; 920typedef struct VDPrivateSelectorRec VDPrivateSelectorRec; 921 922struct VDDDCBlockRec { 923 UInt32 ddcBlockNumber; /* Input -- DDC EDID (Extended Display Identification Data) number (1-based) */ 924 ResType ddcBlockType; /* Input -- DDC block type (EDID/VDIF) */ 925 UInt32 ddcFlags; /* Input -- DDC Flags*/ 926 UInt32 ddcReserved; /* Reserved */ 927 Byte ddcBlockData[128]; /* Output -- DDC EDID/VDIF data (kDDCBlockSize) */ 928}; 929typedef struct VDDDCBlockRec VDDDCBlockRec; 930 931typedef VDDDCBlockRec * VDDDCBlockPtr; 932 933enum { 934 /* timingSyncConfiguration*/ 935 kSyncInterlaceMask = (1 << 7), 936 kSyncAnalogCompositeMask = 0, 937 kSyncAnalogCompositeSerrateMask = (1 << 2), 938 kSyncAnalogCompositeRGBSyncMask = (1 << 1), 939 kSyncAnalogBipolarMask = (1 << 3), 940 kSyncAnalogBipolarSerrateMask = (1 << 2), 941 kSyncAnalogBipolarSRGBSyncMask = (1 << 1), 942 kSyncDigitalCompositeMask = (1 << 4), 943 kSyncDigitalCompositeSerrateMask = (1 << 2), 944 kSyncDigitalCompositeMatchHSyncMask = (1 << 2), 945 kSyncDigitalSeperateMask = (1 << 4) + (1 << 3), 946 kSyncDigitalVSyncPositiveMask = (1 << 2), 947 kSyncDigitalHSyncPositiveMask = (1 << 1) 948}; 949 950 951 952 953struct VDDisplayTimingRangeRec { 954 UInt32 csRangeSize; /* Init to sizeof(VDDisplayTimingRangeRec) */ 955 UInt32 csRangeType; /* Init to 0 */ 956 UInt32 csRangeVersion; /* Init to 0 */ 957 UInt32 csRangeReserved; /* Init to 0 */ 958 959 UInt32 csRangeBlockIndex; /* Requested block (first index is 0)*/ 960 UInt32 csRangeGroup; /* set to 0 */ 961 UInt32 csRangeBlockCount; /* # blocks */ 962 UInt32 csRangeFlags; /* dependent video */ 963 964 UInt64 csMinPixelClock; /* Min dot clock in Hz */ 965 UInt64 csMaxPixelClock; /* Max dot clock in Hz */ 966 967 UInt32 csMaxPixelError; /* Max dot clock error */ 968 UInt32 csTimingRangeSyncFlags; 969 UInt32 csTimingRangeSignalLevels; 970 UInt32 csTimingRangeSupportedSignalConfigs; 971 972 UInt32 csMinFrameRate; /* Hz */ 973 UInt32 csMaxFrameRate; /* Hz */ 974 UInt32 csMinLineRate; /* Hz */ 975 UInt32 csMaxLineRate; /* Hz */ 976 977 978 UInt32 csMaxHorizontalTotal; /* Clocks - Maximum total (active + blanking) */ 979 UInt32 csMaxVerticalTotal; /* Clocks - Maximum total (active + blanking) */ 980 UInt32 csMaxTotalReserved1; /* Reserved */ 981 UInt32 csMaxTotalReserved2; /* Reserved */ 982 983 984 985 /* Some cards require that some timing elements*/ 986 /* be multiples of a "character size" (often 8*/ 987 /* clocks). The "xxxxCharSize" fields document*/ 988 /* those requirements.*/ 989 990 991 UInt8 csCharSizeHorizontalActive; /* Character size */ 992 UInt8 csCharSizeHorizontalBlanking; /* Character size */ 993 UInt8 csCharSizeHorizontalSyncOffset; /* Character size */ 994 UInt8 csCharSizeHorizontalSyncPulse; /* Character size */ 995 996 UInt8 csCharSizeVerticalActive; /* Character size */ 997 UInt8 csCharSizeVerticalBlanking; /* Character size */ 998 UInt8 csCharSizeVerticalSyncOffset; /* Character size */ 999 UInt8 csCharSizeVerticalSyncPulse; /* Character size */ 1000 1001 UInt8 csCharSizeHorizontalBorderLeft; /* Character size */ 1002 UInt8 csCharSizeHorizontalBorderRight; /* Character size */ 1003 UInt8 csCharSizeVerticalBorderTop; /* Character size */ 1004 UInt8 csCharSizeVerticalBorderBottom; /* Character size */ 1005 1006 UInt8 csCharSizeHorizontalTotal; /* Character size for active + blanking */ 1007 UInt8 csCharSizeVerticalTotal; /* Character size for active + blanking */ 1008 UInt16 csCharSizeReserved1; /* Reserved (Init to 0) */ 1009 1010 1011 UInt32 csMinHorizontalActiveClocks; 1012 UInt32 csMaxHorizontalActiveClocks; 1013 UInt32 csMinHorizontalBlankingClocks; 1014 UInt32 csMaxHorizontalBlankingClocks; 1015 1016 UInt32 csMinHorizontalSyncOffsetClocks; 1017 UInt32 csMaxHorizontalSyncOffsetClocks; 1018 UInt32 csMinHorizontalPulseWidthClocks; 1019 UInt32 csMaxHorizontalPulseWidthClocks; 1020 1021 UInt32 csMinVerticalActiveClocks; 1022 UInt32 csMaxVerticalActiveClocks; 1023 UInt32 csMinVerticalBlankingClocks; 1024 UInt32 csMaxVerticalBlankingClocks; 1025 1026 UInt32 csMinVerticalSyncOffsetClocks; 1027 UInt32 csMaxVerticalSyncOffsetClocks; 1028 UInt32 csMinVerticalPulseWidthClocks; 1029 UInt32 csMaxVerticalPulseWidthClocks; 1030 1031 1032 UInt32 csMinHorizontalBorderLeft; 1033 UInt32 csMaxHorizontalBorderLeft; 1034 UInt32 csMinHorizontalBorderRight; 1035 UInt32 csMaxHorizontalBorderRight; 1036 1037 UInt32 csMinVerticalBorderTop; 1038 UInt32 csMaxVerticalBorderTop; 1039 UInt32 csMinVerticalBorderBottom; 1040 UInt32 csMaxVerticalBorderBottom; 1041 1042 UInt32 csMaxNumLinks; /* number of links, if zero, assume link 1 */ 1043 UInt32 csMinLink0PixelClock; /* min pixel clock for link 0 (kHz) */ 1044 UInt32 csMaxLink0PixelClock; /* max pixel clock for link 0 (kHz) */ 1045 UInt32 csMinLink1PixelClock; /* min pixel clock for link 1 (kHz) */ 1046 UInt32 csMaxLink1PixelClock; /* max pixel clock for link 1 (kHz) */ 1047 1048 UInt32 csReserved6; /* Reserved (Init to 0)*/ 1049 UInt32 csReserved7; /* Reserved (Init to 0)*/ 1050 UInt32 csReserved8; /* Reserved (Init to 0)*/ 1051}; 1052typedef struct VDDisplayTimingRangeRec VDDisplayTimingRangeRec; 1053 1054typedef VDDisplayTimingRangeRec * VDDisplayTimingRangePtr; 1055 1056enum { 1057 /* csDisplayModeState*/ 1058 kDMSModeReady = 0, /* Display Mode ID is configured and ready*/ 1059 kDMSModeNotReady = 1, /* Display Mode ID is is being programmed*/ 1060 kDMSModeFree = 2 /* Display Mode ID is not associated with a timing*/ 1061}; 1062 1063 1064/* Video driver Errors -10930 to -10959 */ 1065enum { 1066 kTimingChangeRestrictedErr = -10930, 1067 kVideoI2CReplyPendingErr = -10931, 1068 kVideoI2CTransactionErr = -10932, 1069 kVideoI2CBusyErr = -10933, 1070 kVideoI2CTransactionTypeErr = -10934, 1071 kVideoBufferSizeErr = -10935, 1072 kVideoCannotMirrorErr = -10936 1073}; 1074 1075 1076enum { 1077 /* csTimingRangeSignalLevels*/ 1078 kRangeSupportsSignal_0700_0300_Bit = 0, 1079 kRangeSupportsSignal_0714_0286_Bit = 1, 1080 kRangeSupportsSignal_1000_0400_Bit = 2, 1081 kRangeSupportsSignal_0700_0000_Bit = 3, 1082 kRangeSupportsSignal_0700_0300_Mask = (1 << kRangeSupportsSignal_0700_0300_Bit), 1083 kRangeSupportsSignal_0714_0286_Mask = (1 << kRangeSupportsSignal_0714_0286_Bit), 1084 kRangeSupportsSignal_1000_0400_Mask = (1 << kRangeSupportsSignal_1000_0400_Bit), 1085 kRangeSupportsSignal_0700_0000_Mask = (1 << kRangeSupportsSignal_0700_0000_Bit) 1086}; 1087 1088 1089enum { 1090 /* csSignalConfig*/ 1091 kDigitalSignalBit = 0, /* Do not set. Mac OS does not currently support arbitrary digital timings*/ 1092 kAnalogSetupExpectedBit = 1, /* Analog displays - display expects a blank-to-black setup or pedestal. See VESA signal standards.*/ 1093 kInterlacedCEA861SyncModeBit = 2, 1094 1095 kDigitalSignalMask = (1 << kDigitalSignalBit), 1096 kAnalogSetupExpectedMask = (1 << kAnalogSetupExpectedBit), 1097 kInterlacedCEA861SyncModeMask = (1 << kInterlacedCEA861SyncModeBit) 1098}; 1099 1100 1101enum { 1102 /* csSignalLevels for analog*/ 1103 kAnalogSignalLevel_0700_0300 = 0, 1104 kAnalogSignalLevel_0714_0286 = 1, 1105 kAnalogSignalLevel_1000_0400 = 2, 1106 kAnalogSignalLevel_0700_0000 = 3 1107}; 1108 1109 1110enum { 1111 /* csTimingRangeSyncFlags*/ 1112 kRangeSupportsSeperateSyncsBit = 0, 1113 kRangeSupportsSyncOnGreenBit = 1, 1114 kRangeSupportsCompositeSyncBit = 2, 1115 kRangeSupportsVSyncSerrationBit = 3, 1116 kRangeSupportsSeperateSyncsMask = (1 << kRangeSupportsSeperateSyncsBit), 1117 kRangeSupportsSyncOnGreenMask = (1 << kRangeSupportsSyncOnGreenBit), 1118 kRangeSupportsCompositeSyncMask = (1 << kRangeSupportsCompositeSyncBit), 1119 kRangeSupportsVSyncSerrationMask = (1 << kRangeSupportsVSyncSerrationBit) 1120}; 1121 1122 1123 1124enum { 1125 /* csHorizontalSyncConfig and csVerticalSyncConfig*/ 1126 kSyncPositivePolarityBit = 0, /* Digital separate sync polarity for analog interfaces (0 => negative polarity)*/ 1127 kSyncPositivePolarityMask = (1 << kSyncPositivePolarityBit) 1128}; 1129 1130 1131 1132 1133/* For timings with kDetailedTimingFormat.*/ 1134 1135struct VDDetailedTimingRec { 1136 UInt32 csTimingSize; /* Init to sizeof(VDDetailedTimingRec)*/ 1137 UInt32 csTimingType; /* Init to 0*/ 1138 UInt32 csTimingVersion; /* Init to 0*/ 1139 UInt32 csTimingReserved; /* Init to 0*/ 1140 1141 DisplayModeID csDisplayModeID; /* Init to 0*/ 1142 UInt32 csDisplayModeSeed; /* */ 1143 UInt32 csDisplayModeState; /* Display Mode state*/ 1144 UInt32 csDisplayModeAlias; /* Mode to use when programmed.*/ 1145 1146 UInt32 csSignalConfig; 1147 UInt32 csSignalLevels; 1148 1149 UInt64 csPixelClock; /* Hz*/ 1150 1151 UInt64 csMinPixelClock; /* Hz - With error what is slowest actual clock */ 1152 UInt64 csMaxPixelClock; /* Hz - With error what is fasted actual clock */ 1153 1154 1155 UInt32 csHorizontalActive; /* Pixels*/ 1156 UInt32 csHorizontalBlanking; /* Pixels*/ 1157 UInt32 csHorizontalSyncOffset; /* Pixels*/ 1158 UInt32 csHorizontalSyncPulseWidth; /* Pixels*/ 1159 1160 UInt32 csVerticalActive; /* Lines*/ 1161 UInt32 csVerticalBlanking; /* Lines*/ 1162 UInt32 csVerticalSyncOffset; /* Lines*/ 1163 UInt32 csVerticalSyncPulseWidth; /* Lines*/ 1164 1165 UInt32 csHorizontalBorderLeft; /* Pixels*/ 1166 UInt32 csHorizontalBorderRight; /* Pixels*/ 1167 UInt32 csVerticalBorderTop; /* Lines*/ 1168 UInt32 csVerticalBorderBottom; /* Lines*/ 1169 1170 UInt32 csHorizontalSyncConfig; 1171 UInt32 csHorizontalSyncLevel; /* Future use (init to 0)*/ 1172 UInt32 csVerticalSyncConfig; 1173 UInt32 csVerticalSyncLevel; /* Future use (init to 0)*/ 1174 1175 UInt32 csNumLinks; /* number of links, if 0 = assume link - 0 */ 1176 1177 UInt32 csReserved2; /* Init to 0*/ 1178 UInt32 csReserved3; /* Init to 0*/ 1179 UInt32 csReserved4; /* Init to 0*/ 1180 1181 UInt32 csReserved5; /* Init to 0*/ 1182 UInt32 csReserved6; /* Init to 0*/ 1183 UInt32 csReserved7; /* Init to 0*/ 1184 UInt32 csReserved8; /* Init to 0*/ 1185}; 1186typedef struct VDDetailedTimingRec VDDetailedTimingRec; 1187 1188typedef VDDetailedTimingRec * VDDetailedTimingPtr; 1189 1190/* csScalerFeatures */ 1191enum { 1192 kScaleStretchOnlyMask = (1<<0), /* True means the driver cannot add borders to avoid non-square pixels */ 1193 kScaleCanUpSamplePixelsMask = (1<<1), /* True means timings with more active clocks than pixels (ie 640x480 pixels on a 1600x1200 timing) */ 1194 kScaleCanDownSamplePixelsMask = (1<<2), /* True means timings with fewer active clocks than pixels (ie 1600x1200 pixels on a 640x480 timing) */ 1195 kScaleCanScaleInterlacedMask = (1<<3), /* True means can scale an interlaced timing */ 1196 kScaleCanSupportInsetMask = (1<<4), /* True means can scale a timing with insets */ 1197 kScaleCanRotateMask = (1<<5), /* True means can rotate image */ 1198 kScaleCanBorderInsetOnlyMask = (1<<6) /* True means can scale a timing with insets */ 1199}; 1200 1201/* csScalerFlags */ 1202enum { 1203 kScaleStretchToFitMask = 0x00000001, /* True means the driver should avoid borders and allow non-square pixels */ 1204 1205 kScaleRotateFlagsMask = 0x000000f0, 1206 1207 kScaleSwapAxesMask = 0x00000010, 1208 kScaleInvertXMask = 0x00000020, 1209 kScaleInvertYMask = 0x00000040, 1210 1211 kScaleRotate0Mask = 0x00000000, 1212 kScaleRotate90Mask = kScaleSwapAxesMask | kScaleInvertXMask, 1213 kScaleRotate180Mask = kScaleInvertXMask | kScaleInvertYMask, 1214 kScaleRotate270Mask = kScaleSwapAxesMask | kScaleInvertYMask 1215}; 1216 1217typedef UInt32 VDClutBehavior; 1218typedef VDClutBehavior * VDClutBehaviorPtr; 1219enum { 1220 kSetClutAtSetEntries = 0, /* SetEntries behavior is to update clut during SetEntries call*/ 1221 kSetClutAtVBL = 1 /* SetEntries behavior is to upate clut at next vbl*/ 1222}; 1223 1224 1225struct VDCommunicationRec { 1226 SInt32 csBusID; /* kVideoDefaultBus for single headed cards.*/ 1227 UInt32 csCommFlags; /* Always zero*/ 1228 UInt32 csMinReplyDelay; /* Minimum delay between send and reply transactions (units depend on csCommFlags)*/ 1229 UInt32 csReserved2; /* Always zero*/ 1230 1231 UInt32 csSendAddress; /* Usually I2C address (eg 0x6E)*/ 1232 UInt32 csSendType; /* See kVideoSimpleI2CType etc.*/ 1233 LogicalAddress csSendBuffer; /* Pointer to the send buffer*/ 1234 ByteCount csSendSize; /* Number of bytes to send*/ 1235 1236 UInt32 csReplyAddress; /* Address from which to read (eg 0x6F for kVideoDDCciReplyType I2C address)*/ 1237 UInt32 csReplyType; /* See kVideoDDCciReplyType etc.*/ 1238 LogicalAddress csReplyBuffer; /* Pointer to the reply buffer*/ 1239 ByteCount csReplySize; /* Max bytes to reply (size of csReplyBuffer)*/ 1240 1241 UInt32 csReserved3; 1242 UInt32 csReserved4; 1243 UInt32 csReserved5; /* Always zero*/ 1244 UInt32 csReserved6; /* Always zero*/ 1245}; 1246typedef struct VDCommunicationRec VDCommunicationRec; 1247 1248typedef VDCommunicationRec * VDCommunicationPtr; 1249 1250struct VDCommunicationInfoRec { 1251 SInt32 csBusID; /* kVideoDefaultBus for single headed cards. */ 1252 UInt32 csBusType; /* See kVideoBusI2C etc.*/ 1253 SInt32 csMinBus; /* Minimum bus (usually kVideoDefaultBus). Used to probe additional busses*/ 1254 SInt32 csMaxBus; /* Max bus (usually kVideoDefaultBus). Used to probe additional busses*/ 1255 1256 UInt32 csSupportedTypes; /* Bit field for first 32 supported transaction types. Eg. 0x07 => support for kVideoNoTransactionType, kVideoSimpleI2CType and kVideoDDCciReplyType.*/ 1257 UInt32 csSupportedCommFlags; /* Return the flags csCommFlags understood by this driver. */ 1258 UInt32 csReserved2; /* Always zero*/ 1259 UInt32 csReserved3; /* Always zero*/ 1260 1261 UInt32 csReserved4; /* Always zero*/ 1262 UInt32 csReserved5; /* Always zero*/ 1263 UInt32 csReserved6; /* Always zero*/ 1264 UInt32 csReserved7; /* Always zero*/ 1265}; 1266typedef struct VDCommunicationInfoRec VDCommunicationInfoRec; 1267 1268typedef VDCommunicationInfoRec * VDCommunicationInfoPtr; 1269 1270 1271struct VDScalerRec { 1272 UInt32 csScalerSize; /* Init to sizeof(VDScalerRec) */ 1273 UInt32 csScalerVersion; /* Init to 0 */ 1274 UInt32 csReserved1; /* Init to 0 */ 1275 UInt32 csReserved2; /* Init to 0 */ 1276 1277 DisplayModeID csDisplayModeID; /* Display Mode ID modified by this call. */ 1278 UInt32 csDisplayModeSeed; /* */ 1279 UInt32 csDisplayModeState; /* Display Mode state */ 1280 UInt32 csReserved3; /* Init to 0 */ 1281 1282 UInt32 csScalerFlags; /* Init to 0 */ 1283 UInt32 csHorizontalPixels; /* Graphics system addressable pixels */ 1284 UInt32 csVerticalPixels; /* Graphics system addressable lines */ 1285 UInt32 csHorizontalInset; /* Border pixels for underscan */ 1286 UInt32 csVerticalInset; /* Border lines for underscan */ 1287 UInt32 csReserved6; /* Init to 0 */ 1288 UInt32 csReserved7; /* Init to 0 */ 1289 UInt32 csReserved8; /* Init to 0 */ 1290}; 1291typedef struct VDScalerRec VDScalerRec; 1292typedef VDScalerRec *VDScalerPtr; 1293 1294struct VDScalerInfoRec { 1295 UInt32 csScalerInfoSize; /* Init to sizeof(VDScalerInfoRec) */ 1296 UInt32 csScalerInfoVersion; /* Init to 0 */ 1297 UInt32 csReserved1; /* Init to 0 */ 1298 UInt32 csReserved2; /* Init to 0 */ 1299 1300 UInt32 csScalerFeatures; /* Feature flags */ 1301 UInt32 csMaxHorizontalPixels; /* limit to horizontal scaled pixels */ 1302 UInt32 csMaxVerticalPixels; /* limit to vertical scaled pixels */ 1303 UInt32 csReserved3; /* Init to 0 */ 1304 1305 UInt32 csReserved4; /* Init to 0 */ 1306 UInt32 csReserved5; /* Init to 0 */ 1307 UInt32 csReserved6; /* Init to 0 */ 1308 UInt32 csReserved7; /* Init to 0 */ 1309}; 1310typedef struct VDScalerInfoRec VDScalerInfoRec; 1311typedef VDScalerInfoRec *VDScalerInfoPtr; 1312 1313enum { 1314 /* csMirrorFeatures*/ 1315 kMirrorSameDepthOnlyMirrorMask = (1 << 0), /* Commonly true - Mirroring can only be done if the displays are the same bitdepth*/ 1316 kMirrorSameSizeOnlyMirrorMask = (1 << 1), /* Commonly false - Mirroring can only be done if the displays are the same size*/ 1317 kMirrorSameTimingOnlyMirrorMask = (1 << 2), /* Sometimes true - Mirroring can only be done if the displays are the same timing*/ 1318 kMirrorCommonGammaMask = (1 << 3) /* Sometimes true - Only one gamma correction LUT.*/ 1319}; 1320 1321enum { 1322 /* csMirrorSupportedFlags and csMirrorFlags*/ 1323 kMirrorCanMirrorMask = (1 << 0), /* Set means we can HW mirrored right now (uses csMirrorEntryID)*/ 1324 kMirrorAreMirroredMask = (1 << 1), /* Set means we are HW mirrored right now (uses csMirrorEntryID)*/ 1325 kMirrorUnclippedMirrorMask = (1 << 2), /* Set means mirrored displays are not clipped to their intersection*/ 1326 kMirrorHAlignCenterMirrorMask = (1 << 3), /* Set means mirrored displays can/should be centered horizontally*/ 1327 kMirrorVAlignCenterMirrorMask = (1 << 4), /* Set means mirrored displays can/should be centered vertically*/ 1328 kMirrorCanChangePixelFormatMask = (1 << 5), /* Set means mirrored the device should change the pixel format of mirrored displays to allow mirroring.*/ 1329 kMirrorCanChangeTimingMask = (1 << 6), /* Set means mirrored the device should change the timing of mirrored displays to allow mirroring.*/ 1330 kMirrorClippedMirrorMask = (1 << 7) /* Set means mirrored displays are clipped to their intersection (driver handles blacking and base address adjustment)*/ 1331}; 1332 1333struct VDMirrorRec { 1334 UInt32 csMirrorSize; /* Init to sizeof(VDMirrorRec)*/ 1335 UInt32 csMirrorVersion; /* Init to 0*/ 1336 1337 RegEntryID csMirrorRequestID; /* Input RegEntryID to check for mirroring support and state*/ 1338 RegEntryID csMirrorResultID; /* Output RegEntryID of the next mirrored device*/ 1339 1340 UInt32 csMirrorFeatures; /* Output summary features of the driver*/ 1341 UInt32 csMirrorSupportedFlags; /* Output configuration options supported by the driver*/ 1342 UInt32 csMirrorFlags; /* Output configuration options active now*/ 1343 UInt32 csReserved1; /* Init to 0*/ 1344 1345 1346 UInt32 csReserved2; /* Init to 0*/ 1347 UInt32 csReserved3; /* Init to 0*/ 1348 UInt32 csReserved4; /* Init to 0*/ 1349 UInt32 csReserved5; /* Init to 0*/ 1350}; 1351typedef struct VDMirrorRec VDMirrorRec; 1352typedef VDMirrorRec * VDMirrorPtr; 1353 1354struct VDConfigurationRec { 1355 UInt32 csConfigFeature; /* input what feature to config - always input*/ 1356 UInt32 csConfigSupport; /* output support value - always output*/ 1357 uintptr_t csConfigValue; /* input/output feature value - input on Control(), output on Status()*/ 1358 uintptr_t csReserved1; 1359 uintptr_t csReserved2; 1360}; 1361typedef struct VDConfigurationRec VDConfigurationRec; 1362typedef VDConfigurationRec * VDConfigurationPtr; 1363 1364enum 1365{ 1366 kDVIPowerSwitchFeature = (1 << 0), /* Used for csConfigFeature*/ 1367 kDVIPowerSwitchSupportMask = (1 << 0), /* Read-only*/ 1368 kDVIPowerSwitchActiveMask = (1 << 0), /* Read/write for csConfigValue*/ 1369}; 1370 1371struct VDConfigurationFeatureListRec 1372{ 1373 OSType * csConfigFeatureList; 1374 ItemCount csNumConfigFeatures; 1375 uintptr_t csReserved1; 1376 uintptr_t csReserved2; 1377}; 1378typedef struct VDConfigurationFeatureListRec VDConfigurationFeatureListRec; 1379typedef VDConfigurationFeatureListRec * VDConfigurationFeatureListRecPtr; 1380 1381 1382#ifndef __LP64__ 1383#pragma options align=reset 1384#endif 1385 1386#ifdef __cplusplus 1387} 1388#endif 1389 1390#endif /* __IOMACOSVIDEO__ */ 1391 1392