1/* 2 * Copyright (c) 2004-2006 Apple Computer, Inc. All rights reserved. 3 * 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ 5 * 6 * This file contains Original Code and/or Modifications of Original Code 7 * as defined in and that are subject to the Apple Public Source License 8 * Version 2.0 (the 'License'). You may not use this file except in 9 * compliance with the License. The rights granted to you under the License 10 * may not be used to create, or enable the creation or redistribution of, 11 * unlawful or unlicensed copies of an Apple operating system, or to 12 * circumvent, violate, or enable the circumvention or violation of, any 13 * terms of an Apple operating system software license agreement. 14 * 15 * Please obtain a copy of the License at 16 * http://www.opensource.apple.com/apsl/ and read it before using this file. 17 * 18 * The Original Code and all software distributed under the License are 19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 23 * Please see the License for the specific language governing rights and 24 * limitations under the License. 25 * 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ 27 */ 28/* 29 * @OSF_COPYRIGHT@ 30 */ 31 32#ifndef _MACH_I386__TYPES_H_ 33#define _MACH_I386__TYPES_H_ 34 35/* 36 * i386_thread_state is the structure that is exported to user threads for 37 * use in status/mutate calls. This structure should never change. 38 * 39 */ 40 41#if !__DARWIN_UNIX03 42struct i386_thread_state 43#else /* __DARWIN_UNIX03 */ 44struct __darwin_i386_thread_state 45#endif /* __DARWIN_UNIX03 */ 46{ 47 unsigned int eax; 48 unsigned int ebx; 49 unsigned int ecx; 50 unsigned int edx; 51 unsigned int edi; 52 unsigned int esi; 53 unsigned int ebp; 54 unsigned int esp; 55 unsigned int ss; 56 unsigned int eflags; 57 unsigned int eip; 58 unsigned int cs; 59 unsigned int ds; 60 unsigned int es; 61 unsigned int fs; 62 unsigned int gs; 63}; 64 65#if !__DARWIN_UNIX03 66struct x86_thread_state64 67#else /* __DARWIN_UNIX03 */ 68struct __darwin_x86_thread_state64 69#endif /* __DARWIN_UNIX03 */ 70{ 71 uint64_t rax; 72 uint64_t rbx; 73 uint64_t rcx; 74 uint64_t rdx; 75 uint64_t rdi; 76 uint64_t rsi; 77 uint64_t rbp; 78 uint64_t rsp; 79 uint64_t r8; 80 uint64_t r9; 81 uint64_t r10; 82 uint64_t r11; 83 uint64_t r12; 84 uint64_t r13; 85 uint64_t r14; 86 uint64_t r15; 87 uint64_t rip; 88 uint64_t rflags; 89 uint64_t cs; 90 uint64_t fs; 91 uint64_t gs; 92}; 93 94 95typedef struct fp_control { 96 unsigned short invalid :1, 97 denorm :1, 98 zdiv :1, 99 ovrfl :1, 100 undfl :1, 101 precis :1, 102 :2, 103 pc :2, 104#define FP_PREC_24B 0 105#define FP_PREC_53B 2 106#define FP_PREC_64B 3 107 rc :2, 108#define FP_RND_NEAR 0 109#define FP_RND_DOWN 1 110#define FP_RND_UP 2 111#define FP_CHOP 3 112 /*inf*/ :1, 113 :3; 114} fp_control_t; 115/* 116 * Status word. 117 */ 118 119typedef struct fp_status { 120 unsigned short invalid :1, 121 denorm :1, 122 zdiv :1, 123 ovrfl :1, 124 undfl :1, 125 precis :1, 126 stkflt :1, 127 errsumm :1, 128 c0 :1, 129 c1 :1, 130 c2 :1, 131 tos :3, 132 c3 :1, 133 busy :1; 134} fp_status_t; 135 136/* defn of 80bit x87 FPU or MMX register */ 137struct mmst_reg { 138 char mmst_reg[10]; 139 char mmst_rsrv[6]; 140}; 141 142 143/* defn of 128 bit XMM regs */ 144struct xmm_reg { 145 char xmm_reg[16]; 146}; 147 148/* 149 * Floating point state. 150 */ 151 152#define FP_STATE_BYTES 512 /* number of chars worth of data from fpu_fcw */ 153#if !__DARWIN_UNIX03 154struct i386_float_state 155#else /* __DARWIN_UNIX03 */ 156struct __darwin_i386_float_state 157#endif /* __DARWIN_UNIX03 */ 158{ 159 int fpu_reserved[2]; 160 fp_control_t fpu_fcw; /* x87 FPU control word */ 161 fp_status_t fpu_fsw; /* x87 FPU status word */ 162 uint8_t fpu_ftw; /* x87 FPU tag word */ 163 uint8_t fpu_rsrv1; /* reserved */ 164 uint16_t fpu_fop; /* x87 FPU Opcode */ 165 uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */ 166 uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */ 167 uint16_t fpu_rsrv2; /* reserved */ 168 uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */ 169 uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */ 170 uint16_t fpu_rsrv3; /* reserved */ 171 uint32_t fpu_mxcsr; /* MXCSR Register state */ 172 uint32_t fpu_mxcsrmask; /* MXCSR mask */ 173 struct mmst_reg fpu_stmm0; /* ST0/MM0 */ 174 struct mmst_reg fpu_stmm1; /* ST1/MM1 */ 175 struct mmst_reg fpu_stmm2; /* ST2/MM2 */ 176 struct mmst_reg fpu_stmm3; /* ST3/MM3 */ 177 struct mmst_reg fpu_stmm4; /* ST4/MM4 */ 178 struct mmst_reg fpu_stmm5; /* ST5/MM5 */ 179 struct mmst_reg fpu_stmm6; /* ST6/MM6 */ 180 struct mmst_reg fpu_stmm7; /* ST7/MM7 */ 181 struct xmm_reg fpu_xmm0; /* XMM 0 */ 182 struct xmm_reg fpu_xmm1; /* XMM 1 */ 183 struct xmm_reg fpu_xmm2; /* XMM 2 */ 184 struct xmm_reg fpu_xmm3; /* XMM 3 */ 185 struct xmm_reg fpu_xmm4; /* XMM 4 */ 186 struct xmm_reg fpu_xmm5; /* XMM 5 */ 187 struct xmm_reg fpu_xmm6; /* XMM 6 */ 188 struct xmm_reg fpu_xmm7; /* XMM 7 */ 189 char fpu_rsrv4[14*16]; /* reserved */ 190 int fpu_reserved1; 191}; 192 193 194#if !__DARWIN_UNIX03 195struct i386_exception_state 196#else /* __DARWIN_UNIX03 */ 197struct __darwin_i386_exception_state 198#endif /* __DARWIN_UNIX03 */ 199{ 200 unsigned int trapno; 201 unsigned int err; 202 unsigned int faultvaddr; 203}; 204 205#if !__DARWIN_UNIX03 206struct x86_debug_state 207#else /* __DARWIN_UNIX03 */ 208struct __darwin_x86_debug_state 209#endif /* __DARWIN_UNIX03 */ 210{ 211 unsigned int dr0; 212 unsigned int dr1; 213 unsigned int dr2; 214 unsigned int dr3; 215 unsigned int dr4; 216 unsigned int dr5; 217 unsigned int dr6; 218 unsigned int dr7; 219}; 220 221#endif /* _MACH_I386__TYPES_H_ */ 222