1/*
2 * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29#ifndef	_I386_POSTCODE_H_
30#define	_I386_POSTCODE_H_
31
32#ifndef DEBUG
33#include <debug.h>
34#endif
35
36/* Define this to delay about 1 sec after posting each code */
37//#define POSTCODE_DELAY 1
38
39/* The POSTCODE is port 0x80 */
40#define	POSTPORT 0x80
41
42#define	SPINCOUNT	300000000
43#define CPU_PAUSE()	rep; nop
44
45#if DEBUG
46/*
47 * Macro to output byte value to postcode, destoying register al.
48 * Additionally, if POSTCODE_DELAY, spin for about a second.
49 */
50#if POSTCODE_DELAY
51#define POSTCODE_AL			\
52        outb    %al,$(POSTPORT);	\
53	movl	$(SPINCOUNT), %eax;	\
541:					\
55	CPU_PAUSE();			\
56	decl	%eax;			\
57	jne	1b
58#else
59#define POSTCODE_AL			\
60        outb    %al,$(POSTPORT)
61#endif /* POSTCODE_DELAY */
62
63#define POSTCODE(XX)			\
64	mov	$(XX), %al;		\
65	POSTCODE_AL
66
67/* Output byte value to postcode, without destoying register eax */
68#define	POSTCODE_SAVE_EAX(XX)		\
69	push	%eax;			\
70	POSTCODE(XX);			\
71	pop	%eax
72
73/*
74 * Display a 32-bit value to the post card - low byte to high byte
75 * Entry: value in %ebx
76 * Exit: %ebx preserved; %eax destroyed
77 */
78#define POSTCODE32_EBX			\
79	roll	$8, %ebx;		\
80	movl	%ebx, %eax;		\
81	POSTCODE_AL;			\
82					\
83	roll	$8, %ebx;		\
84	movl	%ebx, %eax;		\
85	POSTCODE_AL;			\
86					\
87	roll	$8, %ebx;		\
88	movl	%ebx, %eax;		\
89	POSTCODE_AL;			\
90					\
91	roll	$8, %ebx;		\
92	movl	%ebx, %eax;		\
93	POSTCODE_AL
94
95#else	/* DEBUG */
96#define POSTCODE_AL
97#define POSTCODE(X)
98#define POSTCODE32_EBX
99#endif	/* DEBUG */
100
101/*
102 * The following postcodes are defined for stages of early startup:
103 */
104
105#define	_PSTART_ENTRY			0xFF
106#define	_PSTART_RELOC			0xFE
107#define	PSTART_ENTRY			0xFD
108#define PSTART_PAGE_TABLES		0xFC
109#define PSTART_BEFORE_PAGING		0xFB
110#define VSTART_ENTRY			0xFA
111#define VSTART_STACK_SWITCH		0xF9
112#define VSTART_EXIT			0xF8
113#define	I386_INIT_ENTRY			0xF7
114#define	CPU_INIT_D			0xF6
115#define	PE_INIT_PLATFORM_D		0xF5
116
117#define	SLAVE_RSTART_ENTRY		0xEF
118#define	SLAVE_REAL_TO_PROT_ENTRY	0xEE
119#define	SLAVE_REAL_TO_PROT_EXIT		0xED
120#define	SLAVE_STARTPROG_ENTRY		0xEC
121#define	SLAVE_STARTPROG_EXIT		0xEB
122#define	SLAVE_PSTART_ENTRY		0xEA
123#define	SLAVE_PSTART_EXIT		0xE9
124#define	SLAVE_VSTART_ENTRY		0xE8
125#define	SLAVE_VSTART_DESC_INIT		0xE7
126#define	SLAVE_VSTART_STACK_SWITCH	0xE6
127#define	SLAVE_VSTART_EXIT		0xE5
128#define	I386_INIT_SLAVE			0xE4
129
130#define	PANIC_DOUBLE_FAULT		0xDF	/* Double Fault exception */
131#define	PANIC_MACHINE_CHECK		0xDE	/* Machine-Check */
132#define	MP_KDP_ENTER			0xDB	/* Machine in kdp DeBugger */
133#define	PANIC_HLT			0xD1	/* Die an early death */
134#define	NO_64BIT			0x64	/* No 64-bit support yet */
135
136#define ACPI_WAKE_START_ENTRY		0xCF
137#define ACPI_WAKE_PROT_ENTRY		0xCE
138#define ACPI_WAKE_PAGED_ENTRY		0xCD
139
140#define	CPU_IA32_ENABLE_ENTRY		0xBF
141#define	CPU_IA32_ENABLE_EXIT		0xBE
142#define ML_LOAD_DESC64_ENTRY		0xBD
143#define ML_LOAD_DESC64_GDT		0xBC
144#define ML_LOAD_DESC64_IDT		0xBB
145#define ML_LOAD_DESC64_LDT		0xBA
146#define ML_LOAD_DESC64_EXIT		0xB9
147#define	CPU_IA32_DISABLE_ENTRY		0xB8
148#define	CPU_IA32_DISABLE_EXIT		0xB7
149
150#ifndef ASSEMBLER
151inline static void
152_postcode_delay(uint32_t	spincount)
153{
154	asm volatile("1:			\n\t"
155	             "  rep; nop;		\n\t"
156		     "  decl %%eax;		\n\t"
157		     "  jne 1b"
158		     : : "a" (spincount));
159}
160inline static void
161_postcode(uint8_t	xx)
162{
163	asm volatile("outb %0, %1" : : "a" (xx), "N" (POSTPORT));
164}
165#if	DEBUG
166inline static void
167postcode(uint8_t	xx)
168{
169	_postcode(xx);
170#if	POSTCODE_DELAY
171	_postcode_delay(SPINCOUNT);
172#endif
173}
174#else
175#define postcode(xx) do {} while(0)
176#endif
177#endif
178
179#endif /* _I386_POSTCODE_H_ */
180