1/*
2 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
49 *  School of Computer Science
50 *  Carnegie Mellon University
51 *  Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58
59#ifndef	_I386_TSS_H_
60#define	_I386_TSS_H_
61
62#include <stdint.h>
63
64/*
65 *	i386 Task State Segment
66 */
67struct i386_tss {
68	uint32_t	back_link;	/* segment number of previous task,
69					   if nested */
70	uint32_t	esp0;		/* initial stack pointer ... */
71	uint32_t	ss0;		/* and segment for ring 0 */
72	uint32_t	esp1;		/* initial stack pointer ... */
73	uint32_t	ss1;		/* and segment for ring 1 */
74	uint32_t	esp2;		/* initial stack pointer ... */
75	uint32_t	ss2;		/* and segment for ring 2 */
76	uint32_t	cr3;		/* CR3 - page table directory
77						 physical address */
78	uint32_t	eip;
79	uint32_t	eflags;
80	uint32_t	eax;
81	uint32_t	ecx;
82	uint32_t	edx;
83	uint32_t	ebx;
84	uint32_t	esp;		/* current stack pointer */
85	uint32_t	ebp;
86	uint32_t	esi;
87	uint32_t	edi;
88	uint32_t	es;
89	uint32_t	cs;
90	uint32_t	ss;		/* current stack segment */
91	uint32_t	ds;
92	uint32_t	fs;
93	uint32_t	gs;
94	uint32_t	ldt;		/* local descriptor table segment */
95	uint16_t	trace_trap;	/* trap on switch to this task */
96	uint16_t	io_bit_map_offset;
97					/* offset to start of IO permission
98					   bit map */
99};
100
101/*
102 * Temporary stack used on kernel entry via the sysenter instruction.
103 * Its top points on to the PCB save area. It must contain space for
104 * a single interrupt stack frame in case of single-stepping over the sysenter.
105 * Although this is defined as a 64-bit stack, the space is also used in
106 * 32-bit legacy mode. For 64-bit the stack is 16-byte aligned.
107 */
108struct sysenter_stack {
109	uint64_t	stack[16];	/* Space for a 64-bit frame and some */
110	uint64_t	top;		/* Top and pointer to ISS in PCS */
111};
112
113#pragma pack(4)
114struct x86_64_tss {
115	uint32_t	reserved1;
116	uint64_t	rsp0;		/* stack pointer for CPL0 */
117	uint64_t	rsp1;		/* stack pointer for CPL1 */
118	uint64_t	rsp2;		/* stack pointer for CPL2 */
119	uint32_t	reserved2;
120	uint32_t	reserved3;
121	uint64_t	ist1;		/* interrupt stack table 1 */
122	uint64_t	ist2;		/* interrupt stack table 2 */
123	uint64_t	ist3;		/* interrupt stack table 3 */
124	uint64_t	ist4;		/* interrupt stack table 4 */
125	uint64_t	ist5;		/* interrupt stack table 5 */
126	uint64_t	ist6;		/* interrupt stack table 6 */
127	uint64_t	ist7;		/* interrupt stack table 7 */
128	uint32_t	reserved4;
129	uint32_t	reserved5;
130	uint16_t	reserved6;
131	uint16_t	io_bit_map_offset;
132					/* offset to IO permission bit map */
133};
134#pragma pack()
135#endif	/* _I386_TSS_H_ */
136