1/* 2 * Copyright (c) 2000-2009 Apple Inc. All rights reserved. 3 * 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ 5 * 6 * This file contains Original Code and/or Modifications of Original Code 7 * as defined in and that are subject to the Apple Public Source License 8 * Version 2.0 (the 'License'). You may not use this file except in 9 * compliance with the License. The rights granted to you under the License 10 * may not be used to create, or enable the creation or redistribution of, 11 * unlawful or unlicensed copies of an Apple operating system, or to 12 * circumvent, violate, or enable the circumvention or violation of, any 13 * terms of an Apple operating system software license agreement. 14 * 15 * Please obtain a copy of the License at 16 * http://www.opensource.apple.com/apsl/ and read it before using this file. 17 * 18 * The Original Code and all software distributed under the License are 19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 23 * Please see the License for the specific language governing rights and 24 * limitations under the License. 25 * 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ 27 */ 28/* 29 * @OSF_COPYRIGHT@ 30 */ 31 32#ifndef _I386_MACHINE_ROUTINES_H_ 33#define _I386_MACHINE_ROUTINES_H_ 34 35#include <mach/mach_types.h> 36#include <mach/boolean.h> 37#include <kern/kern_types.h> 38#include <pexpert/pexpert.h> 39 40#include <sys/cdefs.h> 41#include <sys/appleapiopts.h> 42 43__BEGIN_DECLS 44 45#ifdef XNU_KERNEL_PRIVATE 46 47/* are we a 64 bit platform ? */ 48 49boolean_t ml_is64bit(void); 50 51/* is this a 64bit thread? */ 52 53boolean_t ml_thread_is64bit(thread_t); 54 55/* is this a 64bit thread? */ 56 57boolean_t ml_state_is64bit(void *); 58 59/* set state of fpu save area for signal handling */ 60 61void ml_fp_setvalid(boolean_t); 62 63void ml_cpu_set_ldt(int); 64 65/* Interrupt handling */ 66 67/* Initialize Interrupts */ 68void ml_init_interrupt(void); 69 70/* Generate a fake interrupt */ 71void ml_cause_interrupt(void); 72 73/* Initialize Interrupts */ 74void ml_install_interrupt_handler( 75 void *nub, 76 int source, 77 void *target, 78 IOInterruptHandler handler, 79 void *refCon); 80 81void ml_entropy_collect(void); 82 83uint64_t ml_get_timebase(); 84void ml_init_lock_timeout(void); 85void ml_init_delay_spin_threshold(int); 86 87boolean_t ml_delay_should_spin(uint64_t interval); 88 89vm_offset_t 90ml_static_ptovirt( 91 vm_offset_t); 92 93void ml_static_mfree( 94 vm_offset_t, 95 vm_size_t); 96 97/* boot memory allocation */ 98vm_offset_t ml_static_malloc( 99 vm_size_t size); 100 101/* virtual to physical on wired pages */ 102vm_offset_t ml_vtophys( 103 vm_offset_t vaddr); 104 105vm_size_t ml_nofault_copy( 106 vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size); 107 108boolean_t ml_validate_nofault( 109 vm_offset_t virtsrc, vm_size_t size); 110 111/* Machine topology info */ 112uint64_t ml_cpu_cache_size(unsigned int level); 113uint64_t ml_cpu_cache_sharing(unsigned int level); 114 115/* Initialize the maximum number of CPUs */ 116void ml_init_max_cpus( 117 unsigned long max_cpus); 118 119extern void ml_cpu_up(void); 120extern void ml_cpu_down(void); 121 122void bzero_phys_nc( 123 addr64_t phys_address, 124 uint32_t length); 125extern uint32_t interrupt_timer_coalescing_enabled; 126extern uint32_t idle_entry_timer_processing_hdeadline_threshold; 127 128#if TCOAL_INSTRUMENT 129#define TCOAL_DEBUG KERNEL_DEBUG_CONSTANT 130#else 131#define TCOAL_DEBUG(x, a, b, c, d, e) do { } while(0) 132#endif /* TCOAL_INSTRUMENT */ 133 134#if defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE) 135/* IO memory map services */ 136 137/* Map memory map IO space */ 138vm_offset_t ml_io_map( 139 vm_offset_t phys_addr, 140 vm_size_t size); 141 142 143void ml_get_bouncepool_info( 144 vm_offset_t *phys_addr, 145 vm_size_t *size); 146/* Indicates if spinlock, IPI and other timeouts should be suspended */ 147boolean_t machine_timeout_suspended(void); 148#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */ 149 150/* Warm up a CPU to receive an interrupt */ 151kern_return_t ml_interrupt_prewarm(uint64_t deadline); 152 153#endif /* XNU_KERNEL_PRIVATE */ 154 155#ifdef KERNEL_PRIVATE 156 157/* Type for the Time Base Enable function */ 158typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable); 159 160/* Type for the IPI Hander */ 161typedef void (*ipi_handler_t)(void); 162 163/* Struct for ml_processor_register */ 164struct ml_processor_info { 165 cpu_id_t cpu_id; 166 boolean_t boot_cpu; 167 vm_offset_t start_paddr; 168 boolean_t supports_nap; 169 unsigned long l2cr_value; 170 time_base_enable_t time_base_enable; 171}; 172 173typedef struct ml_processor_info ml_processor_info_t; 174 175 176/* Register a processor */ 177kern_return_t 178ml_processor_register( 179 cpu_id_t cpu_id, 180 uint32_t lapic_id, 181 processor_t *processor_out, 182 boolean_t boot_cpu, 183 boolean_t start ); 184 185/* PCI config cycle probing */ 186boolean_t ml_probe_read( 187 vm_offset_t paddr, 188 unsigned int *val); 189boolean_t ml_probe_read_64( 190 addr64_t paddr, 191 unsigned int *val); 192 193/* Read physical address byte */ 194unsigned int ml_phys_read_byte( 195 vm_offset_t paddr); 196unsigned int ml_phys_read_byte_64( 197 addr64_t paddr); 198 199/* Read physical address half word */ 200unsigned int ml_phys_read_half( 201 vm_offset_t paddr); 202unsigned int ml_phys_read_half_64( 203 addr64_t paddr); 204 205/* Read physical address word*/ 206unsigned int ml_phys_read( 207 vm_offset_t paddr); 208unsigned int ml_phys_read_64( 209 addr64_t paddr); 210unsigned int ml_phys_read_word( 211 vm_offset_t paddr); 212unsigned int ml_phys_read_word_64( 213 addr64_t paddr); 214 215/* Read physical address double word */ 216unsigned long long ml_phys_read_double( 217 vm_offset_t paddr); 218unsigned long long ml_phys_read_double_64( 219 addr64_t paddr); 220 221/* Write physical address byte */ 222void ml_phys_write_byte( 223 vm_offset_t paddr, unsigned int data); 224void ml_phys_write_byte_64( 225 addr64_t paddr, unsigned int data); 226 227/* Write physical address half word */ 228void ml_phys_write_half( 229 vm_offset_t paddr, unsigned int data); 230void ml_phys_write_half_64( 231 addr64_t paddr, unsigned int data); 232 233/* Write physical address word */ 234void ml_phys_write( 235 vm_offset_t paddr, unsigned int data); 236void ml_phys_write_64( 237 addr64_t paddr, unsigned int data); 238void ml_phys_write_word( 239 vm_offset_t paddr, unsigned int data); 240void ml_phys_write_word_64( 241 addr64_t paddr, unsigned int data); 242 243/* Write physical address double word */ 244void ml_phys_write_double( 245 vm_offset_t paddr, unsigned long long data); 246void ml_phys_write_double_64( 247 addr64_t paddr, unsigned long long data); 248 249/* Struct for ml_cpu_get_info */ 250struct ml_cpu_info { 251 uint32_t vector_unit; 252 uint32_t cache_line_size; 253 uint32_t l1_icache_size; 254 uint32_t l1_dcache_size; 255 uint32_t l2_settings; 256 uint32_t l2_cache_size; 257 uint32_t l3_settings; 258 uint32_t l3_cache_size; 259}; 260 261typedef struct ml_cpu_info ml_cpu_info_t; 262 263/* Get processor info */ 264void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info); 265 266void ml_thread_policy( 267 thread_t thread, 268 unsigned policy_id, 269 unsigned policy_info); 270 271#define MACHINE_GROUP 0x00000001 272#define MACHINE_NETWORK_GROUP 0x10000000 273#define MACHINE_NETWORK_WORKLOOP 0x00000001 274#define MACHINE_NETWORK_NETISR 0x00000002 275 276/* Return the maximum number of CPUs set by ml_init_max_cpus() */ 277int ml_get_max_cpus( 278 void); 279 280/* 281 * The following are in pmCPU.c not machine_routines.c. 282 */ 283extern void ml_set_maxsnoop(uint32_t maxdelay); 284extern unsigned ml_get_maxsnoop(void); 285extern void ml_set_maxbusdelay(uint32_t mdelay); 286extern uint32_t ml_get_maxbusdelay(void); 287extern void ml_set_maxintdelay(uint64_t mdelay); 288extern uint64_t ml_get_maxintdelay(void); 289extern boolean_t ml_get_interrupt_prewake_applicable(void); 290 291 292extern uint64_t tmrCvt(uint64_t time, uint64_t conversion); 293 294extern uint64_t ml_cpu_int_event_time(void); 295 296#endif /* KERNEL_PRIVATE */ 297 298/* Get Interrupts Enabled */ 299boolean_t ml_get_interrupts_enabled(void); 300 301/* Set Interrupts Enabled */ 302boolean_t ml_set_interrupts_enabled(boolean_t enable); 303 304/* Check if running at interrupt context */ 305boolean_t ml_at_interrupt_context(void); 306 307/* Zero bytes starting at a physical address */ 308void bzero_phys( 309 addr64_t phys_address, 310 uint32_t length); 311 312/* Bytes available on current stack */ 313vm_offset_t ml_stack_remaining(void); 314 315#if CONFIG_COUNTERS 316void ml_get_csw_threads(thread_t * /*old*/, thread_t * /*new*/); 317#endif /* CONFIG_COUNTERS */ 318 319__END_DECLS 320 321#ifdef XNU_KERNEL_PRIVATE 322 323boolean_t ml_fpu_avx_enabled(void); 324 325void interrupt_latency_tracker_setup(void); 326void interrupt_reset_latency_stats(void); 327void interrupt_populate_latency_stats(char *, unsigned); 328void ml_get_power_state(boolean_t *, boolean_t *); 329 330void timer_queue_expire_local(void*); 331void timer_queue_expire_rescan(void*); 332void ml_timer_evaluate(void); 333boolean_t ml_timer_forced_evaluation(void); 334 335void ml_gpu_stat_update(uint64_t); 336uint64_t ml_gpu_stat(thread_t); 337boolean_t ml_recent_wake(void); 338#endif /* XNU_KERNEL_PRIVATE */ 339#endif /* _I386_MACHINE_ROUTINES_H_ */ 340