1//===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// CodeEmitterGen uses the descriptions of instructions and their fields to
11// construct an automated code emitter: a function that, given a MachineInstr,
12// returns the (currently, 32-bit unsigned) value of the instruction.
13//
14//===----------------------------------------------------------------------===//
15
16#include "CodeGenTarget.h"
17#include "llvm/TableGen/Record.h"
18#include "llvm/ADT/StringExtras.h"
19#include "llvm/Support/CommandLine.h"
20#include "llvm/Support/Debug.h"
21#include "llvm/TableGen/TableGenBackend.h"
22#include <map>
23#include <string>
24#include <vector>
25using namespace llvm;
26
27// FIXME: Somewhat hackish to use a command line option for this. There should
28// be a CodeEmitter class in the Target.td that controls this sort of thing
29// instead.
30static cl::opt<bool>
31MCEmitter("mc-emitter",
32          cl::desc("Generate CodeEmitter for use with the MC library."),
33          cl::init(false));
34
35namespace {
36
37class CodeEmitterGen {
38  RecordKeeper &Records;
39public:
40  CodeEmitterGen(RecordKeeper &R) : Records(R) {}
41
42  void run(raw_ostream &o);
43private:
44  void emitMachineOpEmitter(raw_ostream &o, const std::string &Namespace);
45  void emitGetValueBit(raw_ostream &o, const std::string &Namespace);
46  void reverseBits(std::vector<Record*> &Insts);
47  int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
48  std::string getInstructionCase(Record *R, CodeGenTarget &Target);
49  void AddCodeToMergeInOperand(Record *R, BitsInit *BI,
50                               const std::string &VarName,
51                               unsigned &NumberedOp,
52                               std::string &Case, CodeGenTarget &Target);
53
54};
55
56void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
57  for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
58       I != E; ++I) {
59    Record *R = *I;
60    if (R->getValueAsString("Namespace") == "TargetOpcode" ||
61        R->getValueAsBit("isPseudo"))
62      continue;
63
64    BitsInit *BI = R->getValueAsBitsInit("Inst");
65
66    unsigned numBits = BI->getNumBits();
67
68    SmallVector<Init *, 16> NewBits(numBits);
69
70    for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
71      unsigned bitSwapIdx = numBits - bit - 1;
72      Init *OrigBit = BI->getBit(bit);
73      Init *BitSwap = BI->getBit(bitSwapIdx);
74      NewBits[bit]        = BitSwap;
75      NewBits[bitSwapIdx] = OrigBit;
76    }
77    if (numBits % 2) {
78      unsigned middle = (numBits + 1) / 2;
79      NewBits[middle] = BI->getBit(middle);
80    }
81
82    BitsInit *NewBI = BitsInit::get(NewBits);
83
84    // Update the bits in reversed order so that emitInstrOpBits will get the
85    // correct endianness.
86    R->getValue("Inst")->setValue(NewBI);
87  }
88}
89
90// If the VarBitInit at position 'bit' matches the specified variable then
91// return the variable bit position.  Otherwise return -1.
92int CodeEmitterGen::getVariableBit(const std::string &VarName,
93                                   BitsInit *BI, int bit) {
94  if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(BI->getBit(bit))) {
95    if (VarInit *VI = dynamic_cast<VarInit*>(VBI->getBitVar()))
96      if (VI->getName() == VarName)
97        return VBI->getBitNum();
98  } else if (VarInit *VI = dynamic_cast<VarInit*>(BI->getBit(bit))) {
99    if (VI->getName() == VarName)
100      return 0;
101  }
102
103  return -1;
104}
105
106void CodeEmitterGen::
107AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
108                        unsigned &NumberedOp,
109                        std::string &Case, CodeGenTarget &Target) {
110  CodeGenInstruction &CGI = Target.getInstruction(R);
111
112  // Determine if VarName actually contributes to the Inst encoding.
113  int bit = BI->getNumBits()-1;
114
115  // Scan for a bit that this contributed to.
116  for (; bit >= 0; ) {
117    if (getVariableBit(VarName, BI, bit) != -1)
118      break;
119
120    --bit;
121  }
122
123  // If we found no bits, ignore this value, otherwise emit the call to get the
124  // operand encoding.
125  if (bit < 0) return;
126
127  // If the operand matches by name, reference according to that
128  // operand number. Non-matching operands are assumed to be in
129  // order.
130  unsigned OpIdx;
131  if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
132    // Get the machine operand number for the indicated operand.
133    OpIdx = CGI.Operands[OpIdx].MIOperandNo;
134    assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
135           "Explicitly used operand also marked as not emitted!");
136  } else {
137    /// If this operand is not supposed to be emitted by the
138    /// generated emitter, skip it.
139    while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp))
140      ++NumberedOp;
141    OpIdx = NumberedOp++;
142  }
143
144  std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);
145  std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName;
146
147  // If the source operand has a custom encoder, use it. This will
148  // get the encoding for all of the suboperands.
149  if (!EncoderMethodName.empty()) {
150    // A custom encoder has all of the information for the
151    // sub-operands, if there are more than one, so only
152    // query the encoder once per source operand.
153    if (SO.second == 0) {
154      Case += "      // op: " + VarName + "\n" +
155              "      op = " + EncoderMethodName + "(MI, " + utostr(OpIdx);
156      if (MCEmitter)
157        Case += ", Fixups";
158      Case += ");\n";
159    }
160  } else {
161    Case += "      // op: " + VarName + "\n" +
162      "      op = getMachineOpValue(MI, MI.getOperand(" + utostr(OpIdx) + ")";
163    if (MCEmitter)
164      Case += ", Fixups";
165    Case += ");\n";
166  }
167
168  for (; bit >= 0; ) {
169    int varBit = getVariableBit(VarName, BI, bit);
170
171    // If this bit isn't from a variable, skip it.
172    if (varBit == -1) {
173      --bit;
174      continue;
175    }
176
177    // Figure out the consecutive range of bits covered by this operand, in
178    // order to generate better encoding code.
179    int beginInstBit = bit;
180    int beginVarBit = varBit;
181    int N = 1;
182    for (--bit; bit >= 0;) {
183      varBit = getVariableBit(VarName, BI, bit);
184      if (varBit == -1 || varBit != (beginVarBit - N)) break;
185      ++N;
186      --bit;
187    }
188
189    uint64_t opMask = ~(uint64_t)0 >> (64-N);
190    int opShift = beginVarBit - N + 1;
191    opMask <<= opShift;
192    opShift = beginInstBit - beginVarBit;
193
194    if (opShift > 0) {
195      Case += "      Value |= (op & UINT64_C(" + utostr(opMask) + ")) << " +
196              itostr(opShift) + ";\n";
197    } else if (opShift < 0) {
198      Case += "      Value |= (op & UINT64_C(" + utostr(opMask) + ")) >> " +
199              itostr(-opShift) + ";\n";
200    } else {
201      Case += "      Value |= op & UINT64_C(" + utostr(opMask) + ");\n";
202    }
203  }
204}
205
206
207std::string CodeEmitterGen::getInstructionCase(Record *R,
208                                               CodeGenTarget &Target) {
209  std::string Case;
210
211  BitsInit *BI = R->getValueAsBitsInit("Inst");
212  const std::vector<RecordVal> &Vals = R->getValues();
213  unsigned NumberedOp = 0;
214
215  // Loop over all of the fields in the instruction, determining which are the
216  // operands to the instruction.
217  for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
218    // Ignore fixed fields in the record, we're looking for values like:
219    //    bits<5> RST = { ?, ?, ?, ?, ? };
220    if (Vals[i].getPrefix() || Vals[i].getValue()->isComplete())
221      continue;
222
223    AddCodeToMergeInOperand(R, BI, Vals[i].getName(), NumberedOp, Case, Target);
224  }
225
226  std::string PostEmitter = R->getValueAsString("PostEncoderMethod");
227  if (!PostEmitter.empty())
228    Case += "      Value = " + PostEmitter + "(MI, Value);\n";
229
230  return Case;
231}
232
233void CodeEmitterGen::run(raw_ostream &o) {
234  CodeGenTarget Target(Records);
235  std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
236
237  // For little-endian instruction bit encodings, reverse the bit order
238  if (Target.isLittleEndianEncoding()) reverseBits(Insts);
239
240
241  const std::vector<const CodeGenInstruction*> &NumberedInstructions =
242    Target.getInstructionsByEnumValue();
243
244  // Emit function declaration
245  o << "uint64_t " << Target.getName();
246  if (MCEmitter)
247    o << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
248      << "    SmallVectorImpl<MCFixup> &Fixups) const {\n";
249  else
250    o << "CodeEmitter::getBinaryCodeForInstr(const MachineInstr &MI) const {\n";
251
252  // Emit instruction base values
253  o << "  static const uint64_t InstBits[] = {\n";
254  for (std::vector<const CodeGenInstruction*>::const_iterator
255          IN = NumberedInstructions.begin(),
256          EN = NumberedInstructions.end();
257       IN != EN; ++IN) {
258    const CodeGenInstruction *CGI = *IN;
259    Record *R = CGI->TheDef;
260
261    if (R->getValueAsString("Namespace") == "TargetOpcode" ||
262        R->getValueAsBit("isPseudo")) {
263      o << "    UINT64_C(0),\n";
264      continue;
265    }
266
267    BitsInit *BI = R->getValueAsBitsInit("Inst");
268
269    // Start by filling in fixed values.
270    uint64_t Value = 0;
271    for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
272      if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1)))
273        Value |= (uint64_t)B->getValue() << (e-i-1);
274    }
275    o << "    UINT64_C(" << Value << ")," << '\t' << "// " << R->getName() << "\n";
276  }
277  o << "    UINT64_C(0)\n  };\n";
278
279  // Map to accumulate all the cases.
280  std::map<std::string, std::vector<std::string> > CaseMap;
281
282  // Construct all cases statement for each opcode
283  for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
284        IC != EC; ++IC) {
285    Record *R = *IC;
286    if (R->getValueAsString("Namespace") == "TargetOpcode" ||
287        R->getValueAsBit("isPseudo"))
288      continue;
289    const std::string &InstName = R->getValueAsString("Namespace") + "::"
290      + R->getName();
291    std::string Case = getInstructionCase(R, Target);
292
293    CaseMap[Case].push_back(InstName);
294  }
295
296  // Emit initial function code
297  o << "  const unsigned opcode = MI.getOpcode();\n"
298    << "  uint64_t Value = InstBits[opcode];\n"
299    << "  uint64_t op = 0;\n"
300    << "  (void)op;  // suppress warning\n"
301    << "  switch (opcode) {\n";
302
303  // Emit each case statement
304  std::map<std::string, std::vector<std::string> >::iterator IE, EE;
305  for (IE = CaseMap.begin(), EE = CaseMap.end(); IE != EE; ++IE) {
306    const std::string &Case = IE->first;
307    std::vector<std::string> &InstList = IE->second;
308
309    for (int i = 0, N = InstList.size(); i < N; i++) {
310      if (i) o << "\n";
311      o << "    case " << InstList[i]  << ":";
312    }
313    o << " {\n";
314    o << Case;
315    o << "      break;\n"
316      << "    }\n";
317  }
318
319  // Default case: unhandled opcode
320  o << "  default:\n"
321    << "    std::string msg;\n"
322    << "    raw_string_ostream Msg(msg);\n"
323    << "    Msg << \"Not supported instr: \" << MI;\n"
324    << "    report_fatal_error(Msg.str());\n"
325    << "  }\n"
326    << "  return Value;\n"
327    << "}\n\n";
328}
329
330} // End anonymous namespace
331
332namespace llvm {
333
334void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) {
335  emitSourceFileHeader("Machine Code Emitter", OS);
336  CodeEmitterGen(RK).run(OS);
337}
338
339} // End llvm namespace
340